公开(公告)号：US07648874B2

公开(公告)日：2010-01-19

申请号：US11339416

申请日：2006-01-25

Applicant: Jong-Cheol Lee ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo ,  Gab-Jin Nam ,  Young-Geun Park ,  Jae-Hyoung Choi ,  Jae-Hyun Yeo ,  Ha-Jin Lim ,  Yun-Seok Kim

Inventor： Jong-Cheol Lee ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo ,  Gab-Jin Nam ,  Young-Geun Park ,  Jae-Hyoung Choi ,  Jae-Hyun Yeo ,  Ha-Jin Lim ,  Yun-Seok Kim

IPC: H01L21/00

CPC classification number: H01L21/022 ,  C23C14/5826 ,  C23C14/586 ,  C23C16/56 ,  H01L21/02142 ,  H01L21/02252 ,  H01L21/28273 ,  H01L21/3141 ,  H01L21/3143 ,  H01L21/31645 ,  H01L27/10852 ,  H01L27/10873 ,  H01L27/115 ,  H01L27/11521 ,  H01L28/40 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78

Abstract: In a method of manufacturing a dielectric structure, after a first dielectric layer is formed on a substrate by using a metal oxide doped with silicon, the substrate is placed on a susceptor of a chamber. By treating the first dielectric layer with a plasma in controlling a voltage difference between the susceptor and a ground, a second dielectric layer is formed on the first dielectric layer. The second dielectric layer including a metal oxynitride doped with silicon having enough content of nitrogen is formed on the first dielectric layer. Therefore, dielectric properties of the dielectric structure comprising the first and the second dielectric layers can be improved and a leakage current can be greatly decreased. By adapting the dielectric structure to a gate insulation layer and/or to a dielectric layer of a capacitor or of a non-volatile semiconductor memory device, capacitances and electrical properties can be improved.

Abstract translation: 在制造电介质结构的方法中，在通过使用掺杂有硅的金属氧化物在基板上形成第一介电层之后，将基板放置在室的基座上。 通过在控制基座和接地之间的电压差的同时用等离子体处理第一电介质层，在第一电介质层上形成第二电介质层。 在第一电介质层上形成包括掺杂有足够的氮含量的硅的金属氮氧化物的第二电介质层。 因此，可以提高包括第一和第二电介质层的电介质结构的介电性能，并且可以大大降低泄漏电流。 通过使电介质结构适应于栅极绝缘层和/或电容器或非易失性半导体存储器件的电介质层，可以提高电容和电性能。

公开(公告)号：US07510748B2

公开(公告)日：2009-03-31

申请号：US11369791

申请日：2006-03-07

Applicant: Sung-Tae Kim ,  Ki-Cheol Yoon ,  Keon-Il Kim ,  Nam Ki ,  Hunkyun Pak ,  Jea-Chul Jung

Inventor： Sung-Tae Kim ,  Ki-Cheol Yoon ,  Keon-Il Kim ,  Nam Ki ,  Hunkyun Pak ,  Jea-Chul Jung

IPC: C09K19/00 ,  C90K19/52

CPC classification number: C09K19/2007 ,  C09K19/588 ,  C09K2019/0448 ,  C09K2219/03 ,  G02B5/3016 ,  Y10T428/10 ,  Y10T428/1005 ,  Y10T428/1036 ,  Y10T428/1041

Abstract: Disclosed is a broadband reflection type brightness enhancement polarizer, which includes a cholesteric liquid crystal film laminate having a broadband selective reflecting wavelength range in which a plurality of cholesteric liquid crystal films having selective reflecting wavelength ranges different from each other by having different mixture ratios of a curable nematic liquid crystal compound expressed by the chemical formula 1 and a curable chiral compound expressed by the chemical formula 2 are laminated; and a film having ¼λ phase difference laminated on one surface of the cholesteric liquid crystal film laminate. This polarizer has wide selective reflecting wavelength ranges of the cholesteric liquid crystal films composing the polarizer, so the entire visible ray range can be covered just by laminating several cholesteric liquid crystal films. Accordingly, the polarizer may be manufactured relatively thinner, so the brightness can be greatly improved when the polarizer is applied to a liquid crystal display.

Abstract translation: 公开了一种宽带反射型亮度增强型偏振器，其包括具有宽带选择反射波长范围的胆甾醇型液晶膜层叠体，其中通过具有不同的混合比例，具有选择性反射波长范围的多个胆甾醇型液晶膜彼此不同 由化学式1表示的可固化向列型液晶化合物和由化学式2表示的可固化手性化合物层压; 并且在胆甾醇型液晶膜层压体的一个表面上层叠了具有1/4相差的膜。 该偏振片具有构成偏振片的胆甾醇型液晶膜的选择性反射波长范围广，因此可以通过层叠多个胆甾型液晶膜来覆盖整个可见光范围。 因此，可以制造相对较薄的偏振片，因此当将偏振器应用于液晶显示器时，可以大大提高亮度。

公开(公告)号：US07486376B2

公开(公告)日：2009-02-03

申请号：US10587559

申请日：2004-11-19

Applicant: Sung-Tae Kim ,  Keon-Il Kim

Inventor： Sung-Tae Kim ,  Keon-Il Kim

IPC: G02F1/13

CPC classification number: G02F1/133536 ,  G02B5/305 ,  G02F2001/133543 ,  G02F2203/05 ,  Y10T428/10 ,  Y10T428/1036

Abstract: The present invention relates to a method of manufacturing a reflective polarizing film for a liquid crystal display device in which cholesteric liquid crystal layers having different selective light-reflecting wavelengths are laminated in the laminated coating method, thus a forming liquid crystal film that covers a visible light region and ¼λ retardation film are attached to the liquid crystal film. In this case, two or more cholestric liquid crystal layers having different selective light-reflecting wavelengths are laminated in order from the shorter wavelength to the longer wavelength in the laminated coating method. Further, during the lamination, orientation layers are laminated between the liquid crystal layers to maximize the selective reflection characteristic of the cholesteric liquid crystal.

Abstract translation: 本发明涉及一种液晶显示装置的反射型偏振片的制造方法，其中层压涂布法层叠具有不同的选择性光反射波长的胆甾醇型液晶层，从而形成覆盖可见光的液晶膜 光区域和1/4延迟膜附着在液晶膜上。 在这种情况下，在层叠涂布法中，从短波长到较长波长的顺序层叠具有不同选择性光反射波长的两个以上的胆甾型液晶层。 此外，在层压期间，取向层层压在液晶层之间，以使胆甾醇型液晶的选择反射特性最大化。

公开(公告)号：US07425514B2

公开(公告)日：2008-09-16

申请号：US11430856

申请日：2006-05-10

Applicant: Jae-Hyun Yeo ,  Young-Sun Kim ,  Sung-Tae Kim ,  In-Sung Park ,  Gi-Vin Im

Inventor： Jae-Hyun Yeo ,  Young-Sun Kim ,  Sung-Tae Kim ,  In-Sung Park ,  Gi-Vin Im

IPC: H01L21/31

CPC classification number: H01L21/0228 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45553 ,  H01L21/02181 ,  H01L21/02274 ,  H01L21/3141 ,  H01L21/31604 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31683 ,  H01L21/31691 ,  H01L28/40

Abstract: Disclosed are methods of forming dielectric materials using atomic layer deposition (ALD) and methods of forming dielectric layers from such materials on a semiconductor device. The ALD process utilizes a first reactant containing at least one alkoxide group that is chemisorbed onto a surface of a substrate and then reacted with an activated oxidant that contains no hydroxyl group to form a dielectric material exhibiting excellent step coverage and improved leakage current characteristics.

Abstract translation: 公开了使用原子层沉积（ALD）形成介电材料的方法以及在半导体器件上从这种材料形成电介质层的方法。 ALD方法利用含有至少一个醇化物基团的第一反应物，其被化学吸附在基材的表面上，然后与不含羟基的活化氧化剂反应，形成表现出优异的台阶覆盖率和改善的漏电流特性的电介质材料。

公开(公告)号：US20080185624A1

公开(公告)日：2008-08-07

申请号：US12100042

申请日：2008-04-09

Applicant: Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

Inventor： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

IPC: H01L29/94

CPC classification number: H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75

Abstract: Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening there through on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

Abstract translation: 形成存储电容器的方法包括在半导体衬底上形成具有开口的层间绝缘层，在开口中形成接触插塞，在层间绝缘层和接触插塞上形成模制氧化物层，选择性地去除部分 模制氧化物层以在接触塞上方形成凹陷，在凹陷的底表面和侧表面上形成钛层，在钛层上形成氮化钛层，并在氮化钛层上形成氮氧化钛层。 存储电容器包括半导体衬底，在衬底上具有接触插塞的层间绝缘层，以及包括钛硅化物层的接触插塞上的存储电极，硅化钛层上的氮化钛层和氧化钛氮化物 层在氮化钛层上。

公开(公告)号：US20070159578A1

公开(公告)日：2007-07-12

申请号：US10587560

申请日：2005-03-25

Applicant: Sung-Tae Kim ,  Ki Yoon ,  Keon Kim ,  Jae Jung

Inventor： Sung-Tae Kim ,  Ki Yoon ,  Keon Kim ,  Jae Jung

IPC: G02F1/1335

CPC classification number: G02F1/133533 ,  G02B5/045 ,  G02B5/3016 ,  G02F1/133536 ,  G02F2201/343

Abstract: The present invention is related to a method of method of manufacture of a reflective polarizing film that can improve brightness of a liquid crystal display device remarkably by making a liquid crystal film that can cover visible light by using cholesteric liquid crystal layers having different selective light-reflection central wavelengths, attaching a quarter wave (¼ λ) retardation film on top of the liquid crystal film, and adding prism patterns to the opposite side of the liquid crystal film. The reflective polarizing film of the present invention is characterized by that two or more cholesteric liquid crystal layers having different selective reflection wavelength regions are laminated in order from a shorter wavelength to a longer wavelength, and brightness of a liquid crystal display device is maximized owing to an integrated film manufactured by attaching a ¼ λ retardation film onto cholesteric liquid crystal layers and forming prism patterns onto the opposite side.

Abstract translation: 本发明涉及一种反射型偏振片的制造方法，其特征在于，通过使用具有不同选择性发光的胆甾醇型液晶层，制造可以覆盖可见光的液晶膜，能够显着提高液晶显示装置的亮度， 反射中心波长，在液晶膜的顶部附加四分之一波（1/4）延迟膜，并将棱镜图案添加到液晶膜的相对侧。 本发明的反射偏光膜的特征在于，具有不同选择反射波长区域的两个以上的胆甾型液晶层从短波长到较长波长的顺序层叠，并且由于液晶显示装置的亮度由于 通过将1/4英寸延迟膜附着到胆甾醇型液晶层上并将棱镜图案形成在相对侧上而制成的集成膜。

公开(公告)号：US20070145485A1

公开(公告)日：2007-06-28

申请号：US11713160

申请日：2007-03-02

Applicant: Se-Hoon Oh ,  Jung-Hee Chung ,  Jae-Hyoung Choi ,  Jeong-Sik Choi ,  Sung-Tae Kim ,  Cha-Young Yoo

Inventor： Se-Hoon Oh ,  Jung-Hee Chung ,  Jae-Hyoung Choi ,  Jeong-Sik Choi ,  Sung-Tae Kim ,  Cha-Young Yoo

IPC: H01L23/62

CPC classification number: H01L27/10855 ,  H01L21/76889 ,  H01L21/76895 ,  H01L27/10817 ,  H01L27/10894 ,  H01L27/10897

Abstract: Integrated circuit devices, for example, dynamic random access memory (DRAM) devices, are provided including an integrated circuit substrate having a cell array region and a peripheral circuit region. A buried contact plug is provided on the integrated circuit substrate in the cell array region and a resistor is provided on the integrated circuit substrate in the peripheral circuit region. A first pad contact plug is provided on the buried contact plug in the cell array region and a second pad contact plug is provided on the resistor in the peripheral circuit region. An ohmic layer is provided between the first pad contact plug and the buried contact plug and between the second pad contact plug and the resistor. Related methods of fabricating integrated circuit devices are also provided.

Abstract translation: 提供集成电路器件，例如动态随机存取存储器（DRAM）器件，其包括具有单元阵列区域和外围电路区域的集成电路衬底。 在单元阵列区域中的集成电路基板上设置埋入式接触插塞，并且在外围电路区域中的集成电路基板上设置电阻器。 第一焊盘接触插头设置在电池阵列区域中的埋入式接触插塞上，并且在外围电路区域中的电阻器上设置第二焊盘接触插头。 在第一焊盘接触插塞和埋地接触插头之间以及第二焊盘接触插头和电阻器之间提供欧姆层。 还提供了制造集成电路器件的相关方法。

公开(公告)号：US20070123069A1

公开(公告)日：2007-05-31

申请号：US11637267

申请日：2006-12-12

Applicant: Je-Ir Choi ,  Sung-Tae Kim

Inventor： Je-Ir Choi ,  Sung-Tae Kim

IPC: H01R12/00

CPC classification number: H05K13/0084

Abstract: Disclosed is a clip ribbon and apparatus for splicing surface mount device carrier tapes. The clip ribbon has a plurality of clips used for splicing carrier tapes are connected to one another in a line. The apparatus for splicing device carrier tapes has a tool for splicing the carrier tapes with a clip supplied from a roll of the clip ribbon. The tool is fixed to a frame to improve the speed and accuracy of the splicing process.

Abstract translation: 公开了用于拼接表面安装装置载带的夹带和装置。 夹带用于拼接载带的多个夹具在一条线上彼此连接。 用于拼接装置载带的装置具有用于从夹带的卷提供的夹子拼接载带的工具。 该工具固定在一个框架上，以提高拼接过程的速度和准确性。

公开(公告)号：US20060141695A1

公开(公告)日：2006-06-29

申请号：US11285555

申请日：2005-11-22

Applicant: Dae-Sik Choi ,  Kyoung-Ryul Yoon ,  Han-Mei Choi ,  Ki-Yeon Park ,  Seung-Hwan Lee ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo

Inventor： Dae-Sik Choi ,  Kyoung-Ryul Yoon ,  Han-Mei Choi ,  Ki-Yeon Park ,  Seung-Hwan Lee ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo

IPC: H01L21/8238

CPC classification number: H01L21/02205 ,  C23C16/405 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/28194 ,  H01L21/28273 ,  H01L21/3142 ,  H01L21/31641 ,  H01L21/31645 ,  H01L27/11521 ,  H01L29/4933 ,  H01L29/517 ,  H01L29/78

Abstract: Methods of forming a zirconium hafnium oxide thin layer on a semiconductor substrate by supplying tetrakis(ethylmethylamino)zirconium ([Zr{N(C2H5)(CH3)}4], TEMAZ) and tetrakis(ethylmethylamino)hafnium ([Hf{N(C2H5)(CH3)}4], TEMAH) to a substrate are provided. The TEMAZ and the TEMAH may be reacted with an oxidizing agent. The thin layer including zirconium hafnium oxide may be used for a gate insulation layer in a gate structure, a dielectric layer in a capacitor, or a dielectric layer in a flash memory device.

Abstract translation: 在半导体衬底上形成锆氧化铪薄层的方法是将四（乙基甲基氨基）锆（[Zr（N 2 H 5 H 5） 3（H 2 O）2，H 2 O 3（H 2 O 3）3，TEMAZ）和四（乙基甲基氨基）铪（[Hf（N（C 2 H 5） （CH 3 3）} 4 S，TEMAH）提供给基板。 TEMAZ和TEMAH可与氧化剂反应。 包括氧化铪的薄层可以用于栅极结构中的栅极绝缘层，电容器中的电介质层或闪存器件中的介电层。

公开(公告)号：US20060094191A1

公开(公告)日：2006-05-04

申请号：US11261737

申请日：2005-10-28

Applicant: Han-Mei Choi ,  Kyoung-Ryul Yoon ,  Seung-Hwan Lee ,  Ki-Yeon Park ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo

Inventor： Han-Mei Choi ,  Kyoung-Ryul Yoon ,  Seung-Hwan Lee ,  Ki-Yeon Park ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo

IPC: H01L21/336 ,  H01L21/3205

CPC classification number: H01L21/0228 ,  H01L21/02189 ,  H01L21/28273 ,  H01L21/3141 ,  H01L21/31641 ,  H01L27/11521

Abstract: A method of manufacturing a semiconductor device can include forming a tunnel oxide layer on a substrate, forming a floating gate on the tunnel oxide layer and forming a dielectric layer pattern on the floating gate using an ALD process. The dielectric layer pattern can include a metal precursor that includes zirconium and an oxidant. A control gate can be formed on the dielectric layer pattern. The semiconductor device can include the dielectric layer pattern provided herein.

Abstract translation: 制造半导体器件的方法可以包括在衬底上形成隧道氧化物层，在隧道氧化物层上形成浮栅，并使用ALD工艺在浮栅上形成电介质层图案。 介电层图案可以包括包含锆和氧化剂的金属前体。 可以在电介质层图案上形成控制栅极。 半导体器件可以包括本文提供的电介质层图案。