公开(公告)号：US20080284366A1

公开(公告)日：2008-11-20

申请号：US11748054

申请日：2007-05-14

申请人： David T. Fu ,  Wei D. Wang

发明人： David T. Fu ,  Wei D. Wang

IPC分类号： G05B1/06

CPC分类号： G01D18/00 ,  G01D3/08 ,  H03M1/1071 ,  H03M1/485

摘要： Apparatus and methods are provided for diagnosing faults in multiple, associated motor-resolver systems. One apparatus includes a swapping circuit coupling a first resolver to a first or second decoder, and a swapping circuit coupling a second resolver to the first or second decoder. One method includes applying a signal from a resolver to a first decoder to determine that the first decoder is malfunctioning if the first decoder continues to generate a fault signal, and applying a signal from a different resolver to a second decoder to determine that a motor associated with the first decoder is malfunctioning if the second decoder generates a fault signal. Another method includes transmitting a signal from a resolver to first and second decoders, transmitting a signal from a different resolver to the first and second decoders, and determining if the first decoder, second decoder, a first motor, or a second motor is malfunctioning.

摘要翻译： 提供了用于诊断多个相关联的电动机 - 解算器系统中的故障的装置和方法。 一种装置包括将第一解析器耦合到第一或第二解码器的交换电路和将第二解析器耦合到第一或第二解码器的交换电路。 一种方法包括：将来自解算器的信号应用于第一解码器，以确定第一解码器是否故障，如果第一解码器继续产生故障信号，以及将来自不同解析器的信号施加到第二解码器，以确定电动机相关联 如果第二解码器产生故障信号，则第一解码器出现故障。 另一种方法包括将来自解算器的信号发送到第一和第二解码器，将来自不同分解器的信号发送到第一和第二解码器，以及确定第一解码器，第二解码器，第一电动机或第二电动机是否发生故障。

公开(公告)号：US06899796B2

公开(公告)日：2005-05-31

申请号：US10428476

申请日：2003-05-01

申请人： Wei D. Wang ,  Anantha K. Subramani ,  Jianming Fu ,  Praburam Gopalraja ,  Jick M. Yu ,  Fusen Chen

发明人： Wei D. Wang ,  Anantha K. Subramani ,  Jianming Fu ,  Praburam Gopalraja ,  Jick M. Yu ,  Fusen Chen

IPC分类号： C23C14/04 ,  C23C14/34 ,  C23C14/54 ,  H01L21/285 ,  H01L21/768 ,  B05D1/36

CPC分类号： C23C14/046 ,  C23C14/185 ,  C23C14/345 ,  C23C14/3492 ,  C23C14/541 ,  H01L21/2855 ,  H01L21/76844 ,  H01L21/76865 ,  H01L21/76877

摘要： A two-step method of filling copper into a high-aspect ratio via or dual-damascene structure. The first step sputters at a low temperature of no more than 100° C. and with at least portions of high wafer bias, thereby filling a lower half of the hole. The initial copper sputtering is preferably performed through multiple cycles of low-level and high-level pedestal bias to deposit copper on exposed corners and to sputter resulting overhangs from the corners while depositing deep in the hole. The second step may include either electrochemical plating or sputtering performed at a higher temperature, e.g., at least 200° C. and with lower wafer bias to complete the hole filling. In another aspect of the invention, diffusion promoting gas such as hydrogen is added to the copper sputter plasma.

摘要翻译： 将铜填充到高纵横比或双镶嵌结构的两步法。 第一步在不超过100℃的低温下进行喷射，并且至少部分高晶片偏置，从而填充孔的下半部分。 初始铜溅射优选通过多个低水平和高水平基座偏压的周期进行，以在暴露的拐角上沉积铜，并且在沉积在孔中深处时从角部溅射所得到的突出端。 第二步可以包括在较高温度例如至少200℃进行的电化学电镀或溅射，并且具有较低的晶片偏置以完成孔填充。 在本发明的另一方面，将扩散促进气体如氢气加入到铜溅射等离子体中。

公开(公告)号：US08676434B2

公开(公告)日：2014-03-18

申请号：US12908177

申请日：2010-10-20

申请人： Wei D. Wang ,  Harry J. Bauer ,  Jeffrey David ,  Wei Ren

发明人： Wei D. Wang ,  Harry J. Bauer ,  Jeffrey David ,  Wei Ren

IPC分类号： G06F11/30 ,  G06F19/00 ,  G01M17/00 ,  H03K23/00

CPC分类号： G05B23/0235 ,  B60K6/48 ,  B60L3/0038 ,  B60L3/0061 ,  B60L3/0084 ,  B60L3/12 ,  B60L2240/423 ,  B60L2240/429 ,  B60L2260/40 ,  B60W20/50 ,  B60W50/0205 ,  B60W50/038 ,  Y02T10/6221 ,  Y02T10/642

摘要： A vehicle includes electrical components, current sensors which determine current flowing through the electrical components, and a control system. The control system calculates and records error index values over an interval using the currents. The control system increments a first counter with every sample in the series, increments a second counter whenever a given error index value exceeds a calibrated high threshold, and decrements the second counter whenever the given error index value is less than a calibrated low threshold. A control action, e.g., recording a PASS or FAIL value, executes when either the absolute value of the second counter or the present value of the first counter reaches a corresponding limit or threshold. A method enhances the robustness of a hybrid vehicle torque security diagnostic using the control system. The vehicle and method use a signed X of Y debouncing or error signal processing method as noted above.

摘要翻译： 车辆包括电气部件，确定流过电气部件的电流的电流传感器和控制系统。 控制系统使用电流计算和记录间隔上的误差指数值。 控制系统对串联中的每个采样增加第一个计数器，只要给定的误差指数值超过校准的高阈值，就增加第二个计数器，并且每当给定的误差指数值小于校准的低阈值时，递减第二个计数器。 当第二计数器的绝对值或第一计数器的当前值达到相应的极限或阈值时，执行例如记录PASS或FAIL值的控制动作。 一种方法提高了使用控制系统的混合动力车辆扭矩安全诊断的鲁棒性。 车辆和方法使用如上所述的带符号X的Y去抖动或误差信号处理方法。

公开(公告)号：US08558299B2

公开(公告)日：2013-10-15

申请号：US13157164

申请日：2011-06-09

申请人： Yong Cao ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

发明人： Yong Cao ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

IPC分类号： H01L29/788

CPC分类号： H01L21/28079 ,  C23C14/165 ,  C23C14/345 ,  C23C14/35 ,  H01L21/28088 ,  H01L21/2855 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/78

摘要： Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

摘要翻译： 本文所述的实施例提供了一种半导体器件及其形成方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 栅极电极堆叠包括在栅极介电层上的导电膜层，导电膜层上的难熔金属氮化物膜层，难熔金属氮化物膜层上的含硅膜层，以及硅 - 含有膜层。 在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化物膜层，在难熔金属氮化物膜层上沉积含硅膜层，并在含硅膜层上沉积钨膜层。

公开(公告)号：US20130139878A1

公开(公告)日：2013-06-06

申请号：US13266738

申请日：2011-04-07

申请人： Yashraj K. Bhatnagar ,  Brenden McComb ,  Xiao Ming ,  Deepak Jadhav ,  Anantha K. Subramani ,  Wei D. Wang ,  Jianshe Tang

发明人： Yashraj K. Bhatnagar ,  Brenden McComb ,  Xiao Ming ,  Deepak Jadhav ,  Anantha K. Subramani ,  Wei D. Wang ,  Jianshe Tang

IPC分类号： H01L31/18 ,  H01L31/0224 ,  H01L31/04

CPC分类号： H01L31/1884 ,  H01L31/022483 ,  H01L31/0392 ,  H01L31/04 ,  H01L31/076 ,  H01L31/1864 ,  Y02E10/548

摘要： Embodiments of the invention provide a method for forming a solar cell including forming a layer comprising alumina on a substrate and forming a transparent conductive layer on the layer comprising alumina. The method may also include forming a transparent conductive seed layer on the layer comprising alumina and forming a transparent conductive bulk layer on the transparent conductive seed layer. Embodiments of the invention also include photovoltaic devices having a substrate, a layer comprising alumina adjacent to the substrate, a zinc oxide-containing transparent conductive seed layer adjacent to the layer comprising alumina, and a zinc oxide-containing transparent conductive bulk layer adjacent the zinc oxide-containing transparent conductive seed layer.

摘要翻译： 本发明的实施例提供了一种形成太阳能电池的方法，包括在基底上形成包含氧化铝的层，并在包含氧化铝的层上形成透明导电层。 该方法还可以包括在包含氧化铝的层上形成透明导电籽晶层，并在透明导电种子层上形成透明导电体层。 本发明的实施例还包括具有基底的光伏器件，与基底相邻的氧化铝层，与氧化铝相邻的含氧化锌的透明导电籽晶层和与锌相邻的含氧化锌的透明导电体层 含氧化物的透明导电种子层。

公开(公告)号：US20120084039A1

公开(公告)日：2012-04-05

申请号：US12895924

申请日：2010-10-01

申请人： Wei D. Wang ,  Steven E. Schulz ,  Jeffrey David ,  Jackie L. Cui ,  Andrew M. Zettel ,  Hanne Buur

发明人： Wei D. Wang ,  Steven E. Schulz ,  Jeffrey David ,  Jackie L. Cui ,  Andrew M. Zettel ,  Hanne Buur

IPC分类号： G01D18/00

CPC分类号： G01D18/006

摘要： A method includes detecting a first event and executing a first procedure to identify a sensor offset in response to detecting the first event. The method further includes determining, via a computing device, whether the sensor offset was measured during the execution of the first procedure, scheduling a second procedure to execute in response to detecting a second event if the sensor offset was not measured during the first procedure, and scheduling the first procedure to execute in response to detecting a subsequent occurrence of the first event if the sensor offset was measured during the first procedure.

摘要翻译： 一种方法包括检测第一事件并且执行第一过程以响应于检测到第一事件来识别传感器偏移。 该方法还包括经由计算设备确定在执行第一过程期间是否测量了传感器偏移量，如果在第一过程期间未测量传感器偏移量，则调度响应于检测到第二事件执行的第二过程， 以及如果在所述第一过程期间测量了所述传感器偏移量，则响应于检测到所述第一事件的后续出现来调度执行所述第一过程。

公开(公告)号：US20110303960A1

公开(公告)日：2011-12-15

申请号：US13157164

申请日：2011-06-09

申请人： YONG CAO ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

发明人： YONG CAO ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

IPC分类号： H01L29/788 ,  H01L21/283 ,  C23C14/34 ,  H01L21/3205

CPC分类号： H01L21/28079 ,  C23C14/165 ,  C23C14/345 ,  C23C14/35 ,  H01L21/28088 ,  H01L21/2855 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/78

摘要： Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

摘要翻译： 本文所述的实施例提供了一种半导体器件及其形成方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 栅极电极堆叠包括在栅极电介质层上的导电膜层，导电膜层上的难熔金属氮化物膜层，难熔金属氮化物膜层上的含硅膜层，以及硅 - 含有膜层。 在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化物膜层，在难熔金属氮化物膜层上沉积含硅膜层，并在含硅膜层上沉积钨膜层。

公开(公告)号：US20090105898A1

公开(公告)日：2009-04-23

申请号：US12247327

申请日：2008-10-08

申请人： Peter E. Wu ,  Charles J. Van Horn ,  Wei D. Wang ,  Syed Naqi

发明人： Peter E. Wu ,  Charles J. Van Horn ,  Wei D. Wang ,  Syed Naqi

IPC分类号： G06F7/00

CPC分类号： B60W20/50 ,  B60K1/02 ,  B60K6/365 ,  B60K6/40 ,  B60K6/445 ,  B60K6/547 ,  B60L2240/421 ,  B60L2240/441 ,  B60L2240/443 ,  B60L2240/486 ,  B60W20/00 ,  B60W50/02 ,  B60W2510/0638 ,  B60W2510/0657 ,  B60W2510/081 ,  B60W2510/1015 ,  B60W2540/10 ,  B60W2540/12 ,  F16H2037/0873 ,  Y02T10/6239 ,  Y02T10/642 ,  Y10T477/23 ,  Y10T477/33

摘要： A method for detecting speed faults in a hybrid powertrain having engine and electric machine speed inputs includes directly sensing the engine and machine speeds and performing comparisons of sensed engine speed with engine speed determined based upon the machine speeds.

摘要翻译： 用于检测具有发动机和电机速度输入的混合动力传动系中的速度故障的方法包括直接感测发动机和机器速度，并且将感测的发动机速度与基于机器速度确定的发动机转速进行比较。

公开(公告)号：US20080278106A1

公开(公告)日：2008-11-13

申请号：US11747548

申请日：2007-05-11

申请人： David T. Fu ,  Wei D. Wang ,  Steven E. Schulz

发明人： David T. Fu ,  Wei D. Wang ,  Steven E. Schulz

IPC分类号： G03B27/42

CPC分类号： G03B27/42 ,  G01D5/204

摘要： An apparatus, system, and method are provided for simulating outputs of a resolver. One apparatus includes an adjustable sine waveform generator for simulating first and second sine wave signals, and an adjustable cosine waveform generator for simulating first and cosine wave signals. The apparatus also includes an adjustable waveform generator and an adjustable gain circuit coupled to the sine waveform generator and cosine waveform generator. The system includes a device simulating a resolver coupled to a motor controller. The device includes an adjustable sine waveform generator and an adjustable cosine waveform generator coupled to an adjustable waveform generator and an adjustable gain circuit. One method includes transmitting a signal simulating at least one resolver fault condition to a motor controller to determine if the motor controller detects the fault condition(s). If the motor controller fails to detect the fault condition(s) and/or transmit an error message, the motor controller is malfunctioning.

摘要翻译： 提供了一种用于模拟分解器的输出的装置，系统和方法。 一种装置包括用于模拟第一和第二正弦波信号的可调正弦波形发生器和用于模拟第一和余弦波信号的可调余弦波形发生器。 该装置还包括可调波形发生器和耦合到正弦波形发生器和余弦波形发生器的可调增益电路。 该系统包括模拟与马达控制器耦合的旋转变压器的装置。 该装置包括可调正弦波形发生器和耦合到可调波形发生器和可调增益电路的可调余弦波形发生器。 一种方法包括将模拟至少一个分解器故障状况的信号发送到电动机控制器以确定电动机控制器是否检测到故障状况。 如果电机控制器无法检测到故障状况和/或发送错误信息，则电机控制器发生故障。

公开(公告)号：US06730196B2

公开(公告)日：2004-05-04

申请号：US10210953

申请日：2002-08-01

申请人： Wei D. Wang ,  Praburam Gopalraja ,  Jianming Fu

发明人： Wei D. Wang ,  Praburam Gopalraja ,  Jianming Fu

IPC分类号： C23C1435

CPC分类号： H01J37/3455 ,  C23C14/046 ,  C23C14/165 ,  C23C14/358 ,  H01J37/3405 ,  H01L21/76877

摘要： A magnetron sputter reactor having a complexly shaped target with a vault arranged about a central axis facing the wafer. The vault may be right cylindrical with axially magnetized magnets disposed in back of its sidewall or be annular with preferably opposed magnets disposed in back of its two sidewalls. One or two electromagnetic coils are disposed about the processing space between the target and the wafer to either promote extraction of metal ions from the vault, to defocus the ion beam extracted from the vault and focused towards the central axis, or to compensate for a magnetic shield surrounding the reactor.