ACOUSTIC WAVE DEVICE
    42.
    发明公开

    公开(公告)号:US20240258987A1

    公开(公告)日:2024-08-01

    申请号:US18611883

    申请日:2024-03-21

    发明人: Takashi YAMANE

    IPC分类号: H03H9/05 H03H9/17

    CPC分类号: H03H9/0523 H03H9/173

    摘要: An acoustic wave device includes a mounting substrate; an acoustic wave element on one major surface of the mounting substrate in its thickness direction, and a bump between the acoustic wave element and the mounting substrate. The acoustic wave element includes a support substrate including an air gap, a piezoelectric layer stacked on the support substrate and including an overlap region at least partially overlapping the air gap as viewed in the stacking direction, and a functional electrode located in the overlap region of the piezoelectric layer. The mounting substrate includes a metal portion. A fixed capacitance generated between the acoustic wave element and the mounting substrate is not less than a variable capacitance generated between the acoustic wave element and the mounting substrate.

    BULK ACOUSTIC WAVE RESONATOR AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20240204746A1

    公开(公告)日:2024-06-20

    申请号:US18422383

    申请日:2024-01-25

    摘要: A bulk acoustic wave resonator and method for manufacturing the same, the bulk acoustic wave resonator includes: a piezoelectric layer; a first electrode layer, a carrier structure, and first and second conductive connectors disposed on a first side of the piezoelectric layer, and a second electrode layer, an interconnection pad and a cover structure disposed on a second side of the piezoelectric layer, wherein the first electrode layer includes a first electrode and an additional electrode electrically isolated from each other; the second electrode layer includes a second electrode; the interconnection pad is electrically connected to the second electrode and the additional electrode; a first cavity is disposed between the carrier structure and the piezoelectric layer; the first conductive connector is electrically connected to the first electrode, the second conductive connector is electrically connected to the second electrode through the additional electrode and the interconnection pad.

    Chip packaging method and particle chips

    公开(公告)号:US11683020B2

    公开(公告)日:2023-06-20

    申请号:US17718799

    申请日:2022-04-12

    发明人: Jian Wang

    IPC分类号: H03H9/10 H03H3/02 H03H9/05

    摘要: A method for packaging chips includes: flip-chip bonding a plurality of filter chips to be packaged on a substrate to be packaged; applying a first mold material layer on the filter chips to be packaged; applying a second mold material layer on a side of the first mold material layer away from the filter chip to be packaged, the first mold material layer and the second mold material layer forming a first mold layer; thinning the first mold material layer and the second mold material layer to expose substrates of the filter chips to be packaged, and thinning the substrates of the filter chips to be packaged to a preset thickness; applying a second mold layer on the exposed substrates of the filter chips to be packaged to obtain a mold structure; and cutting the mold structure into a plurality of particle chips.

    METHOD OF FABRICATION FOR SINGLE CRYSTAL PIEZOELECTRIC RF RESONATORS AND FILTERS

    公开(公告)号:US20180275485A1

    公开(公告)日:2018-09-27

    申请号:US15679879

    申请日:2017-08-17

    申请人: Dror Hurwitz

    发明人: Dror Hurwitz

    摘要: 1. A method of fabricating an RF filter comprising an array of resonators comprising the steps of: Obtaining a removable carrier with release layer; Growing a piezoelectric film on a removable carrier; Applying a first electrode to the piezoelectric film; Obtaining a backing membrane on a cover, with or without prefabricated cavities between the backing film and cover; Attaching the backing membrane to the first electrode; Detaching the removable carrier; Measuring and trimming the piezoelectric film as necessary; Selectively etching away the piezoelectric layer to fabricate discrete resonator islands; Etching down through coatings and backing membrane to a silicon dioxide layer between the backing membrane and the cover to form trenches; Applying a passivation layer into the trenches and around the piezoelectric islands; Depositing a second electrode layer over the piezoelectric film islands and surrounding passivation layer; Applying connections for subsequent electrical coupling to an interposer; Selectively removing second electrode material leaving coupled resonator arrays; Creating a gasket around perimeter of the resonator array; Thinning down cover to desired thickness; Optionally fabricating upper cavities between the backing membrane and cover by drilling holes through the cover and then selectively etching away the silicon dioxide; Dicing the wafer into flip chip single unit filter arrays; Obtaining an interposer; Optionally applying a dam to the interposer surface to halt overfill flow; Coupling the flip chip single unit filter array to pads of the interposer by reflow of the solder cap; Encapsulating with polymer underfill/overfill; and Singulating into separate filter modules, wherein wherein the piezoelectric layer comprises a mixed AlN single crystal layer a c-axis orientation.