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    Semiconductor device including dummy gate part and method of fabricating the same
    51.
    发明授权
    Semiconductor device including dummy gate part and method of fabricating the same 有权
    半导体器件包括伪栅极部分及其制造方法

    公开(公告)号：US08053845B2

    公开(公告)日：2011-11-08

    申请号：US12291211

    申请日：2008-11-07

    申请人： Byoung-ho Kwon ,  Sang-youn Jo ,  Jin-sook Choi ,  Chang-ki Hong ,  Bo-un Yoon ,  Hong-soo Kim ,  Se-rah Yun

    发明人： Byoung-ho Kwon ,  Sang-youn Jo ,  Jin-sook Choi ,  Chang-ki Hong ,  Bo-un Yoon ,  Hong-soo Kim ,  Se-rah Yun

    IPC分类号： H01L21/70

    CPC分类号： H01L21/31053 ,  H01L27/105 ,  H01L27/1052 ,  H01L29/66545

    摘要： In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including a cell region and a peripheral region surrounding the cell region, a plurality of dummy active regions surrounded by a device isolating region and formed apart from each other, and a plurality of dummy gate parts formed on the dummy active regions and on the device isolating regions located between the dummy active regions, wherein each of the dummy gate parts covers two or more of the dummy active regions.

    摘要翻译： 在可靠的半导体器件和制造半导体器件的方法中，通过优化虚拟栅极部分来最小化单元区域的上表面与外围区域之间的高度差（也称为电平差）。 半导体器件包括：半导体衬底，包括单元区域和围绕单元区域的周边区域;多个虚设有源区域，被器件隔离区域包围并形成为彼此分离;多个虚拟栅极部件，形成在虚拟区域上; 有源区域和位于虚拟有源区域之间的器件隔离区域，其中每个伪栅极部分覆盖两个或更多个虚拟有源区域。

    Semiconductor memory device and method of fabricating the same
    52.
    发明授权
    Semiconductor memory device and method of fabricating the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US08008742B2

    公开(公告)日：2011-08-30

    申请号：US12457500

    申请日：2009-06-12

    申请人： Hong-soo Kim ,  Su-in Baek ,  Seung-wook Choi

    发明人： Hong-soo Kim ,  Su-in Baek ,  Seung-wook Choi

    IPC分类号： H01L21/762

    CPC分类号： H01L27/11573 ,  H01L21/76229 ,  H01L27/11526 ,  H01L27/11531

    摘要： Provided are a semiconductor memory device whereby generation of dishing during planarization of a peripheral circuit region is suppressed, and a method of fabricating the semiconductor memory device. The semiconductor memory device includes a semiconductor substrate comprising a first active area in a memory cell region and a second active area in a peripheral circuit region; a plurality of first isolation films and a plurality of second isolation films protruding from a surface of the semiconductor substrate and defining the first active area and the second active area, respectively; and at least one polish stopper film formed within the second active area and protruding from the surface of the semiconductor substrate.

    摘要翻译： 提供了一种半导体存储器件，其中抑制了在外围电路区域的平坦化期间产生凹陷，以及制造半导体存储器件的方法。 半导体存储器件包括半导体衬底，其包括存储单元区域中的第一有源区和外围电路区中的第二有源区; 多个第一隔离膜和多个第二隔离膜，分别从半导体衬底的表面突出并限定第一有源区和第二有源区; 以及形成在第二有源区域内并从半导体衬底的表面突出的至少一个抛光阻挡膜。

    FLASH MEMORY DEVICE ADAPTED TO PREVENT READ FAILURES DUE TO DUMMY STRINGS
    53.
    发明申请
    FLASH MEMORY DEVICE ADAPTED TO PREVENT READ FAILURES DUE TO DUMMY STRINGS 有权
    闪存存储器件适用于预防由于DUMMY STRINGS而导致的读取故障

    公开(公告)号：US20090262580A1

    公开(公告)日：2009-10-22

    申请号：US12495971

    申请日：2009-07-01

    申请人： Pan-Suk KWAK ,  Hong-Soo KIM

    发明人： Pan-Suk KWAK ,  Hong-Soo KIM

    IPC分类号： G11C16/04

    CPC分类号： G11C16/3418

    摘要： In a NAND flash memory device, a dummy NAND string is arranged between a plurality of normal NAND strings. A dummy bit line connected to the dummy NAND string is formed and/or controlled such that when program voltages are applied to the normal NAND strings, memory cells within the dummy NAND string are not programmed.

    摘要翻译： 在NAND闪存器件中，虚拟NAND串被布置在多个正常NAND串之间。 形成和/或控制连接到虚拟NAND串的虚拟位线，使得当将程序电压施加到常规NAND串时，虚拟NAND串内的存储器单元不被编程。

    CATALYST SUPPORT USING CELLULOSE FIBERS, PREPARATION METHOD THEREOF, SUPPORTED CATALYST COMPRISING NANO-METAL CATALYST SUPPORTED ON CARBON NANOTUBES DIRECTLY GROWN ON SURFACE OF THE CATALYST SUPPORT, AND METHOD OF PREPARING THE SUPPORTED CATALYST
    54.
    发明申请
    CATALYST SUPPORT USING CELLULOSE FIBERS, PREPARATION METHOD THEREOF, SUPPORTED CATALYST COMPRISING NANO-METAL CATALYST SUPPORTED ON CARBON NANOTUBES DIRECTLY GROWN ON SURFACE OF THE CATALYST SUPPORT, AND METHOD OF PREPARING THE SUPPORTED CATALYST 有权
    使用纤维素纤维的催化剂支持，其制备方法，包含支持催化剂表面直接固化在碳纳米管上的纳米金属催化剂的支持催化剂，以及制备支持的催化剂的方法

    公开(公告)号：US20090176646A1

    公开(公告)日：2009-07-09

    申请号：US12166513

    申请日：2008-07-02

    申请人： Hee Yeon Kim ,  Seong Ok Han ,  Hong Soo Kim ,  Nam Jo Jeong

    发明人： Hee Yeon Kim ,  Seong Ok Han ,  Hong Soo Kim ,  Nam Jo Jeong

    IPC分类号： B01J27/20 ,  C23C16/22

    CPC分类号： B01J21/185 ,  B01J23/40 ,  B01J23/42 ,  B01J37/084 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  D01F9/16 ,  D21C5/00 ,  D21C9/004

    摘要： Disclosed are a porous catalyst support for maximizing an increase in catalytic reaction activity and a method of preparing a nano-metal-supported catalyst using the same. The method includes splitting cellulose fibers, thus preparing a catalyst support, growing carbon nanotubes on the prepared catalyst support, and supporting a nano-metal catalyst on the catalyst support having the carbon nanotubes grown thereon. A nano-metal-supported catalyst including the cellulose catalyst support and the use of cellulose fibers as the catalyst support for supporting the nano-metal catalyst are also provided. When porous cellulose fibers having a plurality of micropores are used as material for the catalyst support for supporting a nano-metal catalyst, the preparation cost of the catalyst is reduced and the increase in catalytic reaction activity is maximized even with the use of a small amount thereof in various catalytic reactions. A technique for directly growing carbon nanotubes is applied, thereby controlling the electrical conductivity of the catalyst and increasing the surface area, and further, an expensive nano-metal catalyst component can be easily collected after the reaction, resulting in eco-friendly properties.

    摘要翻译： 公开了用于最大化催化反应活性增加的多孔催化剂载体和使用其制备纳米金属负载型催化剂的方法。 该方法包括分解纤维素纤维，从而制备催化剂载体，在所制备的催化剂载体上生长碳纳米管，并在其上生长有碳纳米管的催化剂载体上负载纳米金属催化剂。 还提供了包括纤维素催化剂载体和使用纤维素纤维作为支撑纳米金属催化剂的催化剂载体的纳米金属负载型催化剂。 当具有多个微孔的多孔纤维素纤维用作用于支撑纳米金属催化剂的催化剂载体的材料时，催化剂的制备成本降低，并且即使使用少量催化反应活性的增加也最大化 在各种催化反应中。 应用直接生长碳纳米管的技术，从而控制催化剂的导电性和增加表面积，并且在反应后可以容易地收集昂贵的纳米金属催化剂组分，从而获得环保性质。

    Methods of fabricating a semiconductor device having multi-gate insulation layers and semiconductor devices fabricated thereby
    55.
    发明授权
    Methods of fabricating a semiconductor device having multi-gate insulation layers and semiconductor devices fabricated thereby 有权
    制造具有多栅极绝缘层的半导体器件和由此制造的半导体器件的方法

    公开(公告)号：US07508048B2

    公开(公告)日：2009-03-24

    申请号：US10758802

    申请日：2004-01-15

    申请人： Dae-Woong Kang ,  Hong-Soo Kim ,  Jung-Dal Choi ,  Kyu-Charn Park ,  Seong-Soon Cho ,  Yong-Sik Yim ,  Sung-Nam Chang

    发明人： Dae-Woong Kang ,  Hong-Soo Kim ,  Jung-Dal Choi ,  Kyu-Charn Park ,  Seong-Soon Cho ,  Yong-Sik Yim ,  Sung-Nam Chang

    IPC分类号： H01L29/00

    CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L27/11526 ,  H01L27/11543

    摘要： Methods of fabricating a semiconductor device having multi-gate insulation layers and semiconductor devices fabricated thereby are provided. The method includes forming a pad insulation layer and an initial high voltage gate insulation layer on a first region and a second region of a semiconductor substrate respectively. The initial high voltage gate insulation layer is formed to be thicker than the pad insulation layer. A first isolation layer that penetrates the pad insulation layer and is buried in the semiconductor substrate is formed to define a first active region in the first region, and a second isolation layer that penetrates the initial high voltage gate insulation layer and is buried in the semiconductor substrate is formed to define a second active region in the second region. The pad insulation layer is then removed to expose the first active region. A low voltage gate insulation layer is formed on the exposed first active region. Accordingly, it can minimize a depth of recessed regions (dent regions) to be formed at edge regions of the first isolation layer during removal of the pad insulation layer, and it can prevent dent regions from being formed at edge regions of the second isolation layer.

    摘要翻译： 提供了制造具有多栅极绝缘层的半导体器件和由此制造的半导体器件的方法。 该方法包括分别在半导体衬底的第一区域和第二区域上形成衬垫绝缘层和初始高电压栅极绝缘层。 初始高压栅绝缘层形成为比焊垫绝缘层厚。 形成穿过焊盘绝缘层并被埋在半导体衬底中的第一隔离层，以限定第一区域中的第一有源区和穿过初始高电压栅极绝缘层并被埋在半导体中的第二隔离层 形成衬底以限定第二区域中的第二有源区。 然后去除焊盘绝缘层以露出第一有源区。 在暴露的第一有源区上形成低压栅极绝缘层。 因此，能够最大限度地减少在去除焊盘绝缘层期间在第一隔离层的边缘区域形成的凹陷区域（凹陷区域）的深度，并且可以防止凹陷区域形成在第二隔离层的边缘区域 。

    Method of manufacturing cellulose electrode for fuel cells, cellulose electrode manufactured thereby, and use of cellulose fibers as fuel cell electrodes
    58.
    发明授权
    Method of manufacturing cellulose electrode for fuel cells, cellulose electrode manufactured thereby, and use of cellulose fibers as fuel cell electrodes 有权
    制造燃料电池用纤维素电极的方法，由此制造的纤维素电极，以及使用纤维素纤维作为燃料电池电极

    公开(公告)号：US08221830B2

    公开(公告)日：2012-07-17

    申请号：US12207362

    申请日：2008-09-09

    申请人： Hee Yeon Kim ,  Seong Ok Han ,  Hong Soo Kim ,  Nam Jo Jeong

    发明人： Hee Yeon Kim ,  Seong Ok Han ,  Hong Soo Kim ,  Nam Jo Jeong

    IPC分类号： B05D5/12 ,  C23C16/00

    CPC分类号： H01M4/8817 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  D01F9/16 ,  H01M4/8605 ,  H01M4/8807 ,  H01M4/92

    摘要： Disclosed is a novel cellulose electrode having high performance, which is capable of substituting for carbon paper used as a conventional fuel cell electrode. A method of manufacturing the cellulose electrode includes cutting cellulose fibers to a predetermined length and binding the fibers, or directly weaving the fibers, thus producing a cellulose sheet, directly growing carbon nanotubes on the cellulose sheet, and supporting a platinum nano-catalyst on the surface of the carbon nanotubes using chemical vapor deposition. An electrode including the cellulose fibers and use of cellulose fibers as fuel cell electrodes are also provided. As a novel functional material for fuel cell electrodes, porous cellulose fibers having micropores are used, thereby reducing electrode manufacturing costs and improving electrode performance.

    摘要翻译： 公开了一种具有高性能的新型纤维素电极，其能够代替用作常规燃料电池电极的碳纸。 制造纤维素电极的方法包括将纤维素纤维切割成预定长度并结合纤维，或直接编织纤维，从而生产纤维素片，在纤维素片上直接生长碳纳米管，并在铂纤维素片上支撑铂纳米催化剂 使用化学气相沉积的碳纳米管表面。 还提供了包括纤维素纤维的电极和使用纤维素纤维作为燃料电池电极。 作为燃料电池用电极的新型功能材料，使用具有微孔的多孔纤维素纤维，由此降低电极制造成本，提高电极性能。

    Semiconductor memory device and method of fabricating the same
    60.
    发明申请
    Semiconductor memory device and method of fabricating the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20090309147A1

    公开(公告)日：2009-12-17

    申请号：US12457500

    申请日：2009-06-12

    申请人： Hong-soo Kim ,  Su-in Baek ,  Seung-wook Choi

    发明人： Hong-soo Kim ,  Su-in Baek ,  Seung-wook Choi

    IPC分类号： H01L29/792 ,  H01L27/10 ,  H01L21/762

    CPC分类号： H01L27/11573 ,  H01L21/76229 ,  H01L27/11526 ,  H01L27/11531

    摘要： Provided are a semiconductor memory device whereby generation of dishing during planarization of a peripheral circuit region is suppressed, and a method of fabricating the semiconductor memory device. The semiconductor memory device includes a semiconductor substrate comprising a first active area in a memory cell region and a second active area in a peripheral circuit region; a plurality of first isolation films and a plurality of second isolation films protruding from a surface of the semiconductor substrate and defining the first active area and the second active area, respectively; and at least one polish stopper film formed within the second active area and protruding from the surface of the semiconductor substrate.

    摘要翻译： 提供了一种半导体存储器件，其中抑制了在外围电路区域的平坦化期间产生凹陷，以及制造半导体存储器件的方法。 半导体存储器件包括半导体衬底，其包括存储单元区域中的第一有源区和外围电路区中的第二有源区; 多个第一隔离膜和多个第二隔离膜，分别从半导体衬底的表面突出并限定第一有源区和第二有源区; 以及形成在第二有源区域内并从半导体衬底的表面突出的至少一个抛光阻挡膜。