公开(公告)号：US5250446A

公开(公告)日：1993-10-05

申请号：US959465

申请日：1992-10-09

申请人： Akihiko Osawa ,  Yoshiro Baba ,  Mitsuhiko Kitagawa ,  Tetsujiro Tsunoda

发明人： Akihiko Osawa ,  Yoshiro Baba ,  Mitsuhiko Kitagawa ,  Tetsujiro Tsunoda

IPC分类号： H01L21/322 ,  H01L21/265 ,  H01L29/32

CPC分类号： H01L21/263 ,  H01L21/26506 ,  H01L29/32 ,  Y10S148/128

摘要： A mixture of at least two types of charged particles of ions having the same value obtained by dividing the electric charge of an ion by the mass of the ion, i.e., a mixture of charged particles including hydrogen molecular ions H.sub.2.sup.+ and deuterium ions D.sup.+, is accelerated in a charged particle accelerator. Since the mass spectrograph unit in the accelerator cannot divide the hydrogen molecular ions H.sub.2.sup.+ and the deuterium ion D.sup.+, both ions are accelerated together. When the hydrogen molecular ion H.sub.2.sup.+ collides against a silicon substrate, it is divided into two hydrogen ions 2H.sup.+. Since the hydrogen ion H.sup.+ and the deuterium ion D.sup.+ have different ranges in silicon, two regions including a great number of crystal defects are formed in the silicon substrate in one ion irradiating step. As a result, at least three regions of different lifetimes of carriers are formed at different depths of the semiconductor substrate.

摘要翻译： 将离子电荷除以离子质量，即包含氢分子离子H 2 +和氘离子D +的带电粒子的混合物获得的具有相同值的至少两种类型的带电粒子的混合物是 在带电粒子加速器中加速。 由于加速器中的质谱仪单元不能分离氢分子离子H2 +和氘离子D +，所以两个离子一起被加速。 当氢分子离子H2 +碰撞硅衬底时，它被分为两个氢离子2H +。 由于氢离子H +和氘离子D +在硅中具有不同的范围，因此在一个离子照射步骤中在硅衬底中形成包括大量晶体缺陷的两个区域。 结果，在半导体衬底的不同深度形成载流子寿命不同的至少三个区域。

公开(公告)号：US09024382B2

公开(公告)日：2015-05-05

申请号：US13034443

申请日：2011-02-24

申请人： Mitsuhiko Kitagawa

发明人： Mitsuhiko Kitagawa

IPC分类号： H01L29/78 ,  H01L29/423 ,  H01L29/739 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/7397 ,  H01L29/7825

摘要： According to one embodiment, the semiconductor device includes a drift region, a first semiconductor region, a second semiconductor region, a main electrode, first gate electrodes and a second gate electrode. The first gate electrodes and the second gate electrode between a pair of first gate electrodes are provided in the drift region. The first semiconductor region is provided between the first gate electrodes and the second gate electrode. The first semiconductor region has a first side surface opposite to the one of the adjacent ones and a second side surface partially opposite to the second gate electrode. The second semiconductor region is selectively provided on the first semiconductor region. The main electrode has a portion directly adjacent to part of the second side surface and the second semiconductor region.

摘要翻译： 根据一个实施例，半导体器件包括漂移区，第一半导体区，第二半导体区，主电极，第一栅电极和第二栅电极。 一对第一栅电极之间的第一栅电极和第二栅电极设置在漂移区中。 第一半导体区域设置在第一栅极电极和第二栅极电极之间。 第一半导体区域具有与相邻的一个相对的第一侧表面和与第二栅电极部分相对的第二侧表面。 第二半导体区域选择性地设置在第一半导体区域上。 主电极具有与第二侧表面和第二半导体区域的一部分直接相邻的部分。

公开(公告)号：US08076749B2

公开(公告)日：2011-12-13

申请号：US12030674

申请日：2008-02-13

申请人： Mitsuhiko Kitagawa

发明人： Mitsuhiko Kitagawa

IPC分类号： H01L29/06

CPC分类号： H01L29/861 ,  H01L21/84 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/405 ,  H01L29/407 ,  H01L29/7394 ,  H01L29/7824 ,  H01L29/785 ,  H01L29/8611 ,  H01L33/34

摘要： A semiconductor device includes: a first insulating layer; a semiconductor layer provided on the first insulating layer; a first semiconductor region selectively provided in the semiconductor layer; a second semiconductor region selectively provided in the semiconductor layer and spaced from the first semiconductor region; a first main electrode provided in contact with the first semiconductor region; a second main electrode provided in contact with the second semiconductor region; a second insulating layer provided on the semiconductor layer; a first conductive material provided in the second insulating layer above a portion of the semiconductor layer located between the first semiconductor region and the second semiconductor region; and a second conductive material provided in a trench provided in a portion of the semiconductor layer opposed to the first conductive material, being in contact with the first conductive material, and reaching the first insulating layer.

摘要翻译： 一种半导体器件包括：第一绝缘层; 设置在所述第一绝缘层上的半导体层; 选择性地设置在所述半导体层中的第一半导体区域; 选择性地设置在所述半导体层中并与所述第一半导体区隔开的第二半导体区域; 设置成与所述第一半导体区域接触的第一主电极; 设置成与第二半导体区域接触的第二主电极; 设置在所述半导体层上的第二绝缘层; 设置在位于所述第一半导体区域和所述第二半导体区域之间的所述半导体层的部分上方的所述第二绝缘层中的第一导电材料; 以及设置在与所述第一导电材料相对的所述半导体层的与所述第一导电材料相接触并且到达所述第一绝缘层的部分中的沟槽中的第二导电材料。

公开(公告)号：US20100237457A1

公开(公告)日：2010-09-23

申请号：US12724243

申请日：2010-03-15

申请人： Mitsuhiko KITAGAWA

发明人： Mitsuhiko KITAGAWA

IPC分类号： H01L29/08

CPC分类号： H01L27/088 ,  H01L29/0634 ,  H01L29/0856 ,  H01L29/0878 ,  H01L29/4236 ,  H01L29/7391 ,  H01L29/7394 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/7824 ,  H01L29/7825 ,  H01L29/7828 ,  H01L29/7831 ,  H01L29/7838

摘要： A semiconductor device includes: a semiconductor layer having a first end portion and a second end portion; a first main electrode provided on the first end portion and electrically connected to the semiconductor layer; a second main electrode provided on the second end portion and electrically connected to the semiconductor layer; a first gate electrode provided via a first gate insulating film in a plurality of first trenches formed from the first end portion toward the second end portion; and a second gate electrode provided via a second gate insulating film in a plurality of second trenches formed from the second end portion toward the first end portion. Spacing between a plurality of the first gate electrodes and spacing between a plurality of the second gate electrodes are 200 nm or less.

摘要翻译： 半导体器件包括：具有第一端部和第二端部的半导体层; 第一主电极，设置在第一端部上并与半导体层电连接; 第二主电极，设置在第二端部并与半导体层电连接; 第一栅电极，其经由第一栅极绝缘膜设置在由所述第一端部朝向所述第二端部形成的多个第一沟槽中; 以及第二栅电极，其经由第二栅极绝缘膜设置在由所述第二端部朝向所述第一端部形成的多个第二沟槽中。 多个第一栅电极之间的间隔和多个第二栅电极之间的间隔为200nm以下。

公开(公告)号：US07489018B2

公开(公告)日：2009-02-10

申请号：US11405672

申请日：2006-04-18

申请人： Mitsuhiko Kitagawa ,  Takashi Nishimura ,  Yusuke Kawaguchi ,  Syotaro Ono

发明人： Mitsuhiko Kitagawa ,  Takashi Nishimura ,  Yusuke Kawaguchi ,  Syotaro Ono

IPC分类号： H01L27/082 ,  H01L27/102 ,  H01L29/70 ,  H01L31/11

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/4933 ,  H01L29/7397 ,  H01L29/7824 ,  H01L29/7831 ,  H01L29/78603 ,  H01L29/78624

摘要： A transistor comprises: an insulating layer; a semiconductor layer provided on a major surface of the insulating layer; a gate insulating layer provided on the base region; and a gate electrode provided on the gate insulating layer. The semiconductor layer has a source portion having a plurality of source regions of a first conductivity type and a plurality of base contact regions of a second conductivity type, the source regions being alternated with the base contact regions, a drain portion of the first conductivity type, and a base region of the second conductivity type provided between the source portion and the drain portion, the base region being in contact with the source regions and the base contact regions. A junction between the source regions and the base region is closer to the drain portion side than a junction between the base contact regions and the base region.

摘要翻译： 晶体管包括：绝缘层; 设置在所述绝缘层的主表面上的半导体层; 设置在所述基底区域上的栅极绝缘层; 以及设置在栅极绝缘层上的栅电极。 半导体层具有源极部分，具有多个第一导电类型的源极区域和多个第二导电类型的基极接触区域，源极区域与基极接触区域交替，第一导电类型的漏极部分 以及设置在源极部分和漏极部分之间的第二导电类型的基极区域，基极区域与源极区域和基极接触区域接触。 源极区域和基极区域之间的接合部比基极接触区域和基极区域之间的接合部更靠近漏极部分侧。

公开(公告)号：US07439547B2

公开(公告)日：2008-10-21

申请号：US11350532

申请日：2006-02-08

申请人： Mitsuhiko Kitagawa ,  Yoshiaki Aizawa

发明人： Mitsuhiko Kitagawa ,  Yoshiaki Aizawa

IPC分类号： H01L31/12

CPC分类号： H01H59/0009

摘要： A MEMS (micro electro mechanical system) apparatus is equipped with a light-emitting circuit, having a light-emitting device, to emit light; a light-receiving circuit having a series circuit of series-connected light-receiving devices that receive the emitted light to generate a voltage; and a MEMS assembly driven by the generated voltage.

摘要翻译： MEMS（微机电系统）装置配备有具有发光装置的发光电路来发光; 光接收电路，具有接收所发射的光以产生电压的串联连接的光接收装置的串联电路; 以及由所产生的电压驱动的MEMS组件。

公开(公告)号：US5554862A

公开(公告)日：1996-09-10

申请号：US183364

申请日：1994-01-19

申请人： Ichiro Omura ,  Mitsuhiko Kitagawa ,  Kazuya Nakayama ,  Masakazu Yamaguchi

发明人： Ichiro Omura ,  Mitsuhiko Kitagawa ,  Kazuya Nakayama ,  Masakazu Yamaguchi

IPC分类号： H01L29/745 ,  H01L29/749 ,  H01L29/74 ,  H01L31/111

CPC分类号： H01L29/7455 ,  H01L29/749

摘要： In a power semiconductor device, an n-base is formed on a p-emitter layer. On the n-base layer, a p-base layer, an n-emitter layer, and a high-concentration p-layer are formed laterally. In the p-base layer, an n-source layer is formed a specified distance apart from the n-emitter layer. In the n-emitter layer, a p-source layer is formed a specified distance apart from the high-concentration p-layer. A first gate electrode is formed via a first gate insulating film on the region sandwiched by the n-source layer and the n-emitter layer. A second gate electrode is formed via a second gate insulating film on the region sandwiched by the high-concentration p-layer and the p-source layer. On the p-emitter layer, a first main electrode is formed. A second main electrode is formed so as to be in contact with the p-base layer, the n-source layer, and the p-source layer.

摘要翻译： 在功率半导体器件中，在p发射极层上形成n基极。 在n基层上，横向形成p基层，n发射极层和高浓度p层。 在p基层中，n型源层与n型发射极层隔开规定的距离。 在n-发射极层中，与高浓度p层隔开规定的距离形成p源层。 在由n源层和n发射极层夹在的区域上经由第一栅极绝缘膜形成第一栅电极。 在由高浓度p层和p源层夹着的区域上经由第二栅极绝缘膜形成第二栅电极。 在p发射极层上形成第一主电极。 第二主电极形成为与p基层，n源层和p源层接触。

公开(公告)号：US5162876A

公开(公告)日：1992-11-10

申请号：US766076

申请日：1991-09-27

申请人： Mitsuhiko Kitagawa ,  Akio Nakagawa

发明人： Mitsuhiko Kitagawa ,  Akio Nakagawa

IPC分类号： H01L29/41 ,  H01L21/331 ,  H01L29/08 ,  H01L29/732 ,  H01L29/739 ,  H01L29/749 ,  H01L29/78 ,  H01L29/861 ,  H01L29/868

CPC分类号： H01L29/0834 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/868 ,  Y10S257/928

摘要： A p-type emitter layer 2 is formed in one surface portion of an n.sup.- -type base layer 1 of high resistance. p.sup.+ -type contact layers 2b and n.sup.+ -type current blocking layers 6 are formed in a preset area ratio in the surface area of the p-type emitter layer. A cathode electrode 4 is formed in contact with the contact layer 2b as well as the current blocking layer 6 of the pn junction diode section. With this cathode structure, the electron injection in the ON state can be suppressed so as to reduce the carrier concentration of a portion of the n.sup.- -type base layer 1 lying on the cathode side, and the parasitic transistor effect caused at the time of reverse recovery can be suppressed by provision of the current blocking layer 6.

公开(公告)号：US4996586A

公开(公告)日：1991-02-26

申请号：US422900

申请日：1989-10-17

申请人： Hideo Matsuda ,  Takashi Fujiwara ,  Yoshio Yokota ,  Mitsuhiko Kitagawa ,  Masami Iwasaki ,  Kazuo Watanuki

发明人： Hideo Matsuda ,  Takashi Fujiwara ,  Yoshio Yokota ,  Mitsuhiko Kitagawa ,  Masami Iwasaki ,  Kazuo Watanuki

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/52 ,  H01L23/051 ,  H01L23/48 ,  H01L23/482 ,  H01L29/74 ,  H01L29/744

CPC分类号： H01L23/051 ,  H01L23/4824 ,  H01L24/72 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/13033 ,  H01L2924/351

摘要： A crimp-type semiconductor device having a non-alloy structure according to this invention has a silicon pellet including a plurality of cathode electrodes and a plurality of gate electrodes arranged to be alternately staggered with the cathode electrodes at the cathode side, and an anode electrode at the anode side. The cathode electrodes are crimped by a cathode electrode post via an electrode member constituted by a thin soft-metal plate and a hard metal plate. The anode electrode is crimped by an anode electrode post via an electrode member. Opposing surfaces of the electrodes, the electrode members, and the electrode posts are not bonded to but crimped in contact with each other. The electrode members are formed to cover the entire surfaces of the cathode electrode and the anode electrode, respectively, and the entire surface of the cathode electrode post and the anode electrode post, respectively. The electrode members and the electrode posts are positioned with respect to each other by positioning guides, respectively.