Method of forming poly-silicon crystallization
    51.
    发明授权
    Method of forming poly-silicon crystallization 有权
    形成多晶硅结晶的方法

    公开(公告)号:US06982195B2

    公开(公告)日:2006-01-03

    申请号:US10780589

    申请日:2004-02-19

    IPC分类号: H01L21/84

    摘要: An amorphous silicon layer is formed on a substrate, and then a protective layer and a reflective layer are formed in turn to form a film stack on portions of the amorphous silicon layer. The reflective layer is a metal material with reflectivity of laser, and the protective layer is able to prevent metal diffusion. When an excimer laser heats the amorphous silicon layer to crystallize the amorphous silicon, nucleation sites are formed in the amorphous silicon layer under the film stack of the protective layer and the reflective layer. Next, laterally expanding crystallization occurs in the amorphous silicon layer to form poly-silicon having crystal grains with size of micrometers and high grain order.

    摘要翻译: 在基板上形成非晶硅层,然后依次形成保护层和反射层,以在非晶硅层的部分上形成膜堆叠。 反射层是具有激光反射率的金属材料,保护层能够防止金属扩散。 当准分子激光器加热非晶硅层以使非晶硅结晶时,在保护层和反射层的膜堆叠下面的非晶硅层中形成成核位置。 接下来,在非晶硅层中发生横向膨胀结晶,形成晶粒大小为微米,晶粒度高的多晶硅。

    Multi-layered complementary wire structure and manufacturing method thereof
    52.
    发明申请
    Multi-layered complementary wire structure and manufacturing method thereof 有权
    多层互补线结构及其制造方法

    公开(公告)号:US20050253249A1

    公开(公告)日:2005-11-17

    申请号:US11131084

    申请日:2005-05-17

    摘要: A multi-layered wire structure includes a substrate, a plurality of first conductive lines formed in a first layer over the substrate extending in parallel to each other in a first direction, a plurality of second conductive lines formed in a second layer over the first layer extending in parallel to each other in a second direction orthogonal to the first direction, a plurality of sets of third conductive lines formed in the second layer extending in the first direction, each set of third conductive lines corresponding to one of the first conductive lines, and a plurality of sets of conductive paths formed between the first layer and the second layer, each set of conductive paths corresponding to one of the first conductive lines and one set of third conductive lines and electrically connecting the corresponding first conductive line to the corresponding set of third conductive lines.

    摘要翻译: 一种多层导线结构,包括:基板,形成在第一层上的多个第一导电线,该第一导电线在基板上沿着第一方向彼此平行地延伸;多个第二导电线,形成在第一层上的第一层 在与第一方向正交的第二方向上彼此平行地延伸的多个第三导线组,所述第二导电线形成在第一方向上延伸,每组第三导线对应于第一导线之一, 以及形成在所述第一层和所述第二层之间的多组导电路径,每组导电路径对应于所述第一导电线中的一条和一组第三导电线,并将相应的第一导电线电连接到相应的集合 的第三导线。

    Meat grinder
    53.
    发明授权

    公开(公告)号:US10105710B2

    公开(公告)日:2018-10-23

    申请号:US14710030

    申请日:2015-05-12

    申请人: Yu-Cheng Chen

    发明人: Yu-Cheng Chen

    IPC分类号: B02C18/30 A22C17/00

    摘要: A meat grinder has a motor assembly and a grinding assembly. The motor assembly has a motor. The motor has an output axle having an annular abutting surface. The grinding assembly is securely connected with the motor assembly and has a grinding tube, a threaded rod, a blade, and an extrusion panel. The grinding tube is connected to the casing of the motor assembly and has an annular connecting base. The threaded rod is rotatably mounted in the grinding tube and has a connection segment. The connection segment is mounted through the connecting base, is connected with the output axle of the motor, and is stepped in section to form an annular abutting shoulder. The abutting shoulder is formed around the connecting segment and abuts the annular abutting surface of the output axle.

    MEAT GRINDER
    54.
    发明申请
    MEAT GRINDER 审中-公开
    绞肉机

    公开(公告)号:US20160332166A1

    公开(公告)日:2016-11-17

    申请号:US14710030

    申请日:2015-05-12

    申请人: Yu-Cheng CHEN

    发明人: Yu-Cheng CHEN

    IPC分类号: B02C18/30 A22C17/00

    摘要: A meat grinder has a motor assembly and a grinding assembly. The motor assembly has a motor. The motor has an output axle having an annular abutting surface. The grinding assembly is securely connected with the motor assembly and has a grinding tube, a threaded rod, a blade, and an extrusion panel. The grinding tube is connected to the casing of the motor assembly and has an annular connecting base. The threaded rod is rotatably mounted in the grinding tube and has a connection segment. The connection segment is mounted through the connecting base, is connected with the output axle of the motor, and is stepped in section to form an annular abutting shoulder. The abutting shoulder is formed around the connecting segment and abuts the annular abutting surface of the output axle.

    摘要翻译: 绞肉机具有马达组件和磨削组件。 马达组件具有马达。 马达具有一个具有环形邻接表面的输出轴。 研磨组件与电机组件牢固地连接,并具有研磨管,螺杆,叶片和挤出板。 研磨管连接到电动机组件的壳体,并具有环形连接底座。 螺杆可旋转地安装在研磨管中并具有连接段。 连接段通过连接座安装,与电动机的输出轴连接,并且台阶形成环形的邻接肩部。 邻接的肩部围绕连接段形成并且邻接输出轴的环形邻接表面。

    Device and method for top emitting AMOLED
    55.
    发明授权
    Device and method for top emitting AMOLED 有权
    用于顶部发射AMOLED的装置和方法

    公开(公告)号:US09059427B2

    公开(公告)日:2015-06-16

    申请号:US13610757

    申请日:2012-09-11

    IPC分类号: H01L29/18 H01L51/52 H01L27/32

    摘要: Embodiments of the present disclosure relate to devices and methods for reducing the resistance level of top electrodes in top emission AMOLED displays. By way of example, one embodiment includes disposing a metal frame between the top electrode and an insulating layer. The present disclosure also relates to methods for making such a display in reduced number of process steps, including certain techniques for combining certain steps into one process step.

    摘要翻译: 本公开的实施例涉及用于降低顶部发射AMOLED显示器中顶部电极的电阻水平的装置和方法。 作为示例,一个实施例包括在顶部电极和绝缘层之间设置金属框架。 本公开还涉及用于以减少数量的工艺步骤进行这种显示的方法,包括将某些步骤组合成一个工艺步骤的某些技术。

    Active device array substrate
    56.
    发明授权
    Active device array substrate 有权
    有源器件阵列衬底

    公开(公告)号:US08597968B2

    公开(公告)日:2013-12-03

    申请号:US13353328

    申请日:2012-01-19

    IPC分类号: H01L21/00

    CPC分类号: H01L27/1288 H01L27/1214

    摘要: An active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is disposed on the display area of the substrate. A gate insulator is disposed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are disposed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then disposed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is disposed on the passivation layer.

    摘要翻译: 提供有源器件阵列衬底。 首先,提供具有显示区域和感测区域的基板。 然后,在基板的显示区域上设置第一图案化导体层。 栅极绝缘体设置在基板上。 图案化半导体层,第二图案化导体层和图案化感光介电层设置在栅极绝缘体上,其中第二图案化导体层包括源电极,漏电极和下电极,图案化的感光介电层覆盖第二 图案化导体层包括设置在源电极和漏电极上的界面保护层和设置在下电极上的感光层。 然后在衬底上设置钝化层。 之后,在钝化层上设置包括像素电极和上部电极的第三图案化导体层。

    Display device
    57.
    发明授权
    Display device 有权
    显示设备

    公开(公告)号:US08542161B2

    公开(公告)日:2013-09-24

    申请号:US12498323

    申请日:2009-07-06

    IPC分类号: G09G3/20

    摘要: A display device includes a substrate, gate lines, data lines, gate tracking lines, and dummy gate tracking lines. The gate lines and the data lines are arranged perpendicularly. Each gate tracking line is disposed between one parts of two adjacent data lines, and substantially parallel to the data lines. Each dummy gate tracking line is electrically disconnected to the gate lines, disposed between other parts of two adjacent data lines, and substantially parallel to the data lines.

    摘要翻译: 显示装置包括基板,栅极线,数据线,栅极跟踪线和虚拟栅极跟踪线。 栅极线和数据线垂直布置。 每个栅极跟踪线设置在两个相邻数据线的一部分之间,并且基本上平行于数据线。 每个虚拟栅极跟踪线与两条相邻数据线的其它部分之间的栅极线电气断开,并且基本上平行于数据线。

    Pixel array
    58.
    发明授权
    Pixel array 有权
    像素阵列

    公开(公告)号:US08421938B2

    公开(公告)日:2013-04-16

    申请号:US12788301

    申请日:2010-05-27

    IPC分类号: G02F1/136

    摘要: A pixel array is located on a substrate and includes a plurality of pixel sets. Each of the pixel sets includes a first scan line, a second scan line, a data line, a data signal transmission line, a first pixel unit, and a second pixel unit. The data line is not parallel to the first and the second scan lines. The data signal transmission line is disposed parallel to the first and the second scan lines and electrically connected to the data line. Distance between the first and the second scan lines is smaller than distance between the data signal transmission line and one of the first and the second scan lines. The first pixel unit is electrically connected to the first scan line and the data line. The second pixel unit is electrically connected to the second scan line and the data line.

    摘要翻译: 像素阵列位于衬底上并且包括多个像素组。 每个像素组包括第一扫描线,第二扫描线,数据线,数据信号传输线,第一像素单元和第二像素单元。 数据线不平行于第一和第二扫描线。 数据信号传输线平行于第一和第二扫描线设置并与数据线电连接。 第一和第二扫描线之间的距离小于数据信号传输线与第一和第二扫描线之一之间的距离。 第一像素单元电连接到第一扫描线和数据线。 第二像素单元电连接到第二扫描线和数据线。

    Semiconductor structure of a display device and method for fabricating the same
    59.
    发明授权
    Semiconductor structure of a display device and method for fabricating the same 有权
    显示装置的半导体结构及其制造方法

    公开(公告)号:US08378404B2

    公开(公告)日:2013-02-19

    申请号:US13471713

    申请日:2012-05-15

    申请人: Yu-Cheng Chen

    发明人: Yu-Cheng Chen

    IPC分类号: H01L27/108

    摘要: A semiconductor structure of a display device and the method for fabricating the same are provided. The semiconductor structure is formed on a substrate having a TFT region and a pixel capacitor region thereon. A TFT, including a gate electrode, a source electrode, a drain electrode, a channel layer, and a gate insulating layer, is formed on the TFT region of the substrate. A pixel capacitor is formed on the pixel capacitor region, wherein the pixel capacitor comprises a bottom electrode formed on a bottom dielectric layer, an interlayer dielectric layer formed on the bottom electrode, a top electrode formed on the interlayer dielectric layer, a contact plug passing through the interlayer dielectric layer and electrically connected to the top and bottom electrodes, a capacitor dielectric layer formed on the top electrode, a transparent electrode formed on the capacitor dielectric layer and electrically connected to the drain electrode.

    摘要翻译: 提供了一种显示装置的半导体结构及其制造方法。 半导体结构形成在其上具有TFT区域和像素电容器区域的基板上。 在基板的TFT区域上形成包括栅电极,源电极,漏电极,沟道层和栅极绝缘层的TFT。 像素电容器形成在像素电容器区域上,其中像素电容器包括形成在底部电介质层上的底部电极,形成在底部电极上的层间电介质层,形成在层间电介质层上的顶部电极, 通过所述层间绝缘层和电连接到所述顶部和底部电极,形成在所述顶部电极上的电容器电介质层,形成在所述电容器电介质层上并电连接到所述漏极的透明电极。

    Display device and display driving method
    60.
    发明授权
    Display device and display driving method 有权
    显示设备和显示驱动方式

    公开(公告)号:US08325171B2

    公开(公告)日:2012-12-04

    申请号:US12684903

    申请日:2010-01-09

    IPC分类号: G09G3/20

    摘要: An exemplary display device includes multiple pixels, first through third gate lines and a data line. The pixels include first through third pixels. The first through third gate lines respectively are electrically coupled with the first through third pixels and for deciding whether to enable the first through third pixels. The first pixel is electrically coupled to the data line to receive a display data provided by the data line. The second pixel is electrically coupled to the first pixel to receive a display data provided by the data line through the first pixel. The third pixel is electrically coupled to the second pixel to receive a display data provided by the data line through both the first pixel and the second pixel. A display driving method adapted to be implemented in the display device also is provided.

    摘要翻译: 示例性显示装置包括多个像素,第一到第三栅极线和数据线。 像素包括第一至第三像素。 第一至第三栅极线分别与第一至第三像素电耦合,并用于决定是否启用第一至第三像素。 第一像素电耦合到数据线以接收由数据线提供的显示数据。 第二像素电耦合到第一像素以接收由数据线通过第一像素提供的显示数据。 第三像素电耦合到第二像素,以接收由数据线通过第一像素和第二像素提供的显示数据。 还提供了适用于显示装置中的显示驱动方法。