公开(公告)号：US20090200586A1

公开(公告)日：2009-08-13

申请号：US12142678

申请日：2008-06-19

申请人： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Howard E. Rhodes

发明人： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Howard E. Rhodes

IPC分类号： H01L27/146

CPC分类号： H01L27/14625 ,  H01L27/1464 ,  H01L27/14643

摘要： A backside illuminated imaging sensor includes a semiconductor layer, a metal interconnect layer and a silicide light reflecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel that includes a photodiode region is formed within the semiconductor layer. The metal interconnect layer is electrically coupled to the photodiode region and the silicide light reflecting layer is coupled between the metal interconnect layer and the front surface of the semiconductor layer. In operation, the photodiode region receives light from the back surface of the semiconductor layer, where a portion of the received light propagates through the photodiode region to the silicide light reflecting layer. The silicide light reflecting layer is configured to reflect the portion of light received from the photodiode region.

摘要翻译： 背面照明成像传感器包括半导体层，金属互连层和硅化物光反射层。 半导体层具有前表面和后表面。 在半导体层内形成包括光电二极管区域的成像像素。 金属互连层电耦合到光电二极管区域，并且硅化物光反射层耦合在金属互连层和半导体层的前表面之间。 在操作中，光电二极管区域从半导体层的背面接收光，其中接收的光的一部分通过光电二极管区域传播到硅化物光反射层。 硅化物光反射层被配置为反射从光电二极管区域接收的光的部分。

公开(公告)号：US20090194671A1

公开(公告)日：2009-08-06

申请号：US12023797

申请日：2008-01-31

申请人： Hidetoshi Nozaki ,  Howard E. Rhodes

发明人： Hidetoshi Nozaki ,  Howard E. Rhodes

IPC分类号： H01L31/0232 ,  H01L21/02

CPC分类号： H01L27/14625 ,  H01L27/14685

摘要： An array of pixels is formed using a substrate, where each pixel has a substrate having an incident side for receiving incident light, a photosensitive region formed in the substrate, and a reflector having a complex-shaped surface. The reflector is formed in a portion of the substrate that is opposed to the incident side such that light incident on the complex-shaped surface of the reflector is reflected towards the photosensitive region.

摘要翻译： 使用基板形成像素阵列，其中每个像素具有用于接收入射光的入射侧的基板，形成在基板中的感光区域和具有复杂形状表面的反射器。 反射器形成在与入射侧相对的基板的一部分中，使得入射在反射器的复合形状表面上的光被反射到感光区域。

公开(公告)号：US07535042B2

公开(公告)日：2009-05-19

申请号：US10881525

申请日：2004-07-01

申请人： Howard E. Rhodes

发明人： Howard E. Rhodes

IPC分类号： H01L31/113

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/14689 ,  H01L31/035272

摘要： A pixel cell with controlled leakage is formed by modifying the location and gate profile of a high dynamic range (HDR) transistor. The HDR transistor may have the gate profile of a transfer gate or a reset gate. The HDR transistor may be located on a side of the photodiode that is the same, opposite to, or perpendicular to the transfer gate. The leakage through the HDR transistor may be controlled by modifying the photodiode implants around the transistor. The photodiode implants at the HDR transistor may be placed similarly to the implants at the transfer gate. However, when the photodiode implants are moved away from the HDR transistor, leakage is reduced. When the photodiode implants are moved farther under the HDR transistor, leakage is increased to the extent desirable. The leakage through the HDR transistor may also be controlled by applying a voltage across the transistor.

摘要翻译： 具有受控泄漏的像素单元通过修改高动态范围（HDR）晶体管的位置和栅极分布来形成。 HDR晶体管可以具有传输门或复位栅的栅极分布。 HDR晶体管可以位于与传输门相同或垂直的光电二极管的一侧。 可以通过修改晶体管周围的光电二极管植入来控制通过HDR晶体管的泄漏。 在HDR晶体管处的光电二极管植入物可以类似于在传输门处的植入物放置。 然而，当光电二极管植入物远离HDR晶体管时，漏电减少。 当光电二极管植入物在HDR晶体管下移动得更远时，泄漏增加到期望的程度。 也可以通过在晶体管两端施加电压来控制通过HDR晶体管的泄漏。

公开(公告)号：US20080318358A1

公开(公告)日：2008-12-25

申请号：US12200805

申请日：2008-08-28

申请人： Howard E. Rhodes

发明人： Howard E. Rhodes

IPC分类号： H01L31/18

CPC分类号： H01L27/14609 ,  H01L27/14689

摘要： An active pixel using a pinned photodiode with a pinning layer formed from indium is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N− region formed within a P-type region. A pinning layer formed from indium is then formed at the surface of the N− region. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.

摘要翻译： 公开了使用由铟形成的钉扎层的钉扎光电二极管的有源像素。 像素包括形成在半导体衬底中的光电二极管。 光电二极管是形成在P型区域内的N-区域。 然后在N区的表面形成由铟形成的钉扎层。 此外，该像素包括形成在光电二极管和浮动节点之间的转移晶体管，并且选择性地操作以将信号从光电二极管传送到浮动节点。 最后，像素包括由浮动节点控制的放大晶体管。

公开(公告)号：US07432543B2

公开(公告)日：2008-10-07

申请号：US11004246

申请日：2004-12-03

申请人： Howard E. Rhodes

发明人： Howard E. Rhodes

IPC分类号： H01L31/062 ,  H01L27/148

CPC分类号： H01L27/14609 ,  H01L27/14689

摘要： An active pixel using a pinned photodiode with a pinning layer formed from indium is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N− region formed within a P-type region. A pinning layer formed from indium is then formed at the surface of the N− region. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.

摘要翻译： 公开了使用由铟形成的钉扎层的钉扎光电二极管的有源像素。 像素包括形成在半导体衬底中的光电二极管。 光电二极管是在P型区域内形成的N + - 区域。 然后在N + - 区域的表面形成由铟形成的钉扎层。 此外，该像素包括形成在光电二极管和浮动节点之间的转移晶体管，并且选择性地操作以将信号从光电二极管传送到浮动节点。 最后，像素包括由浮动节点控制的放大晶体管。

公开(公告)号：US07422924B2

公开(公告)日：2008-09-09

申请号：US11102844

申请日：2005-04-11

申请人： Howard E. Rhodes

发明人： Howard E. Rhodes

IPC分类号： H01L21/00

CPC分类号： H01L27/14643 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/1463 ,  H01L27/14683 ,  H01L27/14689 ,  H01L31/0352 ,  Y10S257/905

摘要： The invention provides a photodiode with an increased charge collection area, laterally spaced from an adjacent isolation region. Dopant ions of a first conductivity type with a first impurity concentration form a region surrounding at least part of the isolation region. These dopant ions are further surrounded by dopant ions of the first conductivity type with a second impurity concentration. The resulting isolation region structure increases the capacitance of the photodiode by allowing the photodiode to possess a greater charge collection region while suppressing the generation of dark current.

摘要翻译： 本发明提供了具有增加的电荷收集区域的光电二极管，与相邻隔离区域横向间隔开。 具有第一杂质浓度的第一导电类型的掺杂离子形成围绕隔离区的至少一部分的区域。 这些掺杂剂离子还被具有第二杂质浓度的第一导电类型的掺杂剂离子进一步包围。 所得到的隔离区结构通过允许光电二极管具有更大的电荷收集区域同时抑制暗电流的产生而增加了光电二极管的电容。

公开(公告)号：US20080188029A1

公开(公告)日：2008-08-07

申请号：US12078856

申请日：2008-04-07

申请人： Howard E. Rhodes

发明人： Howard E. Rhodes

IPC分类号： H01L21/329

CPC分类号： H01L27/14643 ,  H01L27/14603 ,  H01L27/1463 ,  H01L27/14656 ,  H01L27/14689 ,  H01L27/14812

摘要： An imager having a photodiode with a shallow doping profile with respect to the top surface of a substrate is disclosed. An imager with a graded pinned surface layer, self-aligned to a gate stack is provided. A photodiode with a shallow doping profile with respect to the top surface of a substrate and a graded pinned surface layer, self-aligned to a gate stack is provided. These photodiodes exhibit reduced image lag, transfer gate leakage, and photodiode dark current generation.

公开(公告)号：US07375026B2

公开(公告)日：2008-05-20

申请号：US10931357

申请日：2004-08-31

申请人： Howard E. Rhodes

发明人： Howard E. Rhodes

IPC分类号： H01L21/4763

CPC分类号： H01L24/05 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5283 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05006 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05546 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552

摘要： An interconnect comprises a trench and a number of metal layers above the trench. The trench has a depth and a width. The depth is greater than a critical depth, and the number of metal layers is a function of the width. In an alternate embodiment, a metallization structure having a trench including a metal layer and a second trench including a plurality of metal layers coupled to the metal layer is disclosed. The metal layer is highly conductive, and at least one of the plurality of metal layers is a metal layer that is capable of being reliably wire-bonded to a gold wire. The trench is narrower than the second trench, and at least one of the plurality of metal layers is copper or a copper alloy.

摘要翻译： 互连包括在沟槽上方的沟槽和多个金属层。 沟槽有一个深度和一个宽度。 深度大于临界深度，金属层的数量是宽度的函数。 在替代实施例中，公开了具有包括金属层的沟槽和包括耦合到金属层的多个金属层的第二沟槽的金属化结构。 金属层是高导电性的，并且多个金属层中的至少一个是能够可靠地引线接合到金线的金属层。 沟槽比第二沟槽窄，并且多个金属层中的至少一个是铜或铜合金。

公开(公告)号：US07359607B2

公开(公告)日：2008-04-15

申请号：US10929271

申请日：2004-08-30

申请人： Guy T. Blalock ,  Howard E. Rhodes ,  Vishnu K. Agarwal ,  Gurtej Singh Sandhu ,  James S. Foresi ,  Jean-Francois Viens ,  Dale G. Fried

发明人： Guy T. Blalock ,  Howard E. Rhodes ,  Vishnu K. Agarwal ,  Gurtej Singh Sandhu ,  James S. Foresi ,  Jean-Francois Viens ,  Dale G. Fried

IPC分类号： G02B6/10

CPC分类号： G02F1/025 ,  G02B6/125 ,  G02B6/136 ,  G02B2006/12107 ,  G02B2006/12164 ,  G02F1/0147 ,  G02F2203/15

摘要： A waveguide and resonator are formed on a lower cladding of a thermo optic device, each having a formation height that is substantially equal. Thereafter, the formation height of the waveguide is attenuated. In this manner, the aspect ratio as between the waveguide and resonator in an area where the waveguide and resonator front or face one another decreases (in comparison to the prior art) thereby restoring the synchronicity between the waveguide and the grating and allowing higher bandwidth configurations to be used. The waveguide attenuation is achieved by photomasking and etching the waveguide after the resonator and waveguide are formed. In one embodiment the photomasking and etching is performed after deposition of the upper cladding. In another, it is performed before the deposition. Thermo optic devices, thermo optic packages and fiber optic systems having these waveguides are also taught.

摘要翻译： 波导和谐振器形成在热光器件的下包层上，每个具有基本相等的形成高度。 此后，波导的形成高度被衰减。 以这种方式，波导和谐振器在波导和谐振器前面或彼此面对的区域（与现有技术相比）中的波导和谐振器之间的纵横比，从而恢复波导和光栅之间的同步性并允许更高的带宽配置 要使用的。 在形成谐振器和波导之后，通过光掩模和蚀刻波导来实现波导衰减。 在一个实施例中，在沉积上部包层之后进行光掩模和蚀刻。 另一方面，它是在沉积之前进行的。 还教导了具有这些波导的热光器件，热光封装和光纤系统。

公开(公告)号：US07279766B2

公开(公告)日：2007-10-09

申请号：US11001293

申请日：2004-12-02

申请人： Howard E. Rhodes

发明人： Howard E. Rhodes

IPC分类号： H01L31/06

CPC分类号： H01L27/14643 ,  H01L27/14601 ,  H01L27/1463 ,  H01L27/14687 ,  H01L27/14689 ,  H01L31/035281 ,  H01L31/03529 ,  H01L31/103 ,  Y02E10/50

摘要： A multiple-trench photosensor for use in a CMOS imager having an improved charge capacity. The multi-trench photosensor may be either a photogate or photodiode structure. The multi-trench photosensor provides the photosensitive element with an increased surface area compared to a flat photosensor occupying a comparable area on a substrate. The multi-trench photosensor also exhibits a higher charge capacity, improved dynamic range, and a better signal-to-noise ratio. Also disclosed are processes for forming the multi-trench photosensor.

摘要翻译： 一种用于具有改进的充电容量的CMOS成像器中的多沟道光电传感器。 多沟道光电传感器可以是光栅或光电二极管结构。 与平面光电传感器相比，多沟槽光电传感器提供的光敏元件具有增加的表面积，该平面光电传感器占据了基板上相当的面积。 多沟道光电传感器还具有更高的充电容量，改善的动态范围和更好的信噪比。 还公开了用于形成多沟槽光电传感器的工艺。