公开(公告)号：US20060159703A1

公开(公告)日：2006-07-20

申请号：US10934003

申请日：2004-09-02

申请人： Brian Murphy ,  Peter Collins ,  Stephen Whitehead ,  Alexander Bukreyev ,  Katalin Juhasz ,  Michael Teng

发明人： Brian Murphy ,  Peter Collins ,  Stephen Whitehead ,  Alexander Bukreyev ,  Katalin Juhasz ,  Michael Teng

IPC分类号： A61K39/155 ,  C12N7/00 ,  C07K14/115

CPC分类号： C07K14/005 ,  A61K39/00 ,  C12N7/00 ,  C12N2760/18522 ,  C12N2760/18561

摘要： Attenuated respiratory syncytial virus (RSV) and vaccine compositions thereof are produced by introducing specific mutations associated with attenuating phenotypes into wild-type or RSV which is incompletely attenuated by cold-passage or introduction of mutations which produce virus having a temperature sensitive (ts) or cold adapted (ca) phenotype. Alternatively, recombinant RSV and vaccine compositions thereof incorporate attenuating and other mutations specifying desired structural and or phenotypic characteristics in an infectious RSV. Recombinant RSV incorporate desired mutations specified by insertion, deletion, substitution or rearrangement of a selected nucleotide sequence, gene, or gene segment in an infectious RSV clone. The immune system of an individual is stimulated to induce protection against natural RSV infection, or multivalently against infection by RSV and another pathogen, such as PIV, by administration of attenuated, biologically derived or recombinant RSV.

摘要翻译： 减毒的呼吸道合胞病毒（RSV）及其疫苗组合物通过将与将减毒表型相关的特异性突变引入野生型或RSV，通过冷通道或引入产生具有温度敏感性（ts）或 冷适应（ca）表型。 或者，重组RSV及其疫苗组合物结合了在感染性RSV中指定所需结构和/或表型特征的减毒和其它突变。 重组RSV包含通过在感染性RSV克隆中选择的核苷酸序列，基因或基因片段的插入，缺失，取代或重排而指定的所需突变。 通过施用减毒的，生物衍生的或重组的RSV，刺激个体的免疫系统以诱导针对天然RSV感染的保护，或多重抗RSV和另一种病原体如PIV的感染。

公开(公告)号：US07052948B2

公开(公告)日：2006-05-30

申请号：US10481537

申请日：2002-06-27

申请人： Brian Murphy ,  Reinhold Wahlich ,  Rüdiger Schmolke ,  Wilfried Von Ammon ,  James Moreland

发明人： Brian Murphy ,  Reinhold Wahlich ,  Rüdiger Schmolke ,  Wilfried Von Ammon ,  James Moreland

IPC分类号： H01L21/8238

CPC分类号： H01L21/3223 ,  H01L21/76251

摘要： The invention relates to a film or a layer made of semi-conducting material with low defect density in the thin layer, and a SOI-disk with a thin silicon layer exhibiting low surface roughness, defect density and thickness variations. The invention also relates to a method for producing a film or a layer made of semi-conductive material. Said method comprises the following steps: a) producing structures from a semi-conductive material with periodically repeated recesses which have a given geometrical structure, b) thermally treating the surface structured material until a layer with periodically repeated hollow spaces is formed under a closed layer on the surface of the material, c) separating the closed layer on the surface along the layer of hollow spaces from the remainder of the semi-conductive material.

摘要翻译： 本发明涉及在薄层中具有低缺陷密度的半导体材料制成的膜或层，以及具有低表面粗糙度，缺陷密度和厚度变化的薄硅层的SOI-盘。 本发明还涉及一种制造薄膜或由半导体材料制成的层的方法。 所述方法包括以下步骤：a）从具有给定几何结构的周期性重复凹槽的半导体材料制造结构，b）热处理表面结构材料，直到形成具有周期性重复的中空空间的层， 在所述材料的表面上，c）沿着所述中空空间层与所述半导体材料的其余部分分离所述表面上的所述封闭层。

公开(公告)号：US20060106416A1

公开(公告)日：2006-05-18

申请号：US11255784

申请日：2005-10-21

申请人： Douglas Raymond ,  Shinikequa White ,  Richard Pellegrino ,  Anthony Carlone ,  William Frasier ,  Connie Marchek ,  Brian Murphy ,  Stephen Connolly ,  Nicholas Pavento ,  Sara Dziedzic

发明人： Douglas Raymond ,  Shinikequa White ,  Richard Pellegrino ,  Anthony Carlone ,  William Frasier ,  Connie Marchek ,  Brian Murphy ,  Stephen Connolly ,  Nicholas Pavento ,  Sara Dziedzic

IPC分类号： A61M29/00

CPC分类号： A61B17/3439 ,  A61B17/02

摘要： An expandable port for minimally invasive surgery includes a first section, a second section, and at least one intermediate section. The port is expandable from a closed configuration in which the first section is proximate the second section along at least a portion of a length of the first section to an expanded configuration in which the first section is spaced apart from the second section. The intermediate portion spans a gap between the first section and the second section when the port is in the expanded configuration.

公开(公告)号：US20060097317A1

公开(公告)日：2006-05-11

申请号：US11266164

申请日：2005-11-03

申请人： Dirk Dantz ,  Andreas Huber ,  Reinhold Wahlich ,  Brian Murphy

发明人： Dirk Dantz ,  Andreas Huber ,  Reinhold Wahlich ,  Brian Murphy

IPC分类号： H01L27/12 ,  H01L31/117

CPC分类号： H01L21/76251 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02658

摘要： A semiconductor substrate useful as a donor wafer is a single-crystal silicon wafer having a relaxed, single-crystal layer containing silicon and germanium on its surface, the germanium content at the surface of the layer being in the range from 10% by weight to 100% by weight, and a layer of periodically arranged cavities below the surface. The invention also relates to a process for producing this semiconductor substrate and to an sSOI wafer produced from this semiconductor substrate.

摘要翻译： 可用作施主晶片的半导体衬底是其表面上具有含有硅和锗的松弛的单晶层的单晶硅晶片，该层表面的锗含量在10重量％至 100重量％，以及在表面下面的周期性排列的空腔层。 本发明还涉及一种用于制造该半导体衬底和由该半导体衬底制造的sSOI晶片的方法。

公开(公告)号：US20050287767A1

公开(公告)日：2005-12-29

申请号：US11157260

申请日：2005-06-21

申请人： Dirk Dantz ,  Andreas Huber ,  Reinhold Wahlich ,  Brian Murphy

发明人： Dirk Dantz ,  Andreas Huber ,  Reinhold Wahlich ,  Brian Murphy

IPC分类号： H01L21/18 ,  H01L21/30 ,  H01L21/762 ,  H01L27/12

CPC分类号： H01L21/187 ,  H01L21/3065 ,  H01L21/324 ,  H01L21/76251

摘要： A process for producing a semiconductor substrate comprising a carrier wafer and a layer of single-crystalline semiconductor material: a) producing a layer containing recesses at the surface of a donor wafer of single-crystalline semiconductor material, b) joining the surface of the donor wafer containing recesses to the carrier wafer, c) heat treating to close the recesses at the interface between the carrier wafer and the donor wafer to form a layer of cavities within the donor wafer, and d) splitting the donor wafer along the layer of cavities, resulting in a layer of semiconductor material on the carrier wafer. Semiconductor substrates prepared thusly may have a single-crystalline semiconductor layer having a thickness of 100 nm or less, a layer thickness uniformity of 5% or less, and an HF defect density of 0.02/cm2 or less.

摘要翻译： 一种制造半导体衬底的方法，包括载体晶片和单晶半导体材料层：a）在单晶半导体材料的施主晶片的表面上产生包含凹陷的层，b）将所述供体的表面 晶片容纳凹槽到载体晶片，c）热处理以封闭载体晶片和施主晶片之间的界面处的凹槽，以在施主晶片内形成一层空腔，以及d）沿着该空腔层分裂施主晶片 ，从而在载体晶片上产生一层半导体材料。 因此制备的半导体衬底可以具有厚度为100nm以下，层厚均匀度为5％以下，HF缺陷密度为0.02 / cm 2以下的单晶半导体层 。

公开(公告)号：US20050158338A1

公开(公告)日：2005-07-21

申请号：US10704116

申请日：2003-11-07

申请人： Ursula Buchholz ,  Peter Collins ,  Brian Murphy ,  Stephen Whitehead ,  Christine Krempl

发明人： Ursula Buchholz ,  Peter Collins ,  Brian Murphy ,  Stephen Whitehead ,  Christine Krempl

IPC分类号： A61K39/00 ,  A61K39/155 ,  C07K14/14 ,  C12N7/00 ,  C12N7/04 ,  C12N15/86 ,  A61K39/12

CPC分类号： C12N15/86 ,  A61K39/00 ,  A61K39/12 ,  A61K39/155 ,  A61K2039/5254 ,  A61K2039/5256 ,  A61K2039/543 ,  A61K2039/544 ,  C07K14/005 ,  C07K2319/00 ,  C12N7/00 ,  C12N2760/18521 ,  C12N2760/18522 ,  C12N2760/18534 ,  C12N2760/18543 ,  C12N2760/18561 ,  C12N2840/203

摘要： Chimeric human-bovine respiratory syncytial virus (RSV) are infectious and attenuated in humans and other mammals and useful in immunogenic compositions for eliciting an anti-RSV immune response. Also provided are isolated polynucleotide molecules and vectors incorporating a chimeric RSV genome or antigenome which includes a partial or complete human or bovine RSV “background” genome or antigenome combined or integrated with one or more heterologous gene(s) or genome segment(s) of a different RSV strain. Chimeric human-bovine RSV of the invention include a partial or complete “background” RSV genome or antigenome derived from or patterned after a human or bovine RSV strain or subgroup virus combined with one or more heterologous gene(s) or genome segment(s) of a different RSV strain or subgroup virus to form the human-bovine chimeric RSV genome or antigenome. In preferred aspects of the invention, chimeric RSV incorporate a partial or complete bovine RSV background genome or antigenome combined with one or more heterologous gene(s) or genome segment(s) from a human RSV. Genes of interest include any of the NS1, NS2, N, P, M, SH, M2(ORF1), M2(ORF2), L, F or G genes or a genome segment including a protein or portion thereof. A variety of additional mutations and nucleotide modifications are provided within the human-bovine chimeric RSV of the invention to yield desired phenotypic and structural effects.

摘要翻译： 嵌合人 - 牛呼吸道合胞病毒（RSV）在人和其他哺乳动物中具有感染性和减毒性，并且可用于引发抗RSV免疫应答的免疫原性组合物。 还提供了分离的多核苷酸分子和掺入嵌合RSV基因组或抗原组的载体，其包括部分或完整的人或牛RSV“背景”基因组或与一个或多个异源基因或基因组片段 不同的RSV菌株。 本发明的嵌合人类牛RSV包括部分或完整的“背景”RSV基因组或在与一个或多个异源基因或基因组片段组合的人或牛RSV病毒株或亚组病毒之后衍生或构图的部分或完整的“背景” 的不同RSV株或亚组病毒形成人 - 牛嵌合RSV基因组或抗原组。 在本发明的优选方面，嵌合RSV包含与来自人RSV的一个或多个异源基因或基因组片段组合的部分或完整的牛RSV背景基因组或反义基因组。 感兴趣的基因包括任何NS1，NS2，N，P，M，SH，M2（ORF1），M2（ORF2），L，F或G基因或包含蛋白质或其部分的基因组片段。 在本发明的人 - 牛嵌合RSV内提供了多种额外的突变和核苷酸修饰，以产生所需的表型和结构效果。

公开(公告)号：US5455527A

公开(公告)日：1995-10-03

申请号：US123647

申请日：1993-09-17

申请人： Brian Murphy ,  Martin Zibert

发明人： Brian Murphy ,  Martin Zibert

IPC分类号： G06F3/00 ,  H03K3/353 ,  H03K3/3565 ,  H03K19/003 ,  H03K19/0185 ,  H03K19/00 ,  H03K19/0175

CPC分类号： H03K19/00361 ,  H03K19/01855 ,  H03K3/3565

摘要： An integrated buffer circuit configuration has two inverters which are mutually connected in series. A circuit node lies between the two inverters. At least the first inverter is a CMOS inverter for an input signal IN. The CMOS inverter has an n-channel transistor which is connected to a first supply potential. The source of a p-channel transistor is connected with a constant current source. A first enable transistor is connected between the n-channel transistor of the first inverter and the circuit node. A second enable transistor is connected in parallel to the configuration formed by the constant current source and the p-channel transistor of the first inverter. The gates of the enable transistors are connected with the enable input of the buffer circuit. An enable signal present at the enable input makes it possible to deactivate the buffer circuit in the case of disturbances with a known course over time. A MOS-transistor may function as the constant current source. The MOS-transistor is then connected to a second supply potential and its gate lies at reference potential with a value with always has a constant difference with respect to the second supply potential. During operation, the MOS-transistor is conducting.

摘要翻译： 集成缓冲电路结构具有串联连接的两个反相器。 电路节点位于两个逆变器之间。 至少第一个逆变器是用于输入信号IN的CMOS反相器。 CMOS反相器具有连接到第一电源电位的n沟道晶体管。 p沟道晶体管的源极与恒流源连接。 第一使能晶体管连接在第一反相器的n沟道晶体管和电路节点之间。 第二使能晶体管与由第一反相器的恒流源和p沟道晶体管形成的配置并联连接。 使能晶体管的栅极与缓冲电路的使能输入相连。 存在于使能输入端的使能信号使得可以在具有已知过程的干扰的情况下停用缓冲电路。 MOS晶体管可以用作恒流源。 然后将MOS晶体管连接到第二电源电位，并且其栅极处于参考电位，其值总是具有相对于第二电源电位的恒定差值。 在运行期间，MOS晶体管导通。

公开(公告)号：US5386157A

公开(公告)日：1995-01-31

申请号：US123648

申请日：1993-09-17

申请人： Brian Murphy ,  Martin Zibert

发明人： Brian Murphy ,  Martin Zibert

IPC分类号： G06F3/00 ,  H03K3/353 ,  H03K3/3565 ,  H03K19/003 ,  H03K19/0185 ,  H03K19/0175 ,  H03K19/017

CPC分类号： H03K19/01855 ,  H03K19/00361 ,  H03K3/3565

摘要： An integrated buffer circuit configuration has two inverters which are mutually connected in series. The first inverter includes an n-channel transistor and a constant current source. The source of the n-channel transistor is connected to a first supply potential. The drain of the transistor is connected with the constant current source through a first enable transistor. A second enable transistor is connected parallel to the constant current source. The gates of enable transistors are connected with the enable input of the buffer circuit. An enable signal present at the enable input makes it possible to deactivate the buffer circuit in the case of disturbances with a known course over time. A MOS transistor may function as the constant current source. The MOS transistor is then connected to a second supply potential and its gate lies at reference potential with a value with always has a constant difference with respect to the second supply potential. During operation, the MOS transistor is conducting.

摘要翻译： 集成缓冲电路结构具有串联连接的两个反相器。 第一反相器包括n沟道晶体管和恒流源。 n沟道晶体管的源极连接到第一电源电位。 晶体管的漏极通过第一使能晶体管与恒流源连接。 第二使能晶体管与恒流源并联连接。 使能晶体管的栅极与缓冲电路的使能输入相连接。 存在于使能输入端的使能信号使得可以在具有已知过程的干扰的情况下停用缓冲电路。 MOS晶体管可以用作恒流源。 然后，MOS晶体管连接到第二电源电位，并且其栅极处于参考电位，其值总是具有相对于第二电源电位的恒定差值。 在运行期间，MOS晶体管导通。

公开(公告)号：US5166546A

公开(公告)日：1992-11-24

申请号：US823860

申请日：1992-01-22

申请人： Dominique Savignac ,  Dieter Gleis ,  Brian Murphy

发明人： Dominique Savignac ,  Dieter Gleis ,  Brian Murphy

IPC分类号： H03K17/22

CPC分类号： H03K17/223

摘要： An integrated circuit for generating a reset signal includes terminals for a first and a second supply potential. A serial RC network is connected between the terminals. The RC network has an ohmic component, a capacitive component and a first circuit node of the integrated circuit connected between the components. An initializing circuit is connected parallel to the RC network. The initializing circuit has an output forming a second circuit node of the integrated circuit carrying a potential with a maximum value specified by dimensioning the initializing circuit, when the first supply potential is applied. An inverter circuit is connected between the first circuit node and the terminal for the second supply potential in terms of supply voltage. The inverter circuit has an input connected to the second circuit node and an output forming a third circuit node of the integrated circuit. A transistor has a source-to-drain path connected between the second circuit node and the terminal for the second supply potential and has a gate connected to the third circuit node. An additional inverter has an input at the third circuit node and an output forming a fourth circuit node of the integrated circuit at which a reset signal is present during operation.

摘要翻译： 用于产生复位信号的集成电路包括用于第一和第二电源电位的端子。 终端之间连接有一个串行RC网络。 RC网络具有连接在组件之间的集成电路的欧姆分量，电容分量和第一电路节点。 初始化电路与RC网络并联连接。 初始化电路具有形成集成电路的第二电路节点的输出，该第一电路节点在施加第一电源电位时承载具有由初始化电路的尺寸确定的最大值的电位。 在电源电压方面，逆变器电路连接在第一电路节点和用于第二电源电位的端子之间。 逆变器电路具有连接到第二电路节点的输入端和形成集成电路的第三电路节点的输出。 晶体管具有连接在第二电路节点和用于第二电源电位的端子之间的源极至漏极路径，并且具有连接到第三电路节点的栅极。 附加的反相器具有在第三电路节点处的输入和形成集成电路的第四电路节点的输出，在该输出端处在操作期间存在复位信号。

公开(公告)号：US10104880B2

公开(公告)日：2018-10-23

申请号：US12544949

申请日：2009-08-20

申请人： Andy Zeitlin ,  Gregory Russotti ,  Shuyang He ,  Ajai Pal ,  Hong J. Chen ,  Thomas Brieva ,  Ryan Shorr ,  Brian Murphy

发明人： Andy Zeitlin ,  Gregory Russotti ,  Shuyang He ,  Ajai Pal ,  Hong J. Chen ,  Thomas Brieva ,  Ryan Shorr ,  Brian Murphy

IPC分类号： A61K35/12 ,  C12N5/02 ,  C12N5/071 ,  A01N1/02

摘要： Provided herein are improved methods for the formulation of compositions comprising placental stem cells, and improved compositions and cell formulations produced thereby.