公开(公告)号：US09379210B2

公开(公告)日：2016-06-28

申请号：US14883457

申请日：2015-10-14

Applicant: Lam Research Corporation

Inventor： Thomas Weller Mountsier ,  Bart J. van Schravendijk ,  Ananda K. Banerji ,  Nagraj Shankar

IPC: H01L21/336 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L21/28 ,  H01L21/311

CPC classification number: H01L29/66545 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02277 ,  H01L21/0228 ,  H01L21/28008 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76897 ,  H01L29/517 ,  H01L29/66553 ,  H01L29/78 ,  H01L29/7845

Abstract: Various embodiments herein relate to formation of contact etch stop layers in the context of forming gates and contacts. In certain embodiments, a novel process flow is used, which may involve the deposition and removal of a sacrificial pre-metal dielectric material before a particular contact etch stop layer is formed. An auxiliary contact etch stop layer may be used in addition to a primary etch stop layer that is deposited previously. In certain cases the contact etch stop layer is a metal-containing material such as a nitride or an oxide. The contact etch stop layer may be deposited through a cyclic vapor deposition in some embodiments. The process flows disclosed herein provide improved protection against over-etching gate stacks, thereby minimizing gate-to-contact leakage. Further, the disclosed process flows result in wider flexibility in terms of materials and deposition conditions used for forming various dielectric materials, thereby minimizing parasitic capacitance.

公开(公告)号：US20160071953A1

公开(公告)日：2016-03-10

申请号：US14883457

申请日：2015-10-14

Applicant: Lam Research Corporation

Inventor： Thomas Weller Mountsier ,  Bart J. van Schravendijk ,  Ananda K. Banerji ,  Nagraj Shankar

IPC: H01L29/66 ,  H01L21/311 ,  H01L21/28

CPC classification number: H01L29/66545 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02277 ,  H01L21/0228 ,  H01L21/28008 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76897 ,  H01L29/517 ,  H01L29/66553 ,  H01L29/78 ,  H01L29/7845

Abstract: Various embodiments herein relate to formation of contact etch stop layers in the context of forming gates and contacts. In certain embodiments, a novel process flow is used, which may involve the deposition and removal of a sacrificial pre-metal dielectric material before a particular contact etch stop layer is formed. An auxiliary contact etch stop layer may be used in addition to a primary etch stop layer that is deposited previously. In certain cases the contact etch stop layer is a metal-containing material such as a nitride or an oxide. The contact etch stop layer may be deposited through a cyclic vapor deposition in some embodiments. The process flows disclosed herein provide improved protection against over-etching gate stacks, thereby minimizing gate-to-contact leakage. Further, the disclosed process flows result in wider flexibility in terms of materials and deposition conditions used for forming various dielectric materials, thereby minimizing parasitic capacitance.

Abstract translation: 本文的各种实施例涉及在形成栅极和触点的上下文中形成接触蚀刻停止层。 在某些实施例中，使用新的工艺流程，其可以涉及在形成特定的接触蚀刻停止层之前沉积和去除牺牲预金属介电材料。 除了先前沉积的原始蚀刻停止层之外，还可以使用辅助接触蚀刻停止层。 在某些情况下，接触蚀刻停止层是含金属的材料，例如氮化物或氧化物。 在一些实施方案中，接触蚀刻停止层可通过环状气相沉积沉积。 本文公开的工艺流程提供了改进的防蚀蚀栅极堆叠的保护，从而最小化了栅极 - 接触泄漏。 此外，所公开的工艺流程在用于形成各种介电材料的材料和沉积条件方面产生更大的灵活性，从而最小化寄生电容。

公开(公告)号：US09153482B2

公开(公告)日：2015-10-06

申请号：US14171483

申请日：2014-02-03

Applicant: Lam Research Corporation

Inventor： Thomas Joseph Knisley ,  Nagraj Shankar ,  Pramod Subramonium

IPC: H01L21/44 ,  H01L21/302 ,  H01L21/461 ,  H01L21/768 ,  H01L23/532 ,  H01L21/268 ,  C23C16/18 ,  C23C16/04

CPC classification number: C23C16/04 ,  C23C16/0209 ,  C23C16/0263 ,  C23C16/18 ,  C23C16/45525 ,  H01L21/28556 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods and apparatus for selective deposition of cobalt on copper lines in the presence of exposed dielectric in semiconductor processing are provided. Cobalt in its metallic form is selectively deposited onto copper in the presence of dielectric by contacting a prepared surface of the substrate with an organometallic cobalt compound in a presence of a reducing agent. Surface preparation involves H2 treatment with concurrent UV light irradiation. After the substrate surface is prepared, the substrate is contacted with an organometallic cobalt compound comprising a substituted or unsubstituted allyl ligand in a presence of a reducing agent to selectively deposit cobalt on copper. No plasma treatment during or after cobalt deposition is necessary, and the method can be used in a presence of a ULK dielectric without causing damage to dielectric. Deposited cobalt caps are used to reduce copper electromigration and to improve adhesion of copper to subsequently deposited layers.

Abstract translation: 提供了在半导体处理中在暴露的电介质存在下在铜线上选择性沉积钴的方法和装置。 通过在还原剂的存在下使基材的制备表面与有机金属钴化合物接触，将金属形式的钴选择性地沉积在铜上。 表面处理涉及同时进行紫外光照射的H2处理。 在制备基材表面之后，在还原剂存在下使基材与包含取代或未取代的烯丙基配体的有机金属钴化合物接触，以选择性地在铜上沉积钴。 在钴沉积期间或之后不需要等离子体处理，并且该方法可以在存在ULK电介质的情况下使用而不会损坏电介质。 沉积的钴盖用于减少铜电迁移并改善铜对随后沉积层的粘附。

公开(公告)号：US20150235835A1

公开(公告)日：2015-08-20

申请号：US14183287

申请日：2014-02-18

Applicant: Lam Research Corporation

Inventor： Shankar Swaminathan ,  Ananda Banerji ,  Nagraj Shankar ,  Adrien LaVoie

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/458 ,  C23C16/52

CPC classification number: H01L21/0254 ,  C23C16/045 ,  C23C16/303 ,  C23C16/45523 ,  C23C16/45544 ,  C23C16/458 ,  C23C16/52 ,  H01L21/02178 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/76829 ,  H01L21/76831

Abstract: Methods of depositing conformal aluminum nitride films on semiconductor substrates are provided. Disclosed methods involve (a) exposing a substrate to an aluminum-containing precursor, (b) purging the aluminum-containing precursor for a duration insufficient to remove substantially all of the aluminum-containing precursor in gas phase, (c) exposing the substrate to a nitrogen-containing precursor to form aluminum nitride, (d) purging the nitrogen-containing precursor, and (e) repeating (a) through (d). Increased growth rate and 100% step coverage and conformality are attained.

Abstract translation: 提供了在半导体衬底上沉积保形氮化铝膜的方法。 公开的方法包括（a）将基底暴露于含铝前体，（b）清除含铝前体持续时间不足以在气相中基本上除去所有含铝前体，（c）将基底暴露于 （d）清洗含氮前体，和（e）重复（a）至（d）的氮气前体。 实现增长速度提高，步距覆盖率达100％。