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公开(公告)号:US12087573B2
公开(公告)日:2024-09-10
申请号:US17597593
申请日:2020-07-09
发明人: Gerald Joseph Brady , Kevin M. McLaughlin , Pratik Sankhe , Bart J. van Schravendijk , Shriram Vasant Bapat
IPC分类号: H01L21/02 , C23C16/44 , C23C16/455 , C23C16/458 , C23C16/52 , H10N50/01
CPC分类号: H01L21/02244 , C23C16/4408 , C23C16/45502 , C23C16/45527 , C23C16/45565 , C23C16/4583 , C23C16/52 , H10N50/01
摘要: Methods and apparatuses are provided herein for oxidizing an annular edge region of a substrate. A method may include providing the substrate to a substrate holder in a semiconductor processing chamber, the semiconductor processing chamber having a showerbead positioned above the substrate holder, and simultaneously flowing, while the substrate is supported by the substrate holder, (a) an oxidizing gas around a periphery of the substrate and (b) an inert gas that does not include oxygen through the showerhead and onto the substrate, thereby creating an annular gas region over an annular edge region of the substrate and an interior gas region over on an interior region of the substrate; the simultaneous flowing is not during a deposition of a material onto the substrate, and the annular gas region has an oxidization rate higher than the interior gas region.
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公开(公告)号:US12087572B2
公开(公告)日:2024-09-10
申请号:US17598830
申请日:2020-03-26
IPC分类号: H01L21/02 , H01L21/311 , H01L27/088 , H01L27/1157 , H10B43/20 , H10B43/35
CPC分类号: H01L21/0217 , H01L21/02164 , H01L21/02211 , H01L21/02274 , H01L21/0234 , H01L21/31111 , H01L27/088 , H10B43/20 , H10B43/35
摘要: Disclosed are methods for the formation of silicon nitride (SiN) on only the horizontal surfaces of structures such as 3D NAND staircase. This allows for thicker landing pads for subsequently formed vias. In some embodiments, the methods involve deposition of a SiN layer over a staircase followed by a treatment to selectively densify the SiN layer on the horizontal surfaces with respect to the sidewall surfaces. A wet etch is then performed to remove SiN from the sidewall surfaces. The selective treatment results in significantly different wet etch rates (WERs) between the horizontal surfaces and the sidewalls.
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公开(公告)号:US20220059348A1
公开(公告)日:2022-02-24
申请号:US17465555
申请日:2021-09-02
发明人: Hu Kang , Shankar Swaminathan , Jun Qian , Wanki Kim , Dennis M. Hausmann , Bart J. van Schravendijk , Adrien LaVoie
IPC分类号: H01L21/02 , C23C16/04 , C23C16/34 , C23C16/40 , C23C16/455 , C23C16/56 , H01L21/67 , H01L21/762 , H01L21/768
摘要: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
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公开(公告)号:US11133180B2
公开(公告)日:2021-09-28
申请号:US16428067
申请日:2019-05-31
发明人: Hu Kang , Shankar Swaminathan , Jun Qian , Wanki Kim , Dennis M. Hausmann , Bart J. van Schravendijk , Adrien LaVoie
IPC分类号: H01L21/02 , C23C16/04 , C23C16/34 , C23C16/40 , C23C16/455 , C23C16/56 , H01L21/67 , H01L21/762 , H01L21/768 , H01L21/285
摘要: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
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公开(公告)号:US11049716B2
公开(公告)日:2021-06-29
申请号:US16194102
申请日:2018-11-16
发明人: Wei Tang , Jason Daejin Park , Bart J. van Schravendijk , Shu Tsai Wang , Kaihan Abidi Ashtiani
IPC分类号: H01L21/02 , H01L21/768 , H01L21/762 , C23C16/04 , C23C16/26 , C23C16/32
摘要: Provided herein are methods of filling gaps using high density plasma chemical vapor deposition (HDP CVD). According to various implementations, carbon-containing films such as amorphous carbon and amorphous carbide films are deposited by HDP CVD into gaps on substrates to fill the gaps. The methods may involve using high hydrogen-content process gasses during HDP CVD deposition to provide bottom-up fill. Also provided are related apparatus.
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公开(公告)号:US20200219758A1
公开(公告)日:2020-07-09
申请号:US16825473
申请日:2020-03-20
IPC分类号: H01L21/768 , H01L29/417 , H01L29/66 , H01L21/67 , H01L21/311 , H01L21/02 , H01L29/78
摘要: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% Hz. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.
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公开(公告)号:US10580690B2
公开(公告)日:2020-03-03
申请号:US15972554
申请日:2018-05-07
IPC分类号: H01L21/768 , H01L23/522 , H01L21/56 , H01L21/02 , H01L27/11575 , H01L27/11582
摘要: Methods and apparatuses for depositing an encapsulation layer over a staircase structure during fabrication of a 3D NAND structure to prevent degradation of an oxide-oxide interface and to prevent punchthrough of a wordline are provided. The encapsulation layer is a carbon-containing conformal film deposited over a staircase structure of alternating oxide and nitride layers prior to depositing oxide over the staircase structure.
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公开(公告)号:US20190311897A1
公开(公告)日:2019-10-10
申请号:US16428067
申请日:2019-05-31
发明人: Hu Kang , Shankar Swaminathan , Jun Qian , Wanki Kim , Dennis M. Hausmann , Bart J. van Schravendijk , Adrien LaVoie
IPC分类号: H01L21/02 , H01L21/768 , H01L21/762 , H01L21/67 , C23C16/56 , C23C16/455 , C23C16/40 , C23C16/34 , C23C16/04
摘要: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
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公开(公告)号:US20190043876A1
公开(公告)日:2019-02-07
申请号:US16052401
申请日:2018-08-01
IPC分类号: H01L27/11556 , H01L27/11582 , G11C16/04
摘要: Methods and apparatuses for selectively depositing silicon nitride (SiN) via high-density plasma chemical vapor deposition (HDP CVD) to form a SiN pad on an exposed flat surface of a nitride layer in a 3D NAND staircase structure with alternating oxide and nitride layers are provided. In some embodiments, selective etching is performed to remove undesirable buildup of SiN on sidewalls of the oxide layers of the staircase structure. Nitride layers of the staircase structure are replaced with tungsten (W) to form tungsten wordlines, while the SiN pads are replaced with tungsten to from landing pads, which prevent punchthrough of the tungsten wordlines on the staircase structure by interconnects extending thereto.
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公开(公告)号:US20180144977A1
公开(公告)日:2018-05-24
申请号:US15408291
申请日:2017-01-17
IPC分类号: H01L21/768 , H01L21/56 , H01L21/02 , H01L21/311 , H01L27/11551 , H01L27/11578 , H01L23/528 , H01L23/522 , H01L23/532
CPC分类号: H01L21/76816 , H01L21/02167 , H01L21/02274 , H01L21/0228 , H01L21/31111 , H01L21/56 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L23/53257 , H01L23/53295 , H01L27/11575 , H01L27/11582
摘要: Methods and apparatuses for depositing an encapsulation layer over a staircase structure during fabrication of a 3D NAND structure to prevent degradation of an oxide-oxide interface and to prevent punchthrough of a wordline are provided. The encapsulation layer is a carbon-containing conformal film deposited over a staircase structure of alternating oxide and nitride layers prior to depositing oxide over the staircase structure.
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