Abstract:
Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap tilling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.
Abstract:
A method for depositing a nitride layer over an oxide layer to form an oxide-nitride stack is provided. The method includes supplying an inert gas to a plasma enhanced chemical vapor deposition (PECVD) reactor that supports a substrate having said oxide layer. Then, providing power to an electrode of the PECVD reactor, where the power is configured to strike a plasma. Then, flowing reactant gases into the PECVD reactor. The reactant gases include a first percentage by volume of ammonia (NH3), a second percentage by volume of nitrogen (N2), a third percentage by volume of silane (SiH4) and a fourth percentage by volume of an oxidizer. The fourth percentage by volume of said oxidizer is at least 0.5 percent by volume and less than about 8 percent by volume. Then, continuing to flow the reactant gases into the PECVD reactor until the nitride layer is determined to achieve a target thickness over the oxide layer.
Abstract:
Methods are provided for conducting a deposition on a semiconductor substrate by selectively depositing a material on the substrate. The substrate has a plurality of substrate materials, each with a different nucleation delay corresponding to the material deposited thereon. Specifically, the nucleation delay associated with a first substrate material on which deposition is intended is less than the nucleation delay associated with a second substrate material on which deposition is not intended according to a nucleation delay differential, which degrades as deposition proceeds. A portion of the deposited material is etched to reestablish the nucleation delay differential between the first and the second substrate materials. The material is further selectively deposited on the substrate.
Abstract:
Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.
Abstract:
Thin AlN films are oxidatively treated in a plasma to form AlO and AlON films without causing damage to underlying layers of a partially fabricated semiconductor device (e.g., to underlying metal and/or dielectric layers). The resulting AlO and AlON films are characterized by improved leakage current compared to the AlN film and are suitable for use as etch stop layers. The oxidative treatment involves contacting the substrate having an exposed AlN layer with a plasma formed in a process gas comprising an oxygen-containing gas and a hydrogen-containing gas. In some implementations oxidative treatment is performed with a plasma formed in a process gas including CO2 as an oxygen-containing gas, H2 as a hydrogen-containing gas, and further including a diluent gas. The use of a hydrogen-containing gas in the plasma eliminates the oxidative damage to the underlying layers.
Abstract:
Methods of depositing conformal aluminum nitride films on semiconductor substrates are provided. Disclosed methods involve (a) exposing a substrate to an aluminum-containing precursor, (b) purging the aluminum-containing precursor for a duration insufficient to remove substantially all of the aluminum-containing precursor in gas phase, (c) exposing the substrate to a nitrogen-containing precursor to form aluminum nitride, (d) purging the nitrogen-containing precursor, and (e) repeating (a) through (d). Increased growth rate and 100% step coverage and conformality are attained.
Abstract:
A dielectric diffusion barrier is deposited on a substrate that has a via and an overlying trench etched into an exposed layer of inter-layer dielectric, wherein there is exposed metal from the underlying interconnect at the bottom of the via. In order to provide a conductive path from the underlying metallization layer to the metallization layer that is being formed over it, the dielectric diffusion barrier is formed selectively on the inter-layer dielectric and not on the exposed metal at the bottom of the via. In one example a dielectric SiNC diffusion barrier layer is selectively deposited on the inter-layer dielectric using a remote plasma deposition and a precursor that contains both silicon and nitrogen atoms. Generally, a variety of dielectric diffusion barrier materials with dielectric constants of between about 3.0-20.0 can be selectively formed on inter-layer dielectric.
Abstract:
Various embodiments include an apparatus to supply precursor gases to a processing tool. In various examples, the apparatus includes a point-of-use (POU) valve manifold that includes a manifold body to couple to a processing chamber of the processing tool. The manifold body has a multiple precursor-gas outlet ports surrounded by an annulus. A purge-gas outlet port of the manifold body is directed substantially toward interior walls of the annulus. For each of multiple precursor gases, the POU-valve manifold further includes: a first valve coupled to the manifold body and a divert valve coupled to the first valve. The first valve can be coupled to a precursor-gas supply and has a separate precursor-gas flow path internal to the manifold body. The divert valve diverts the precursor gas during a period when the precursor gas is not to be directed into the processing chamber by the first valve. Other examples are disclosed.
Abstract:
Showerheads for independently delivering different, mutually-reactive process gases to a wafer processing space are provided. The showerheads include a first gas distributor that has multiple plenum structures that are separated from one another by a gap, as well as a second gas distributor positioned above the first gas distributor. Isolation gas from the second gas distributor may be flowed down onto the first gas distributor and through the gaps in between the plenum structures of the first gas distributor, thereby establishing an isolation gas curtain that prevents the process gases released from each plenum structure from parasitically depositing on the plenum structures that provide other gases.
Abstract:
Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.