公开(公告)号：US20050093810A1

公开(公告)日：2005-05-05

申请号：US10954051

申请日：2004-09-30

申请人： Satoru Ito

发明人： Satoru Ito

IPC分类号： G02F1/133 ,  G09G3/20 ,  G09G3/36

CPC分类号： G09G3/20 ,  G09G3/3674 ,  G09G2310/0224 ,  G09G2310/0267 ,  G09G2310/0283

摘要： A display driver which drives at least a plurality of scan lines of a liquid crystal device which has a plurality of data lines and a plurality of pixels in addition to the scan lines, the display driver including a plurality of scan drive cells; a plurality of scan order registers; and a plurality of coincidence detection circuits. Each of the scan drive cells drives one of the scan lines. Each of the scan order registers is connected to one of the coincidence detection circuits, and stores a scan order address which is used to show a scan order. Each of the coincidence detection circuits is connected to one of the scan drive cells, and outputs a result of comparison of the scan order address stored in each of the scan order registers with a scan line address designated by a scan control signal, to one of the scan drive cells.

摘要翻译： 一种显示驱动器，其驱动除扫描线之外还具有多条数据线和多个像素的液晶装置的至少多条扫描线，所述显示驱动器包括多个扫描驱动单元; 多个扫描顺序寄存器; 和多个符合检测电路。 每个扫描驱动单元驱动其中一条扫描线。 每个扫描顺序寄存器连接到一个重合检测电路，并存储用于显示扫描顺序的扫描顺序地址。 每个重合检测电路连接到扫描驱动单元之一，并将存储在每个扫描顺序寄存器中的扫描顺序地址与由扫描控制信号指定的扫描线地址的比较结果输出到 扫描驱动器单元。

公开(公告)号：US06819209B2

公开(公告)日：2004-11-16

申请号：US10691693

申请日：2003-10-24

申请人： Hisashi Yajima ,  Nobuhiro Fujiwara ,  Satoru Ito

发明人： Hisashi Yajima ,  Nobuhiro Fujiwara ,  Satoru Ito

IPC分类号： H01F708

CPC分类号： F16F15/03

摘要： A magnetic damper comprises a movable braking plate for receiving an operating element of an actuator, and a stator for attracting the braking plate by a magnetic force. A magnetic attraction force acting between the stator and the braking plate is used as a braking force for stopping the operating element.

摘要翻译： 磁阻尼器包括用于接收致动器的操作元件的可动制动板和用于通过磁力吸引制动板的定子。 作用在定子和制动板之间的磁吸引力被用作停止操作元件的制动力。

公开(公告)号：US5745092A

公开(公告)日：1998-04-28

申请号：US735947

申请日：1996-10-23

申请人： Satoru Ito

发明人： Satoru Ito

IPC分类号： G09G3/36

CPC分类号： G09G3/3696 ,  G09G3/3681 ,  G09G3/3685 ,  G09G3/3692 ,  G09G2310/0205 ,  G09G2310/027 ,  G09G2310/0289

摘要： An object is to provide a power supply technique which is optimum when the source voltage range of a signal driver is different from that of a scan driver. A power supply unit supplies a source voltage group of V11, VC1 and V12 of the same polarity having a narrower source voltage range to the signal driver and another source voltage group of V10, VC2 and V15 of the same polarity having a wider source voltage range to the scan driver. The center voltages VC1 and VC2 within these source voltage ranges are equal to each other. The power supply unit has a means for adjusting the source voltages. A control signal and other signals from a control unit are transformed in level by a potential transforming unit. When it is desired to accomplish the display-off function, the outputs of the signal and scan drivers are set to be equal to VC level. Thus, the adjustment of liquid-crystal driving voltages can be accomplished by a simplified adjustment device while maintaining the accurate ratio of voltage division.

摘要翻译： 目的是提供一种当信号驱动器的源电压范围与扫描驱动器的源极电压范围不同时最佳的电源技术。 电源单元将具有较窄源极电压范围的相同极性的V11，VC1和V12的源极电压组提供给具有较宽源极电压范围的相同极性的V10，VC2和V15的另一个源极电压组 到扫描驱动程序。 这些源电压范围内的中心电压VC1和VC2彼此相等。 电源单元具有用于调节源极电压的装置。 来自控制单元的控制信号和其他信号由电位变换单元变换成电平。 当需要完成显示关闭功能时，将信号和扫描驱动器的输出设置为等于VC级。 因此，可以通过简化的调整装置来实现液晶驱动电压的调整，同时保持精确的分压比。

公开(公告)号：US5684095A

公开(公告)日：1997-11-04

申请号：US678743

申请日：1996-07-11

申请人： Kotaro Morimoto ,  Chicara Kawamura ,  Noboru Nakai ,  Haruhiko Aida ,  Noboru Takoh ,  Satoru Ito

发明人： Kotaro Morimoto ,  Chicara Kawamura ,  Noboru Nakai ,  Haruhiko Aida ,  Noboru Takoh ,  Satoru Ito

IPC分类号： C08G59/28 ,  C08G59/70 ,  C08K5/5415 ,  C09D163/00 ,  C09D167/00 ,  C08L63/00 ,  C08L67/02

CPC分类号： C09D163/00 ,  C08G59/28 ,  C08G59/70 ,  C08K5/5415 ,  C09D167/00

摘要： The invention relates to a curable coating composition comprising: (a) a hydroxyl-containing polyester resin having a solubility parameter in the range of 10.0 to 12.0, (b) a polyepoxide, (c) a silicon compound having 1 to 20 silicon atoms in one molecule and represented by the rational formula SiO.sub.(4-(a+b))/2 (OR.sup.1).sub.a (OR.sup.2).sub.b (1) wherein R.sup.1 is an alkyl group having 1 to 3 carbon atoms, or a hydrogen atom, R.sup.2 is an aryl group, an aralkyl group, or a monovalent hydrocarbon group containing an ether linkage and/or ester linkage and having 4 to 24 carbon atoms, a represents a number between 0.10 to 3.95 and b represents a number between 0.05 and 1.95, provided that a+b=4 or less, (d) at least one chelate compound selected from the group consisting of aluminum chelate compounds, titanium chelate compounds, zirconium chelate compounds and tin chelate compounds, and (e) an organic solvent.

摘要翻译： 本发明涉及一种可固化涂料组合物，其包含：（a）溶解度参数在10.0至12.0范围内的含羟基的聚酯树脂，（b）聚环氧化物，（c）具有1至20个硅原子的硅化合物 一个分子，由合理的式（4-（a + b））/ 2（OR1）a（OR2）b（1）表示，其中R1是具有1至3个碳原子的烷基或氢原子，R2是 芳基，芳烷基或含有醚键和/或酯键并具有4〜24个碳原子的一价烃基，a表示0.10〜3.95的数，b表示0.05〜1.95的数，条件是 a + b = 4以下，（d）至少一种选自铝螯合化合物，钛螯合物，锆螯合物和锡螯合物的螯合物，和（e）有机溶剂。

公开(公告)号：US5539257A

公开(公告)日：1996-07-23

申请号：US456942

申请日：1995-06-01

申请人： Yuji Hara ,  Satoru Ito ,  Tatsuro Toya

发明人： Yuji Hara ,  Satoru Ito ,  Tatsuro Toya

IPC分类号： H01L23/29 ,  H01L23/31 ,  H01L23/58 ,  H01L27/02 ,  H01L23/48 ,  H01L29/34 ,  H01L29/44

CPC分类号： H01L23/3171 ,  H01L23/291 ,  H01L23/585 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181

摘要： A resin molded type semiconductor device has a metallic guard ring that is formed to cover the peripheral edge of the surface of a tetragonal semiconductor substrate. In order to prevent a passivation film on the guard ring from being cracked by stresses due to a resin mold package concentrating in the four corners of the semiconductor substrate, slits or rows of small holes are formed in the corner portions of the guard ring.

公开(公告)号：US4625227A

公开(公告)日：1986-11-25

申请号：US744151

申请日：1985-06-13

申请人： Yuji Hara ,  Satoru Ito ,  Tatsuro Toya

发明人： Yuji Hara ,  Satoru Ito ,  Tatsuro Toya

IPC分类号： H01L21/822 ,  H01L21/31 ,  H01L21/3205 ,  H01L23/29 ,  H01L23/31 ,  H01L23/52 ,  H01L23/58 ,  H01L27/04 ,  H01L29/40 ,  H01L23/48 ,  H01L27/02 ,  H01L29/34

CPC分类号： H01L23/585 ,  H01L23/291 ,  H01L23/3171 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01068 ,  H01L2924/01077 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181

摘要： A resin molded type semiconductor device has a metallic guard ring that is formed to cover the peripheral edge of the surface of a tetragonal semiconductor substrate. In order to prevent a passivation film on the guard ring from being cracked by stresses due to a resin mold package concentrating in the four corners of the semiconductor substrate, slits or rows of small holes are formed in the corner portions of the guard ring.

摘要翻译： 树脂模制型半导体器件具有形成为覆盖四边形半导体衬底的表面的周缘的金属保护环。 为了防止保护环上的钝化膜由于聚集在半导体衬底的四个角中的树脂模具封装而受到应力的破坏，在保护环的角部形成有狭缝或一排小孔。

公开(公告)号：US4067099A

公开(公告)日：1978-01-10

申请号：US719239

申请日：1976-08-31

申请人： Satoru Ito ,  Masataka Ota ,  Katsuro Sugawara

发明人： Satoru Ito ,  Masataka Ota ,  Katsuro Sugawara

IPC分类号： C23C14/34 ,  H01L21/283 ,  H01L21/31 ,  H01L21/316 ,  H01L21/56 ,  H01L21/60 ,  H01L23/485 ,  H01L23/58 ,  H01L21/203

CPC分类号： H01L24/48 ,  H01L21/02164 ,  H01L21/02266 ,  H01L21/02304 ,  H01L21/31612 ,  H01L21/56 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L24/45 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/12036 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/3025 ,  Y10S438/958

摘要： A method of forming a passivation film, wherein after circuit elements have been formed in the semiconductor substrate, a thin conductive film is formed on the entire surface of the substrate and then an insulating film is formed through electric discharge on the surface of the thin conductive film while the thin conductive film is kept at a constant potential.

摘要翻译： 一种形成钝化膜的方法，其中在半导体衬底中形成电路元件之后，在衬底的整个表面上形成薄导电膜，然后通过在薄导体表面上的放电形成绝缘膜 同时薄导电膜保持在恒定电位。

公开(公告)号：US08786762B2

公开(公告)日：2014-07-22

申请号：US13032972

申请日：2011-02-23

申请人： Satoru Ito

发明人： Satoru Ito

IPC分类号： H04N5/232

CPC分类号： G03B13/36 ,  G02B7/36 ,  G03B3/10 ,  H04N5/23212

摘要： An imaging device of the present invention comprises an imaging section for forming a subject image using a photographing lens and generating image data, a contrast detection section for detecting contrast values corresponding to contrast of the subject image, for every position of the photographing lens, based on the image data, a subject brightness detection section for detecting brightness evaluation values corresponding to subject brightness of the subject image for every position of the photographing lens, based on the image data, a correction section for correcting the contrast values depending on a brightness evaluation value for a corresponding position of the photographing lens and calculating corrected contrast value, and a focus detection section for detecting a focus position of the photographing lens based on the corrected contrast values that have been corrected by the correction section.

摘要翻译： 本发明的成像装置包括：成像部分，用于使用拍摄镜头形成被摄体图像并产生图像数据;对比度检测部分，用于检测与拍摄镜头的每个位置对应的被摄体图像的对比度值，基于 在图像数据上，被摄体亮度检测部分，用于根据图像数据检测与拍摄镜头的每个位置对应的被摄体图像的被摄体亮度的亮度评估值，校正部分，用于根据亮度评估校正对比度值 拍摄镜头的对应位置的值，以及计算校正后的对比度值;以及焦点检测部分，用于基于由校正部分校正的校正的对比度值来检测拍摄镜头的焦点位置。

公开(公告)号：US20140021429A1

公开(公告)日：2014-01-23

申请号：US14006424

申请日：2013-01-18

申请人： Satoru Ito ,  Satoru Fujii ,  Shinichi Yoneda ,  Takumi Mikawa

发明人： Satoru Ito ,  Satoru Fujii ,  Shinichi Yoneda ,  Takumi Mikawa

IPC分类号： H01L45/00

CPC分类号： G11C13/0007 ,  G11C2213/32 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

摘要： A nonvolatile memory element includes a first electrode, a second electrode, and a variable resistance layer positioned between the first electrode and the second electrode. The variable resistance layer has a resistance state which reversibly changes based on an electrical signal applied between the first electrode and the second electrode. The variable resistance layer includes a first variable resistance layer having a first metal oxide and a second variable resistance layer having a second metal oxide. The second variable resistance layer includes a metal-metal bonding region including a metal bond of metal atoms included in the second metal oxide, and the second metal oxide has a low degree of oxygen deficiency and a high resistance value compared to the first metal oxide.

摘要翻译： 非易失性存储元件包括位于第一电极和第二电极之间的第一电极，第二电极和可变电阻层。 可变电阻层具有基于施加在第一电极和第二电极之间的电信号而可逆地改变的电阻状态。 可变电阻层包括具有第一金属氧化物的第一可变电阻层和具有第二金属氧化物的第二可变电阻层。 第二可变电阻层包括与第一金属氧化物相比具有包括在第二金属氧化物中的包含金属原子的金属键的金属 - 金属结合区域，并且第二金属氧化物具有低的氧缺乏程度和高的电阻值。

公开(公告)号：US20130015522A1

公开(公告)日：2013-01-17

申请号：US13621115

申请日：2012-09-15

申请人： Toshie KUTSUNAI ,  Satoru Ito

发明人： Toshie KUTSUNAI ,  Satoru Ito

IPC分类号： H01L27/092

CPC分类号： H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66628 ,  H01L29/7833 ,  H01L29/7834 ,  H01L29/7848

摘要： A semiconductor device includes an active region formed in a semiconductor substrate made of silicon, and surrounded by an isolation region; and a gate electrode formed on the active region and the isolation region with a gate insulating film interposed between the gate electrode and the active region or the isolation region. P-type silicon alloy layers are formed in recess regions formed in regions of the active region located laterally outward of the gate electrode, and an upper end of a portion of each of the silicon alloy layers in contact with the isolation region is located below a portion of an upper surface of the active region under the gate insulating film.

摘要翻译： 半导体器件包括形成在由硅制成并被隔离区域包围的半导体衬底中的有源区; 以及栅电极，形成在有源区和隔离区上，栅极绝缘膜介于栅电极和有源区或隔离区之间。 P型硅合金层形成在位于栅电极横向外侧的有源区域的区域中的凹陷区域中，与隔离区域接触的每个硅合金层的一部分的上端位于 在栅极绝缘膜下面的有源区的上表面的一部分。