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    METHODS AND SYSTEMS FOR MANUFACTURING SEMICONDUCTOR DEVICES
    52.
    发明申请
    METHODS AND SYSTEMS FOR MANUFACTURING SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20200212000A1

    公开(公告)日：2020-07-02

    申请号：US16236257

    申请日：2018-12-28

    Applicant: Micron Technology, Inc.

    Inventor： Wei Zhou ,  Bret K. Street ,  Benjamin L. McClain ,  Mark E. Tuttle

    IPC: H01L23/00 ,  H01L23/48

    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.

    THRUMOLD POST PACKAGE WITH REVERSE BUILD UP HYBRID ADDITIVE STRUCTURE
    53.
    发明申请
    THRUMOLD POST PACKAGE WITH REVERSE BUILD UP HYBRID ADDITIVE STRUCTURE 审中-公开

    公开(公告)号：US20190067038A1

    公开(公告)日：2019-02-28

    申请号：US16123158

    申请日：2018-09-06

    Applicant: Micron Technology, Inc.

    Inventor： Chan H. Yoo ,  John F. Kaeding ,  Ashok Pachamuthu ,  Mark E. Tuttle

    IPC: H01L21/56 ,  H01L23/31

    Abstract: Semiconductor devices having a semiconductor die electrically coupled to a redistribution structure and a molded material over the redistribution structure are disclosed herein, along with associated systems and methods. In one embodiment, a semiconductor device includes a semiconductor die attached to a first side of a substrate-free redistribution structure, and a plurality of conductive columns extending through a molded material disposed on the first side of the redistribution structure. The semiconductor device can also include a second redistribution structure on the molded material and electrically coupled to the conductive columns. A semiconductor device can be manufactured using a single carrier and requiring processing on only a single side of the semiconductor device.

    USE OF PRE-CHANNELED MATERIALS FOR ANISOTROPIC CONDUCTORS
    56.
    发明申请
    USE OF PRE-CHANNELED MATERIALS FOR ANISOTROPIC CONDUCTORS 有权

    公开(公告)号：US20240387441A1

    公开(公告)日：2024-11-21

    申请号：US18787347

    申请日：2024-07-29

    Applicant: Micron Technology, Inc.

    Inventor： Mark E. Tuttle ,  John F. Kaeding ,  Owen R. Fay ,  Eiichi Nakano ,  Shijian Luo

    IPC: H01L23/00

    Abstract: A semiconductor device assembly has a first substrate, a second substrate, and an anisotropic conductive film. The first substrate includes a first plurality of connectors. The second substrate includes a second plurality of connectors. The anisotropic conductive film is positioned between the first plurality of connectors and the second plurality of connectors. The anisotropic conductive film has an electrically insulative material and a plurality of interconnects laterally separated by the electrically insulative material. The plurality of interconnects forms electrically conductive channels extending from the first plurality of connectors to the second plurality of connectors. A method includes connecting the plurality of interconnects to the first plurality of connectors and the second plurality of connectors, such that the electrically conductive channels are operable to conduct electricity from the first substrate to the second substrate. The method may include passing electrical current through the plurality of interconnects.

    Dual sided fan-out package having low warpage across all temperatures
    57.
    发明授权
    Dual sided fan-out package having low warpage across all temperatures 有权

    公开(公告)号：US11239206B2

    公开(公告)日：2022-02-01

    申请号：US16905435

    申请日：2020-06-18

    Applicant: Micron Technology, Inc.

    Inventor： Chan H. Yoo ,  Mark E. Tuttle

    IPC: H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31

    Abstract: Semiconductor devices including a dual-sided redistribution structure and having low-warpage across all temperatures and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a first semiconductor die electrically coupled to a first side of a redistribution structure and a second semiconductor die electrically coupled to a second side of the redistribution structure opposite the first side. The semiconductor device also includes a first molded material on the first side, a second molded material on the second side, and conductive columns electrically coupled to the first side and extending through the first molded material. The first and second molded materials can have the same volume and/or coefficients of thermal expansion to inhibit warpage of the semiconductor device.

    Semiconductor device structures for burn-in testing and methods thereof
    58.
    发明授权
    Semiconductor device structures for burn-in testing and methods thereof 有权

    公开(公告)号：US10712382B2

    公开(公告)日：2020-07-14

    申请号：US16268912

    申请日：2019-02-06

    Applicant: Micron Technology, Inc.

    Inventor： Mark E. Tuttle

    IPC: G01R31/28 ,  H01L23/498 ,  H01L23/00 ,  H01L23/538 ,  H01L23/525 ,  H01L21/66 ,  G01R31/50

    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, an electrical connection structure extending upwardly from an upper surface of the substrate by a first height, and a contact pad electrically disposed on the upper surface of the substrate. The contact pad has a solder-wettable surface with an area configured to support a solder ball having a second height at least twice the first height. The semiconductor device structure further includes a fuse element with a first end electrically coupled to the electrical connection structure and a second end electrically coupled to the contact pad.

    METHODS AND SYSTEMS FOR MANUFACTURING SEMICONDUCTOR DEVICES
    59.
    发明申请
    METHODS AND SYSTEMS FOR MANUFACTURING SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20200211999A1

    公开(公告)日：2020-07-02

    申请号：US16236250

    申请日：2018-12-28

    Applicant: Micron Technology, Inc.

    Inventor： Wei Zhou ,  Bret K. Street ,  Benjamin L. McClain ,  Mark E. Tuttle

    IPC: H01L23/00 ,  H01L23/48

    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.

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