-
公开(公告)号:US20210358550A1
公开(公告)日:2021-11-18
申请号:US17070238
申请日:2020-10-14
申请人: SK hynix Inc.
发明人: Hee Youl LEE
摘要: A method of operating a semiconductor device includes applying a first voltage to a first source select line coupled to first source select transistors of memory strings included in an unselected memory block, among memory blocks, floating the first source select line after the first voltage is applied thereto, applying a second voltage having a lower voltage level than the first voltage to a second source select line coupled to second source select transistors of the memory strings included in the unselected memory block, applying a precharge voltage to a common source line, and applying a program voltage to a word line coupled to selected memory cells of memory strings included in a selected memory block, among the memory blocks.
-
公开(公告)号:US20210183458A1
公开(公告)日:2021-06-17
申请号:US16900433
申请日:2020-06-12
申请人: SK hynix Inc.
发明人: Hee Youl LEE
摘要: A memory device and an operating method thereof are provided. The memory device includes: a plurality of memory strings connected between a bit and source lines, the plurality of memory strings connected to a first select line, a plurality of word lines, and a second select line, which are disposed between the bit line and the source line; a peripheral circuit for programming a selected memory cell included in a selected memory string among the memory strings; and control logic for controlling the peripheral circuit to program the selected memory cell. The control logic controls the peripheral circuit to apply a positive voltage to the bit and source lines, which are connected to an unselected memory string, before a program voltage is applied to a selected word line connected to the selected memory cell, and discharge the word lines and the first and second select lines at different times.
-
公开(公告)号:US20200185047A1
公开(公告)日:2020-06-11
申请号:US16598922
申请日:2019-10-10
申请人: SK hynix Inc.
发明人: Hee Youl LEE
摘要: A method of operating a semiconductor memory device includes dummy-programming selected memory cells representing all the memory cells to be programmed for a programming operation. The method also includes determining as a first group of memory cells those selected memory cells having threshold voltages less than or equal to a reference threshold voltage and determining as a second group of memory cells those selected memory cells having threshold voltages greater than the reference threshold voltage. The method further includes programming the selected memory cells by applying a first bit line voltage to the memory cells of the first group, applying a second bit line voltage different from the first bit line voltage to the memory cells of the second group, and applying a same program pulse to the memory cells of the first and second groups.
-
公开(公告)号:US20200143883A1
公开(公告)日:2020-05-07
申请号:US16424124
申请日:2019-05-28
申请人: SK hynix Inc.
发明人: Han Soo JOO , Ji Hyun SEO , Hee Youl LEE
摘要: A semiconductor device and method of operating a semiconductor device, the semiconductor device includes memory strings coupled between a common source line and a bit line, and a peripheral circuit coupled to the memory strings through a plurality of word lines and a dummy word line, and configured to set bias of the word lines and the dummy word line before performing a read operation, wherein the peripheral circuit applies a first pass voltage to the word lines concurrently with applying an initial voltage lower than the first pass voltage to the dummy word line, and increases the first pass voltage and the initial voltage to a second pass voltage to set the bias of the word lines and the dummy word line.
-
公开(公告)号:US20200020403A1
公开(公告)日:2020-01-16
申请号:US16584469
申请日:2019-09-26
申请人: SK hynix Inc.
摘要: The invention is directed to an electronic device. A memory device having improved reliability according to an embodiment includes a memory cell array including a plurality of memory cells, a peripheral circuit performing a program operation on selected memory cells, among the plurality of memory cells, and a control logic controlling the peripheral circuit to perform an additional program operation on memory cells corresponding to a deep erased state where the memory cells has a threshold voltage having a lower voltage level than a threshold voltage of an erase state, among the selected memory cells, after the program operation is completed.
-
公开(公告)号:US20190272880A1
公开(公告)日:2019-09-05
申请号:US16170854
申请日:2018-10-25
申请人: SK hynix Inc.
发明人: Hee Youl LEE
IPC分类号: G11C16/16 , G11C16/08 , G11C16/24 , G11C16/04 , H01L27/11556 , H01L27/11582
摘要: The semiconductor memory device includes a memory cell array, an address decoder, a switch, and a control logic. The memory cell array includes a plurality of memory blocks having a plurality of memory cells. The address decoder is connected to the memory cell array through row lines. The switch is connected non-memory lines among the row lines. The control logic controls operations of the address decoder and the switch. During an erase operation on memory cells included in a selected memory block among the plurality of memory blocks, the control logic controls the switch to precharge non-memory lines connected to an unselected memory block among the plurality of memory blocks and then float the non-memory lines connected to the unselected memory block.
-
公开(公告)号:US20190206690A1
公开(公告)日:2019-07-04
申请号:US16295932
申请日:2019-03-07
申请人: SK hynix Inc.
发明人: Hee Youl LEE
IPC分类号: H01L21/28 , G06F13/42 , G06F12/16 , H01L29/51 , G11C11/56 , G06F12/02 , G11C16/34 , G11C16/10 , G11C16/04
CPC分类号: H01L21/28141 , G06F12/02 , G06F12/16 , G06F13/4243 , G11C11/5628 , G11C16/0466 , G11C16/0483 , G11C16/10 , G11C16/26 , G11C16/3459 , H01L21/28273 , H01L29/513
摘要: Provided herein may be a memory device and a method of operating the same. The memory device may include a memory block including a plurality of pages, and peripheral circuits configured to sequentially program the pages. The memory device may include control logic configured to control the peripheral circuits such that a program voltage is applied to a word line coupled to a page selected from among the pages such that different pass voltages are applied to all or some word lines coupled to pages on which a program operation has been performed among unselected pages other than the selected page, and to word lines coupled to pages on which a program operation has not been performed among the unselected pages.
-
公开(公告)号:US20190122743A1
公开(公告)日:2019-04-25
申请号:US16226410
申请日:2018-12-19
申请人: SK hynix Inc.
发明人: Hee Youl LEE
IPC分类号: G11C29/08 , G11C29/50 , G11C11/413 , G11C16/10 , G11C16/08 , G11C16/34 , G11C8/08 , G11C16/04
CPC分类号: G11C29/08 , G11C8/08 , G11C11/413 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/3459 , G11C29/50 , G11C2029/0411 , G11C2029/5004
摘要: A semiconductor memory device includes a memory cell array including a plurality of memory cells coupled between a common source line and a bit line, and a voltage generator applying operating voltages to word lines coupled to the memory cells or discharging potential levels of the word lines, wherein during a program verify operation, the voltage generator applies a program verify voltage and a pass voltage as the operating voltages to the word lines, and subsequently applies a set voltage to the common source line during a period in which the memory cells are turned on.
-
公开(公告)号:US20190057752A1
公开(公告)日:2019-02-21
申请号:US16168279
申请日:2018-10-23
申请人: SK hynix Inc.
发明人: Hee Youl LEE
摘要: Disclosed are a memory device, including: a memory block including a plurality of cell strings; a peripheral circuit configured to set voltages for a program operation of selected memory cells in the cell strings, and program the selected memory cells by using the set voltages; and a control circuit configured to control the peripheral circuit so that the selected memory cells are programmed in response to a program command, and increase a channel voltage of non-selected cell strings including non-selected memory cells while the selected memory cells are programmed, and an operating method thereof.
-
公开(公告)号:US20180247697A1
公开(公告)日:2018-08-30
申请号:US15720525
申请日:2017-09-29
申请人: SK hynix Inc.
发明人: Hee Youl LEE
IPC分类号: G11C29/08 , G11C29/50 , G11C11/413
CPC分类号: G11C29/08 , G11C8/08 , G11C11/413 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/3459 , G11C29/50 , G11C2029/0411 , G11C2029/5004
摘要: A semiconductor memory device includes a memory cell array including a plurality of memory cells coupled between a common source line and a bit line, and a voltage generator applying operating voltages to word lines coupled to the memory cells or discharging potential levels of the word lines, wherein during a program verify operation, the voltage generator applies a program verify voltage and a pass voltage as the operating voltages to the word lines, and subsequently applies a set voltage to the common source line during a period in which the memory cells are turned on.
-
-
-
-
-
-
-
-
-