公开(公告)号：US20230343856A1

公开(公告)日：2023-10-26

申请号：US18212018

申请日：2023-06-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuya Kakehata ,  Yuta Endo

IPC: H01L29/66 ,  H01L21/02

CPC classification number: H01L29/66742 ,  H01L21/02266 ,  H01L21/0228 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02178 ,  H01L29/66969

Abstract: A semiconductor device with high on-state current and high reliability is provided. The semiconductor device includes first to fifth insulators, first to third oxides, and first to fourth conductors; the fifth insulator includes an opening in which the second oxide is exposed; the third oxide is placed in contact with a bottom portion of the opening and a side portion of the opening; the second insulator is placed in contact with the third oxide; the third conductor is provided in contact with the second insulator; the third insulator is placed in contact with a top surface of the third conductor and the second insulator; and the fourth conductor is in contact with the third insulator and the top surface of the third conductor and placed in the opening.

公开(公告)号：US11770939B2

公开(公告)日：2023-09-26

申请号：US17513982

申请日：2021-10-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Hideomi Suzawa

IPC: H01L27/105 ,  H01L23/52 ,  H01L29/24 ,  H10B99/00 ,  H01L23/528 ,  H01L27/02 ,  H01L29/66 ,  H01L29/786

CPC classification number: H10B99/00 ,  H01L23/528 ,  H01L27/0207 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869

Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes a first transistor, a second transistor, and an electrode. The first transistor and the second transistor include an oxide, a gate insulator over the oxide, and a gate. The electrode is connected to one of a source and a drain of the first transistor and one of a source and a drain of the second transistor. The channel length of the first transistor is longer than the short side of the first conductor. The channel length of the second transistor is longer than the short side of the second conductor.

公开(公告)号：US11729960B2

公开(公告)日：2023-08-15

申请号：US17503651

申请日：2021-10-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hajime Kimura ,  Takayuki Ikeda ,  Kiyoshi Kato ,  Yuta Endo ,  Junpei Sugao

IPC: H10B12/00 ,  G11C5/02 ,  G11C11/403 ,  G11C11/409 ,  H01L29/24

CPC classification number: H10B12/00 ,  G11C5/02 ,  G11C11/403 ,  G11C11/409 ,  H01L29/24

Abstract: A semiconductor device with a large storage capacity per unit area is provided. A semiconductor device includes a memory cell. The memory cell includes a first conductor; a first insulator over the first conductor; a first oxide over the first insulator and including a first region, a second region, and a third region positioned between the first region and the second region; a second insulator over the first oxide; a second conductor over the second insulator; a third insulator positioned in contact with a side surface of the first region; and a second oxide positioned on the side surface of the first region, with the third insulator therebetween. The first region includes a region overlapping the first conductor. The third region includes a region overlapped by the second conductor. The first region and the second region have a lower resistance than the third region.

公开(公告)号：US11362034B2

公开(公告)日：2022-06-14

申请号：US16979244

申请日：2019-03-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuya Kakehata ,  Yuta Endo

IPC: H01L23/532 ,  H01L21/768

Abstract: A semiconductor device that is miniaturized and highly integrated is provided. One embodiment of the present invention is a semiconductor device including a first insulator, a second insulator, a first conductor, a second conductor, and a semiconductor layer; the first insulator includes an opening exposing the semiconductor layer; the first conductor is provided in contact with the semiconductor layer at a bottom of the opening; the second insulator is provided in contact with a top surface of the first conductor and a side surface in the opening; the second conductor is provided in contact with the top surface of the first conductor and in the opening with the second insulator therebetween; and the second insulator has a barrier property against oxygen.

公开(公告)号：US10923477B2

公开(公告)日：2021-02-16

申请号：US16484577

申请日：2018-02-06

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Yuta Endo ,  Shuhei Nagatsuka

IPC: H01L29/786 ,  H01L27/108 ,  H01L23/522 ,  H01L23/528 ,  H01L49/02 ,  H01L29/08 ,  H01L29/24 ,  H01L29/66 ,  H01L21/02 ,  H01L21/027 ,  H01L21/465

Abstract: A semiconductor device including a first oxide including a first region and a second region adjacent to each other and a third region and a fourth region with the first region and the second region sandwiched between the third region and the fourth region, a second oxide over the first region, a first insulator over the second oxide, a first conductor over the first insulator, a second insulator over the second oxide and on side surfaces of the first insulator and the first conductor, a third insulator over the second region and on a side surface of the second insulator, a second conductor over the second region with the third insulator positioned between the second region and the second conductor and on the side surface of the second insulator with the third insulator positioned between the side surface of the second insulator and the second conductor, and a fourth insulator covering the first oxide, the second oxide, the first insulator, the first conductor, the second insulator, the third insulator, and the second conductor and in contact with the third region and the fourth region.

公开(公告)号：US10699904B2

公开(公告)日：2020-06-30

申请号：US15488854

申请日：2017-04-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Kosei Noda ,  Yuichi Sato

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/49 ,  H01L29/06 ,  H01L21/8238 ,  H01L21/8234 ,  H01L21/461 ,  H01L21/3115 ,  H01L21/02

Abstract: A transistor that is formed using an oxide semiconductor film is provided. A transistor that is formed using an oxide semiconductor film with reduced oxygen vacancies is provided. A transistor having excellent electrical characteristics is provided. A semiconductor device includes a first insulating film, a first oxide semiconductor film, a gate insulating film, and a gate electrode. The first insulating film includes a first region and a second region. The first region is a region that transmits less oxygen than the second region does. The first oxide semiconductor film is provided at least over the second region.

公开(公告)号：US10546958B2

公开(公告)日：2020-01-28

申请号：US15907343

申请日：2018-02-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8258 ,  H01L27/06 ,  H01L27/12

Abstract: A miniaturized transistor with less variation and highly stable electrical characteristics is provided. Further, high performance and high reliability of a semiconductor device including the transistor are achieved. A semiconductor and a conductor are formed over a substrate, a sacrificial layer is formed over the conductor, and an insulator is formed to cover the sacrificial layer. After that, a top surface of the insulator is removed to expose a top surface of the sacrificial layer. The sacrificial layer and a region of the conductor overlapping with the sacrificial layer are removed, whereby a source region, a drain region, and an opening are formed. Next, a gate insulator and a gate electrode are formed in the opening.

公开(公告)号：US10522689B2

公开(公告)日：2019-12-31

申请号：US15605211

申请日：2017-05-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Hitomi Sato ,  Kosei Noda ,  Yuta Endo ,  Mizuho Ikarashi ,  Keitaro Imai ,  Atsuo Isobe ,  Yutaka Okazaki

IPC: H01L29/786 ,  H01L29/66

Abstract: It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

公开(公告)号：US10461101B2

公开(公告)日：2019-10-29

申请号：US15584064

申请日：2017-05-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo

IPC: H01L27/12 ,  G02F1/1368 ,  G02F1/1362 ,  H01L29/786

Abstract: A semiconductor device with high aperture ratio is provided. The semiconductor device includes a transistor and a capacitor having a pair of electrodes. An oxide semiconductor layer formed over the same insulating surface is used for a channel formation region of the transistor and one of the electrodes of the capacitor. The other electrode of the capacitor is a transparent conductive film. One electrode of the capacitor is electrically connected to a wiring formed over the insulating surface over which a source electrode or a drain electrode of the transistor is provided, and the other electrode of the capacitor is electrically connected to one of the source electrode and the drain electrode of the transistor.

公开(公告)号：US10403646B2

公开(公告)日：2019-09-03

申请号：US15041502

申请日：2016-02-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideomi Suzawa ,  Yuta Endo ,  Kazuya Hanaoka

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/475 ,  H01L21/4757

Abstract: A semiconductor device with reduced parasitic capacitance is provided. The semiconductor device includes a first insulating layer; a first oxide layer over the first insulating layer; a semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer over the semiconductor layer; a second insulating layer over the first insulating layer; a third insulating layer over the second insulating layer, the source electrode layer, and the drain electrode layer; a second oxide layer over the semiconductor layer; a gate insulating layer over the second oxide layer; a gate electrode layer over the gate insulating layer; and a fourth insulating layer over the third insulating layer, the second oxide layer, the gate insulating layer, and the gate electrode layer.