公开(公告)号：US09349750B2

公开(公告)日：2016-05-24

申请号：US14077390

申请日：2013-11-12

申请人： Hiroyuki Miyake ,  Shunpei Yamazaki ,  Yoshifumi Tanada ,  Manabu Sato ,  Toshinari Sasaki ,  Kenichi Okazaki ,  Junichi Koezuka ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki ,  Shigeyasu Mori

发明人： Hiroyuki Miyake ,  Shunpei Yamazaki ,  Yoshifumi Tanada ,  Manabu Sato ,  Toshinari Sasaki ,  Kenichi Okazaki ,  Junichi Koezuka ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki ,  Shigeyasu Mori

IPC分类号： H01L27/12 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L27/124 ,  H01L29/78648

摘要： A semiconductor device includes: a transistor including a gate electrode, a gate insulating film over the gate electrode, a semiconductor layer over the gate insulating film, and a source electrode and a drain electrode over the semiconductor layer; a first insulating film comprising an inorganic material over the transistor; a second insulating film comprising an organic material over the first insulating film; a first conductive film over the second insulating film and in a region overlapping with the semiconductor layer; a third insulating film comprising an inorganic material over the first conductive film; and a second conductive film over the third insulating film and in a region overlapping with the first conductive film. The absolute value of a first potential applied to the first conductive film is greater than the absolute value of a second potential applied to the second conductive film.

摘要翻译： 半导体器件包括：晶体管，包括栅极电极，栅极上的栅极绝缘膜，栅极绝缘膜上的半导体层，以及半导体层上的源极和漏极; 包括晶体管上的无机材料的第一绝缘膜; 包括在所述第一绝缘膜上的有机材料的第二绝缘膜; 在所述第二绝缘膜上并且在与所述半导体层重叠的区域中的第一导电膜; 在所述第一导电膜上包括无机材料的第三绝缘膜; 以及在所述第三绝缘膜上并且在与所述第一导电膜重叠的区域中的第二导电膜。 施加到第一导电膜的第一电位的绝对值大于施加到第二导电膜的第二电位的绝对值。

公开(公告)号：US09312278B2

公开(公告)日：2016-04-12

申请号：US14062085

申请日：2013-10-24

申请人： Junichi Koezuka ,  Yukinori Shima ,  Yasuharu Hosaka ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

发明人： Junichi Koezuka ,  Yukinori Shima ,  Yasuharu Hosaka ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

IPC分类号： H01L27/12 ,  H01L27/32

CPC分类号： H01L27/1225 ,  H01L27/3262

摘要： To improve the reliability of a transistor as well as to inhibit fluctuation in electric characteristics. A display device includes a pixel portion and a driver circuit portion outside the pixel portion; the pixel portion includes a pixel transistor, a first insulating film covering the pixel transistor and including an inorganic material, a second insulating film including an organic material over the first insulating film, and a third insulating film including an inorganic material over the second insulating film; and the driver circuit portion includes a driving transistor to supply a signal to the pixel transistor, the first insulating film covering the driving transistor, and the second insulating film over the first insulating film, and further includes a region in which the third insulating film is not formed over the second insulating film or a region in which the second insulating film is not covered with the third insulating film.

摘要翻译： 提高晶体管的可靠性以及抑制电特性的波动。 显示装置包括像素部分和像素部分外部的驱动器电路部分; 像素部分包括像素晶体管，覆盖像素晶体管并且包括无机材料的第一绝缘膜，在第一绝缘膜上的包括有机材料的第二绝缘膜，以及在第二绝缘膜上的包括无机材料的第三绝缘膜 ; 并且所述驱动电路部分包括驱动晶体管，用于向所述像素晶体管提供信号，所述第一绝缘膜覆盖所述驱动晶体管，并且所述第二绝缘膜在所述第一绝缘膜上方，并且还包括所述第三绝缘膜为 不形成在第二绝缘膜上或第二绝缘膜未被第三绝缘膜覆盖的区域。

公开(公告)号：US08546029B2

公开(公告)日：2013-10-01

申请号：US13040884

申请日：2011-03-04

申请人： Toshiharu Otsuka ,  Katsuhisa Tsuchiya ,  Tsukasa Shigezumi ,  Toshiharu Ooe ,  Kiyotaka Nakano ,  Takuya Matsuo

发明人： Toshiharu Otsuka ,  Katsuhisa Tsuchiya ,  Tsukasa Shigezumi ,  Toshiharu Ooe ,  Kiyotaka Nakano ,  Takuya Matsuo

IPC分类号： H01M8/06

CPC分类号： H01M8/04776 ,  H01M8/04425 ,  H01M8/0612 ,  H01M8/0618 ,  H01M8/2428 ,  H01M8/243 ,  H01M2008/1293

摘要： To provide a solid oxide fuel cell in which the reformer is compact but is capable of supplying an appropriate quantity of fuel. The present invention is a solid oxide fuel cell (1) for generating electricity using fuel reformed by a reformer (20) and air, including a fuel supply means (38), a reformed air supply means (44), a water supply means (28) for supplying water to the reformer, a fuel supply quantity detection sensor (132) for detecting the quantity of fuel actually supplied, a fuel cell module (2), and a control means (110) for controlling each supply means so that the target quantities of fuel, reforming air, and water are fed into the reformer; the control means controls the fuel supply means to match the target fuel supply quantity, and controls the fuel supply means so that tracking performance of fuel supply quantity relative to target fuel supply quantity is higher when reforming air is being supplied to the reformer than when it is not being supplied.

摘要翻译： 提供固体氧化物燃料电池，其中重整器紧凑但能够供应适量的燃料。 本发明是一种使用由重整器（20）重整的燃料和空气发电的固体氧化物型燃料电池（1），包括燃料供给装置（38），改质空气供给装置（44），供水装置 28），用于向重整器供水的燃料供给量检测传感器（132），用于检测实际供给的燃料量的燃料供给量检测传感器（132），燃料电池模块（2）和控制装置（110），用于控制每个供给装置， 将目标量的燃料，重整空气和水进料到重整器中; 控制装置控制燃料供给装置以匹配目标燃料供应量，并且控制燃料供应装置，使得当向重整器供应重整空气时，相对于目标燃料供应量的燃料供应量的跟踪性能比在 没有提供。

公开(公告)号：US20130171534A1

公开(公告)日：2013-07-04

申请号：US13823906

申请日：2011-09-28

申请人： Toshiharu Otsuka ,  Katsuhisa Tsuchiya ,  Tsukasa Shigezumi ,  Toshiharu Ooe ,  Kiyotaka Nakano ,  Takuya Matsuo

发明人： Toshiharu Otsuka ,  Katsuhisa Tsuchiya ,  Tsukasa Shigezumi ,  Toshiharu Ooe ,  Kiyotaka Nakano ,  Takuya Matsuo

IPC分类号： H01M8/06

CPC分类号： H01M8/0606 ,  C01B3/02 ,  C01B3/34 ,  C01B2203/0233 ,  C01B2203/0244 ,  C01B2203/0261 ,  C01B2203/066 ,  C01B2203/0816 ,  C01B2203/1258 ,  C01B2203/1604 ,  C01B2203/1619 ,  C01B2203/169 ,  H01M8/04022 ,  H01M8/04052 ,  H01M8/04089 ,  H01M8/04223 ,  H01M8/04268 ,  H01M8/0432 ,  H01M8/04373 ,  H01M8/04701 ,  H01M8/04738 ,  H01M8/04753 ,  H01M8/04761 ,  H01M8/04776 ,  H01M8/0618 ,  H01M8/0625 ,  H01M8/0662 ,  H01M8/0668 ,  H01M8/2425 ,  H01M8/243 ,  H01M8/2475 ,  H01M2008/1293 ,  Y02E60/50 ,  Y02E60/525

摘要： A solid oxide fuel cell device is provided which prevents excessive rising of the temperature inside a fuel cell module during the startup process. In a startup process, control unit controls to cause a transition from a fuel gas reforming reaction process to a POX process, an ATR process, and a SR process, then to a generating process; when the cell stack temperature and reformer temperature in each process satisfy respectively set transition conditions, a transition to the next process takes place; if control unit determines a temperature rise assist state exists, it executes an excess temperature rise suppression control so that during at least the transition to the generating process, the reformer temperature does not exceed a predetermined value.

摘要翻译： 提供固体氧化物燃料电池装置，其防止在启动过程中燃料电池模块内的温度过度上升。 在启动过程中，控制单元控制从燃料气体重整反应过程转变到POX过程，ATR过程和SR过程，然后进行生成过程; 当每个过程中的电池堆温度和重整器温度分别满足设定的转变条件时，发生向下一过程的转变; 如果控制单元确定温度上升辅助状态存在，则执行过度的升温抑制控制，使得在至少转换到生成过程中，重整器温度不超过预定值。

公开(公告)号：US08008292B2

公开(公告)日：2011-08-30

申请号：US11183265

申请日：2005-07-15

申请人： Yoshihisa Koga ,  Shinji Yata ,  Takashi Watanabe ,  Takuya Matsuo ,  Takayuki Yamasaki ,  Masahiro Sakata ,  Wataru Kondo ,  Hidekazu Ozeki ,  Yoshikazu Hori

发明人： Yoshihisa Koga ,  Shinji Yata ,  Takashi Watanabe ,  Takuya Matsuo ,  Takayuki Yamasaki ,  Masahiro Sakata ,  Wataru Kondo ,  Hidekazu Ozeki ,  Yoshikazu Hori

IPC分类号： A61K31/535 ,  C07D265/36 ,  C07D498/02

CPC分类号： A61K45/06 ,  C07D401/04 ,  C07D413/04 ,  C07D413/14 ,  C07D417/04 ,  C07D417/14

摘要： To provide a compound having an excellent inhibitory effect on vanilloid receptor subtype 1 (VR1) activity which is effective in treating diseases to which the vanilloid receptor subtype 1 (VR1) activity is involved, such as pain, acute pain, chronic pain, neuropathic pain, rheumatoid arthritis pain, neuralgia, etc. and a pharmaceutical composition containing the compound. The object has been attained by a condensed benzamide compound represented by the following formula (the symbols in the formula have the same meanings defined in the specification) or its salt:

摘要翻译： 为了提供对于涉及涉及香草素受体亚型1（VR1）活性的疾病（例如疼痛，急性疼痛，慢性疼痛，神经性疼痛）有效治疗对香草素受体亚型1（VR1）活性具有优异抑制作用的化合物 ，类风湿性关节炎疼痛，神经痛等，以及含有该化合物的药物组合物。 本发明的目的是通过下述式（式中的符号与说明书中所定义的相同含义）或其盐进行缩合的苯甲酰胺化合物来实现：

公开(公告)号：US07868398B2

公开(公告)日：2011-01-11

申请号：US11542217

申请日：2006-10-04

申请人： Takeshi Noda ,  Hidehito Kitakado ,  Takuya Matsuo

发明人： Takeshi Noda ,  Hidehito Kitakado ,  Takuya Matsuo

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/66757 ,  H01L29/42384 ,  H01L29/78603 ,  H01L29/78621 ,  H01L29/78675

摘要： A semiconductor device, which can improve the effect of a hydrogenation treatment in case of using a GOLD structure, and a method of manufacturing thereof is provided. A gate insulating film is formed on a semiconductor layer, and a source region, a drain region, and LDD regions are formed in the semiconductor layer. A main gate is formed on the gate insulating film. A sub-gate is formed on the main gate and the gate insulating film so as to cover a part of the main gate and either the LDD regions adjacent to the source region or the drain region. An interlayer insulating film containing hydrogen is formed on the sub-gate, main gate, and gate insulating film. Subsequently, a heat treatment for hydrogenation is performed to terminate a crystal defect of the semiconductor layer with hydrogen.

摘要翻译： 提供了可以提高在使用GOLD结构的情况下氢化处理的效果的半导体器件及其制造方法。 在半导体层上形成栅极绝缘膜，在半导体层中形成源极区，漏极区，LDD区。 在栅极绝缘膜上形成主栅极。 在主栅极和栅极绝缘膜上形成子栅极，以覆盖主栅极的一部分和与源极区域或漏极区域相邻的LDD区域。 在子栅极，主栅极和栅极绝缘膜上形成含有氢的层间绝缘膜。 随后，进行用于氢化的热处理，以氢终止半导体层的晶体缺陷。

公开(公告)号：US07625785B2

公开(公告)日：2009-12-01

申请号：US11896155

申请日：2007-08-30

申请人： Hideto Ohnuma ,  Masayuki Sakakura ,  Yasuhiro Mitani ,  Takuya Matsuo ,  Hidehito Kitakado

发明人： Hideto Ohnuma ,  Masayuki Sakakura ,  Yasuhiro Mitani ,  Takuya Matsuo ,  Hidehito Kitakado

IPC分类号： H01L21/84

CPC分类号： H01L29/66757 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/12 ,  H01L27/1277

摘要： A semiconductor device having a crystalline semiconductor film with production of a cavity suppressed and a manufacturing method thereof A manufacturing method of a semiconductor device according to the invention comprises the steps of forming an amorphous silicon film on a substrate having an insulating surface, adding a metal element such as Ni for promoting crystallization to the amorphous silicon film, applying heat treatment to crystallize the amorphous silicon film, so that a crystalline silicon film is formed on the substrate, removing a silicon oxide film formed on the surface of the crystalline silicon film due to the heat treatment by a solution containing organic solvent and fluoride, and irradiating laser light or strong light to the crystalline silicon film.

摘要翻译： 具有抑制空腔制造的结晶半导体膜的半导体器件及其制造方法本发明的半导体器件的制造方法包括以下步骤：在具有绝缘表面的基板上形成非晶硅膜，添加金属 元素如Ni，用于促进结晶到非晶硅膜，进行热处理以使非晶硅膜结晶，从而在基板上形成晶体硅膜，去除在晶体硅膜表面形成的氧化硅膜， 通过含有有机溶剂和氟化物的溶液进行热处理，并向结晶硅膜照射激光或强光。

公开(公告)号：US07528410B2

公开(公告)日：2009-05-05

申请号：US11584524

申请日：2006-10-23

申请人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

发明人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

IPC分类号： H01L29/12 ,  H01L29/786

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/6675 ,  H01L29/78621 ,  H01L29/78648

摘要： A semiconductor device that can be manufactured with a reduced cost by decreasing the number of masks is disclosed, and a method for manufacturing the semiconductor device is disclosed. The method for manufacturing the semiconductor device comprises the steps of: forming a semiconductor layer 3 having a source and a drain regions 10, 11, and LDD regions 16, 17; a gate insulating film 5; and a gate electrode 6; forming a first and a second interlayer insulating films 24, 25 over the gate electrode 6 and the gate insulating film 5; forming contact holes 25a, 25c to these interlayer insulating films so as to be located over each of the source region and the drain region; and an opening portion 25b to these interlayer insulating films so as to be located over the gate electrode and the LDD region; forming a second gate electrode 26b by a conductive film in the opening portion so as to cover the gate electrode and the LDD region; and a pixel electrode 26a over the second interlayer insulating film; removing the gate insulating film in the contact hole; and forming wirings 27, 28 connected to each the source region and the drain region.

摘要翻译： 公开了可以通过减少掩模数而降低成本的半导体器件，并且公开了一种用于制造半导体器件的方法。 制造半导体器件的方法包括以下步骤：形成具有源极和漏极区域10,11以及LDD区域16,17的半导体层3; 栅极绝缘膜5; 和栅电极6; 在栅极电极6和栅极绝缘膜5上形成第一和第二层间绝缘膜24,25; 将这些层间绝缘膜形成接触孔25a，25c，以便位于源极区域和漏极区域的每一个上; 和这些层间绝缘膜的开口部25b，以位于栅电极和LDD区之上; 通过开口部中的导电膜形成第二栅电极26b，以覆盖栅电极和LDD区; 和在第二层间绝缘膜上方的像素电极26a; 去除接触孔中的栅极绝缘膜; 以及形成连接到每个源极区域和漏极区域的布线27,28。

公开(公告)号：US20070170513A1

公开(公告)日：2007-07-26

申请号：US11694467

申请日：2007-03-30

申请人： Saishi Fujikawa ,  Etsuko Asano ,  Tatsuya Arao ,  Takashi Yokoshima ,  Takuya Matsuo ,  Hidehito Kitakado

发明人： Saishi Fujikawa ,  Etsuko Asano ,  Tatsuya Arao ,  Takashi Yokoshima ,  Takuya Matsuo ,  Hidehito Kitakado

IPC分类号： H01L29/94 ,  H01L29/76 ,  H01L31/00

CPC分类号： H01L29/78621 ,  H01L27/1237 ,  H01L29/42384 ,  H01L29/49 ,  H01L29/66757

摘要： A semiconductor device of which manufacturing steps can be simplified by doping impurities at a time, and a manufacturing method thereof. The manufacturing method of the semiconductor device comprises the steps of: forming first and second semiconductor layers over a substrate, forming a first insulating film over the first and second semiconductor layers, forming first and second conductive films thereover, forming a first gate electrode having a stacked layer of the first and second conductive films, in which a portion of the first conductive film is exposed from the second conductive film, over the first semiconductor layer with the first insulating film interposed therebetween, forming a second insulating film over the first insulating film, forming third and fourth conductive films thereover, and forming a second gate electrode having a stacked layer of the third and fourth conductive films, in which a portion of the third conductive film is exposed from the fourth conductive film, over the second semiconductor layer with the first and second insulating films interposed therebetween.

摘要翻译： 通过一次掺杂杂质可以简化制造步骤的半导体器件及其制造方法。 半导体器件的制造方法包括以下步骤：在衬底上形成第一和第二半导体层，在第一和第二半导体层上形成第一绝缘膜，在其上形成第一和第二导电膜，形成具有 将第一导电膜的一部分从第二导电膜露出的第一导电膜和第二导电膜的第一绝缘膜在第一绝缘膜之上形成第二绝缘膜， 在其上形成第三和第四导电膜，并且形成第二栅电极，其具有第三导电膜和第四导电膜的堆叠层，其中第三导电膜的一部分从第四导电膜暴露在第二半导体层上， 其间插入第一绝缘膜和第二绝缘膜。

公开(公告)号：US07157321B2

公开(公告)日：2007-01-02

申请号：US10963822

申请日：2004-10-14

申请人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

发明人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

IPC分类号： H01L21/338 ,  H01L21/84

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/6675 ,  H01L29/78621 ,  H01L29/78648

摘要： A semiconductor device that can be manufactured with a reduced cost by decreasing the number of masks is disclosed, and a method for manufacturing the semiconductor device is disclosed. The method for manufacturing the semiconductor device comprises the steps of: forming a semiconductor layer 3 having a source and a drain regions 10, 11, and LDD regions 16, 17; a gate insulating film 5; and a gate electrode 6; forming a first and a second interlayer insulating films 24, 25 over the gate electrode 6 and the gate insulating film 5; forming contact holes 25a, 25c to these interlayer insulating films so as to be located over each of the source region and the drain region; and an opening portion 25b to these interlayer insulating films so as to be located over the gate electrode and the LDD region; forming a second gate electrode 26b by a conductive film in the opening portion so as to cover the gate electrode and the LDD region; and a pixel electrode 26a over the second interlayer insulating film; removing the gate insulating film in the contact hole; and forming wirings 27, 28 connected to each the source region and the drain region.

摘要翻译： 公开了可以通过减少掩模数而降低成本的半导体器件，并且公开了一种用于制造半导体器件的方法。 制造半导体器件的方法包括以下步骤：形成具有源极和漏极区域10,11以及LDD区域16,17的半导体层3; 栅极绝缘膜5; 和栅电极6; 在栅极电极6和栅极绝缘膜5上形成第一和第二层间绝缘膜24,25; 向这些层间绝缘膜形成接触孔25a，25c，以便位于源极区域和漏极区域之上; 和这些层间绝缘膜的开口部分25b，以便位于栅电极和LDD区之上; 通过开口部中的导电膜形成第二栅电极26b，以覆盖栅电极和LDD区; 以及在第二层间绝缘膜上的像素电极26a; 去除接触孔中的栅极绝缘膜; 以及形成连接到每个源极区域和漏极区域的布线27,28。