Semiconductor integrated circuit
    52.
    发明授权
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号:US07193434B2

    公开(公告)日:2007-03-20

    申请号:US11182018

    申请日:2005-07-15

    IPC分类号: H03K19/173

    摘要: There is provided a high-performance semiconductor integrated circuit whose circuit area is small and whose wiring length is short. The semiconductor integrated circuit is constructed in a multi-layer structure and is provided with a switch block for switching connections among a plurality of signal lines by means of a plurality of transistors formed respectively in a plurality of semiconductor layers and a plurality of logic blocks formed in each of the plurality of semiconductor layers and connected to each of the plurality of signal lines. The first switch block is a programmable switch block capable of changing the connection topology among the plurality of signal lines.

    摘要翻译: 提供了电路面积小,布线长度短的高性能半导体集成电路。 半导体集成电路构造成多层结构,并且设置有用于通过分别形成在多个半导体层中的多个晶体管和多个形成的多个逻辑块来在多个信号线之间切换连接的开关块 在多个半导体层的每一个中并连接到多个信号线中的每一个。 第一开关块是能够改变多个信号线之间的连接拓扑的可编程开关块。

    Testing apparatus and testing method
    53.
    发明授权
    Testing apparatus and testing method 有权
    检测仪器及检测方法

    公开(公告)号:US07136773B2

    公开(公告)日:2006-11-14

    申请号:US10737716

    申请日:2003-12-16

    IPC分类号: G01R31/00

    摘要: A testing apparatus for testing an electronic device, includes a deterministic jitter applying means for applying deterministic jitter to a given input signal without any amplitude variation component occurring and supplying the input signal applied with the deterministic jitter to the electronic device, a jitter amount controlling means for controlling magnitude of the deterministic jitter to be applied by the deterministic jitter applying means and a judging means for judging quality of the electronic device based on an output signal outputted by the electronic device in response to the input signal.

    摘要翻译: 一种用于测试电子设备的测试装置,包括确定性抖动施加装置,用于将确定性抖动施加到给定的输入信号,而没有发生任何幅度变化分量,并将施加有确定性抖动的输入信号提供给电子设备;抖动量控制装置 用于控制由确定性抖动施加装置施加的确定性抖动的大小;以及判断装置,用于根据输入信号,根据电子装置输出的输出信号判断电子装置的品质。

    Apparatus for and method of measuring clock skew
    54.
    发明授权
    Apparatus for and method of measuring clock skew 有权
    仪器和测量时钟偏移的方法

    公开(公告)号:US07127018B2

    公开(公告)日:2006-10-24

    申请号:US09813923

    申请日:2001-03-20

    IPC分类号: H04L7/02

    摘要: Timing jitter sequences Δφj[n] and Δφk[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles φ0j and φ0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).

    摘要翻译: (t)和x k(t),并且计算那些定时抖动序列之间的定时差异序列。 另外,x 0 和< 0< 0> (t)和x(k)分别被估计。 计算出这些初始角度和定时差分序列之间的差值的和,以获得x j(t)和x k(t)之间的时钟偏移序列。

    Residue number system arithmetic operating system, scaling operator, scaling operation method and program and recording medium of the same
    55.
    发明申请
    Residue number system arithmetic operating system, scaling operator, scaling operation method and program and recording medium of the same 失效
    残差系统算术运算系统,缩放运算符,缩放运算方法以及程序和记录介质

    公开(公告)号:US20060184600A1

    公开(公告)日:2006-08-17

    申请号:US11340870

    申请日:2006-01-27

    IPC分类号: G06F7/38

    CPC分类号: G06F7/729

    摘要: There is provided a scaling operator for calculating a quotient in a first residue format obtained by dividing an input number in the first residue format by a second modulus in a residue number system for representing numbers by the first residue format of a set of residues obtained with respect to first modulus and residues obtained with respect to second modulus, having a subtracter for outputting inter-moduli values of difference which are values of difference between the residues obtained with respect to the first modulus and the residues obtained with respect to the second modulus and a quotient outputting section for outputting a set of residues of the quotient obtained with respect to the first modulus and residues of the quotient obtained with respect to the second modulus as the quotient based on the inter-moduli values of difference.

    摘要翻译: 提供了一种缩放算子,用于计算第一残差格式的商,其通过将第一残差格式中的输入数除以残差数系统中的第二模数,用于表示数字,该第一残差格式是通过以 相对于第二模量获得的第一模量和残余物,具有用于输出差异值的减法器,该减法器是相对于第一模量获得的残差与相对于第二模数获得的残差之间的差的值, 商商输出部分,用于输出相对于第二模数获得的关于第二模数获得的商的残差的一组残差,作为商的差分模值,作为商。

    Jitter measurement apparatus, jitter measurement method, test apparatus and electronic device
    56.
    发明申请
    Jitter measurement apparatus, jitter measurement method, test apparatus and electronic device 失效
    抖动测量装置,抖动测量方法,测试装置和电子装置

    公开(公告)号:US20060182170A1

    公开(公告)日:2006-08-17

    申请号:US11378407

    申请日:2006-03-17

    IPC分类号: H04B17/00

    CPC分类号: H04B17/364

    摘要: A jitter measuring apparatus for measuring timing jitter of a signal-under-test is provided, wherein the jitter measuring apparatus includes a pulse generator for outputting a pulse signal of a predetermined pulse width for an edge of the signal-under-test, whose timing jitter is under test; and a jitter measuring sub-unit for extracting the timing jitter on the basis of a duty ratio of each cycle of the signal output by the pulse generator.

    摘要翻译: 提供了一种用于测量待测信号的定时抖动的抖动测量装置,其中抖动测量装置包括脉冲发生器,用于输出针对被测信号的边缘的预定脉冲宽度的脉冲信号, 抖动被测试; 以及抖动测量子单元,用于基于由脉冲发生器输出的信号的每个周期的占空比来提取定时抖动。

    Jitter estimating apparatus and estimating method
    57.
    发明授权
    Jitter estimating apparatus and estimating method 失效
    抖动估计装置及估计方法

    公开(公告)号:US06990417B2

    公开(公告)日:2006-01-24

    申请号:US10240182

    申请日:2002-09-27

    IPC分类号: G06F19/00

    CPC分类号: G01R29/26 H04L1/205

    摘要: There is provided a jitter estimating apparatus for calculating phase noise waveform of an input signal and for estimating a peak value, a peak-to-peak value and a worst value of jitter of the input signal, and probability to generate jitter based on the phase noise waveform. Timing jitter sequence, period jitter sequence, and cycle to cycle period jitter sequence of the input signal are calculated and the peak value and the peak to peak value for each jitter, as well as probability to generate jitter may be estimated.

    摘要翻译: 提供了一种用于计算输入信号的相位噪声波形并用于估计输入信号的峰值,峰值和最差值的抖动估计装置以及基于相位的产生抖动的概率 噪声波形。 计算输入信号的定时抖动序列,周期抖动序列和周期到周期周期抖动序列,并且可以估计每个抖动的峰值和峰峰值以及产生抖动的概率。

    Testing apparatus and testing method
    58.
    发明申请
    Testing apparatus and testing method 有权
    检测仪器及检测方法

    公开(公告)号:US20050149784A1

    公开(公告)日:2005-07-07

    申请号:US10737716

    申请日:2003-12-16

    摘要: A testing apparatus for testing an electronic device, includes a deterministic jitter applying means for applying deterministic jitter to a given input signal without any amplitude variation component occurring and supplying the input signal applied with the deterministic jitter to the electronic device, a jitter amount controlling means for controlling magnitude of the deterministic jitter to be applied by the deterministic jitter applying means and a judging means for judging quality of the electronic device based on an output signal outputted by the electronic device in response to the input signal.

    摘要翻译: 一种用于测试电子设备的测试装置,包括确定性抖动施加装置,用于将确定性抖动施加到给定的输入信号,而没有发生任何幅度变化分量,并将施加确定性抖动的输入信号提供给电子设备;抖动量控制装置 用于控制由确定性抖动施加装置施加的确定性抖动的大小;以及判断装置,用于根据输入信号,根据电子装置输出的输出信号判断电子装置的品质。

    Jitter measuring device and method
    59.
    发明授权
    Jitter measuring device and method 有权
    抖动测量装置及方法

    公开(公告)号:US06795496B1

    公开(公告)日:2004-09-21

    申请号:US09647908

    申请日:2000-10-05

    IPC分类号: H04B346

    CPC分类号: G01R29/26

    摘要: A signal under measurement is transformed into a complex analytic signal using a Hilbert transformer and an instantaneous phase of this analytic signal is estimated. A linear phase is subtracted from the instantaneous phase to obtain a phase noise waveform. The phase noise waveform is sampled in the proximity of a zero crossing point of a real part of the analytic signal. A differential waveform of the sample phase noise waveform is calculated to obtain a differential phase noise waveform. An RMS jitter is obtained from the phase noise waveform, and a peak-to-peak jitter is obtained from the phase noise waveform.

    摘要翻译: 使用希尔伯特变换器将测量信号转换为复杂的分析信号,并估计该分析信号的瞬时相位。 从瞬时相位减去线性相位以获得相位噪声波形。 相位噪声波形在分析信号的实部的零交叉点附近被采样。 计算采样相位噪声波形的差分波形以获得差分相位噪声波形。 从相位噪声波形获得RMS抖动,从相位噪声波形获得峰 - 峰抖动。

    Apparatus and method for measuring quality measure of phase noise waveform
    60.
    发明授权
    Apparatus and method for measuring quality measure of phase noise waveform 失效
    用于测量相位噪声波形质量测量的装置和方法

    公开(公告)号:US06735538B1

    公开(公告)日:2004-05-11

    申请号:US09538186

    申请日:2000-03-29

    IPC分类号: G01R2926

    CPC分类号: G01R29/26

    摘要: A clock signal xc(t) that has been converted into a digital signal is transformed into a complex analytic signal zc(t), and an instantaneous phase &THgr; of the zc(t) is estimated. A linear phase is removed from the &THgr; to obtain a phase noise waveform &Dgr;&phgr;(t). The &Dgr;&phgr;(t) is sampled at a timing close to a zero crossing timing of the xc(t) to extract the &Dgr;&phgr;(t) sample. A root-mean-square value &sgr;t of the &Dgr;&phgr;(t) samples is obtained, and a differential waveform of the extracted &Dgr;&phgr;(t) samples is also obtained to obtain a period jitter Jp. Then a root-mean-square value &sgr;p of the Jp is obtained to calculate a correlation coefficient &rgr;tt=1−(&sgr;p2/(2&sgr;t2)). If necessary, an SNRt=&rgr;tt2/(1−&rgr;tt2) is obtained. The &rgr;tt and/or the SNRt is defined as a quality measure of a clock signal.

    摘要翻译: 已经转换成数字信号的时钟信号xc(t)被变换成复分析信号zc(t),并估计zc(t)的瞬时相位θta。 从Theta去除线性相位以获得相位噪声波形Deltaphi(t)。 在接近xc(t)的零交叉定时的定时采样Deltaphi(t),以提取Deltaphi(t)样本。 获得Deltaphi(t)样本的均方根sigmat,并且还获得提取的Deltaphi(t)样本的差分波形以获得周期抖动Jp。 然后获得Jp的均方根sigmap以计算相关系数rhott = 1-(sigmap <2> /(2sigmat <2>))。 如果需要,获得SNRt = rhott2 /(1-rhott2)。 rhott和/或SNRt被定义为时钟信号的质量测量。