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    Providing a shared memory translation facility
    51.
    发明授权
    Providing a shared memory translation facility 有权
    提供共享内存翻译工具

    公开(公告)号：US08527715B2

    公开(公告)日：2013-09-03

    申请号：US12037177

    申请日：2008-02-26

    申请人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Donald W. Schmidt ,  Jaya Srikrishnan ,  Charles F. Webb ,  Leslie W. Wyman

    发明人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Donald W. Schmidt ,  Jaya Srikrishnan ,  Charles F. Webb ,  Leslie W. Wyman

    IPC分类号： G06F13/00

    CPC分类号： G06F12/00 ,  G06F12/0284 ,  G06F12/109 ,  G06F12/1441 ,  G06F2212/656

    摘要： A system, method and computer program product for providing a shared memory translation facility. The method includes receiving a request for access to a memory address from a requestor at a configuration, the receiving at a shared memory translation mechanism. It is determined if the memory address refers to a shared memory object (SMO), the SMO accessible by a plurality of configurations. In response to determining that the memory address refers to the SMO, it is determined if the configuration has access to the SMO. In response to determining that the configuration has access to the SMO, the requestor is provided a system absolute address for the SMO and access to the SMO. In this manner direct interchange of data between the plurality of configurations is allowed.

    摘要翻译： 一种用于提供共享存储器翻译设备的系统，方法和计算机程序产品。 该方法包括在配置下从请求者接收访问存储器地址的请求，在共享存储器转换机制处接收。 确定存储器地址是指共享存储器对象（SMO），SMO可由多个配置访问。 响应于确定存储器地址是指SMO，确定配置是否可以访问SMO。 响应于确定配置可以访问SMO，请求者为SMO提供系统绝对地址并访问SMO。 以这种方式允许在多个配置之间直接互换数据。

    Method, system and computer program product for providing filtering of GUEST2 quiesce requests
    52.
    发明授权
    Method, system and computer program product for providing filtering of GUEST2 quiesce requests 失效
    方法，系统和计算机程序产品，用于提供GUEST2静默请求的过滤

    公开(公告)号：US08380907B2

    公开(公告)日：2013-02-19

    申请号：US12037887

    申请日：2008-02-26

    申请人： Lisa C. Heller ,  Damian L. Osisek ,  Charles F. Webb

    发明人： Lisa C. Heller ,  Damian L. Osisek ,  Charles F. Webb

    IPC分类号： G06F13/24

    CPC分类号： G06F9/45558 ,  G06F2009/45566

    摘要： A method, system and computer program product for providing filtering of level two guest (G2) quiesce requests. The method includes receiving a G2 quiesce interruption request at a processor currently or previously executing a G2 running under a level two hypervisor in a logical partition. The G2 includes a current zone and G2 virtual machine (VM) identifier. The quiesce interruption request specifies an initiating zone and an initiating G2 VM identifier. It is determined if the G2 quiesce interruption request can be filtered by the processor. The determining is responsive to the current G2 VM identifier, the current zone, the initiating zone and the initiating G2 VM identifier. The G2 quiesce interruption request is filtered at the processor in response to determining that the G2 quiesce interruption request can be filtered. Thus, filtering between G2 virtual machines running in the logical partition is provided.

    摘要翻译： 一种用于提供二级客户（G2）静默请求过滤的方法，系统和计算机程序产品。 该方法包括在当前或先前执行在逻辑分区中的二级虚拟机管理程序下运行的G2的处理器处接收G2停顿中断请求。 G2包括当前区域和G2虚拟机（VM）标识符。 静默中断请求指定启动区域和启动G2 VM标识符。 确定G2停顿中断请求是否可以被处理器过滤。 该确定响应于当前的G2 VM标识符，当前区域，起始区域和起始G2 VM标识符。 响应于确定可以过滤G2静默中断请求，在处理器处对G2静默中断请求进行过滤。 因此，提供了在逻辑分区中运行的G2虚拟机之间的过滤。

    Dynamic address translation with translation exception qualifier
    53.
    发明授权
    Dynamic address translation with translation exception qualifier 有权
    动态地址转换与翻译异常限定符

    公开(公告)号：US08095773B2

    公开(公告)日：2012-01-10

    申请号：US12037268

    申请日：2008-02-26

    申请人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer

    发明人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer

    IPC分类号： G06F12/10

    CPC分类号： G06F12/0284 ,  G06F3/0604 ,  G06F3/0667 ,  G06F3/067 ,  G06F9/455 ,  G06F12/10 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/109 ,  G06F2212/1032 ,  G06F2212/152 ,  G06F2212/50 ,  G06F2212/652 ,  G06F2212/657

    摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. Dynamic address translation of the virtual address proceeds. In response to a translation interruption having occurred during dynamic address translation, bits are stored in a translation exception qualifier (TXQ) field to indicate that the exception was either a host DAT exception having occurred while running a host program or a host DAT exception having occurred while running a guest program. The TXQ is further capable of indicating that the exception was associated with a host virtual address derived from a guest page frame real address or a guest segment frame absolute address. The TXQ is further capable of indicating that a larger or smaller host frame size is preferred to back a guest frame.

    摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和翻译表的层次结构的转换表的初始起始地址。 虚拟地址的动态地址转换进行。 响应于在动态地址转换期间发生的翻译中断，比特被存储在转换异常限定符（TXQ）字段中，以指示异常是在运行主机程序或主机DAT异常发生时发生的主机DAT异常 同时运行一个客人程序。 TXQ还能够指示异常与从访客页面帧实际地址或访客段帧绝对地址导出的主机虚拟地址相关联。 TXQ还能够指示较大或较小的主机帧大小优于后端客机帧。

    DIAGNOSE INSTRUCTION FOR SERIALIZING PROCESSING
    54.
    发明申请
    DIAGNOSE INSTRUCTION FOR SERIALIZING PROCESSING 有权
    用于串行处理的诊断指令

    公开(公告)号：US20110320661A1

    公开(公告)日：2011-12-29

    申请号：US12822886

    申请日：2010-06-24

    申请人： Lisa C. Heller

    发明人： Lisa C. Heller

    IPC分类号： G06F12/14 ,  G06F12/10

    CPC分类号： G06F9/30087 ,  G06F9/30003 ,  G06F9/30079 ,  G06F9/30185 ,  G06F9/45533 ,  G06F9/52

    摘要： A system serialization capability is provided to facilitate processing in those environments that allow multiple processors to update the same resources. The system serialization capability is used to facilitate processing in a multi-processing environment in which guests and hosts use locks to provide serialization. The system serialization capability includes a diagnose instruction which is issued after the host acquires a lock, eliminating the need for the guest to acquire the lock.

    摘要翻译： 提供系统序列化功能以便于允许多个处理器更新相同资源的那些环境中的处理。 系统序列化功能用于在多处理环境中促进处理，其中客人和主机使用锁来提供序列化。 系统序列化功能包括在主机获取锁定之后发出的诊断指令，消除了客人获取锁定的需要。

    Method of processing data strings
    55.
    发明授权
    Method of processing data strings 失效
    处理数据串的方法

    公开(公告)号：US5608887A

    公开(公告)日：1997-03-04

    申请号：US460347

    申请日：1995-06-02

    申请人： Robert M. Dinkjian ,  Lisa C. Heller ,  Steven R. Kordus ,  Kenneth A. Lauricella ,  Thomas W. Seigendall ,  Robert A. Skaggs ,  Nelson S. Xu

    发明人： Robert M. Dinkjian ,  Lisa C. Heller ,  Steven R. Kordus ,  Kenneth A. Lauricella ,  Thomas W. Seigendall ,  Robert A. Skaggs ,  Nelson S. Xu

    IPC分类号： G06F7/02 ,  G06F7/74 ,  G06F9/308 ,  G06F7/00

    CPC分类号： G06F7/74 ,  G06F7/026 ,  G06F9/30018

    摘要： A data processor processes data strings from memory where the data strings do not begin or end at a memory boundary. A string is defined in memory by a starting address, a byte count defining the total number of bytes in the string, and a byte offset defining the position of the first byte in the starting address location. The processor stores the byte count and decrements the byte count as each multi-byte word is processed. A byte count mask circuit generates a byte count mask which has all 1s for each byte count greater than the number of bytes per memory word. When the number of bytes remaining to be processed is below the number of bytes in a memory word, the byte count mask generates 1s only for the positions corresponding to the positions of bytes of the string in the last memory word. An offset register stores the offset defining the position of the first byte in the first memory word of the string. The offset is used to shift the byte count mask by a number of positions corresponding to the position of the first byte of the string and inserts 0s in the byte count mask for positions not belonging to the string. A byte-by-byte comparator determines string end conditions and provides an output word with a significant bit indication for each byte for which an end condition has been detected. The output of the byte-by-byte comparator is combined with the shifted byte count mask, and the result is decoded by means of a prioritized decoder which generates a string write mask.

    摘要翻译： 数据处理器处理来自存储器的数据串，其中数据串不开始或在存储器边界处结束。 字符串在存储器中由起始地址定义，定义字符串总字节数的字节数以及定义起始地址位置中第一个字节的位置的字节偏移量。 处理器存储字节计数，并在处理每个多字节字时减少字节计数。 字节计数掩码电路产生一个字节计数掩码，每个字节计数的字节数大于每个存储字的字节数。 当待处理的剩余字节数低于存储器字中的字节数时，字节计数掩码仅针对与最后一个存储器字中字符串的字节位置相对应的位置产生1。 偏移寄存器存储定义字符串的第一个存储字中第一个字节的位置的偏移量。 偏移用于将字节计数掩码移位与字符串的第一个字节的位置相对应的位置数，并将不属于字符串的位置插入到字节计数掩码中的0。 逐字节比较器确定字符串结束条件，并为已经检测到结束条件的每个字节提供具有有效位指示的输出字。 逐字节比较器的输出与移位的字节计数掩码组合，结果通过生成字符串写入掩码的优先级解码器解码。

    Diagnose instruction for serializing processing
    57.
    发明授权
    Diagnose instruction for serializing processing 有权
    诊断串行化处理指令

    公开(公告)号：US08607032B2

    公开(公告)日：2013-12-10

    申请号：US13459167

    申请日：2012-04-28

    申请人： Lisa C. Heller

    发明人： Lisa C. Heller

    IPC分类号： G06F9/00

    CPC分类号： G06F9/30087 ,  G06F9/30003 ,  G06F9/30079 ,  G06F9/30185 ,  G06F9/45533 ,  G06F9/52

    摘要： A system serialization capability is provided to facilitate processing in those environments that allow multiple processors to update the same resources. The system serialization capability is used to facilitate processing in a multi-processing environment in which guests and hosts use locks to provide serialization. The system serialization capability includes a diagnose instruction which is issued after the host acquires a lock, eliminating the need for the guest to acquire the lock.

    摘要翻译： 提供系统序列化功能以便于允许多个处理器更新相同资源的那些环境中的处理。 系统序列化功能用于在多处理环境中促进处理，其中客人和主机使用锁来提供序列化。 系统序列化功能包括在主机获取锁定之后发出的诊断指令，消除了客人获取锁定的需要。

    Serializing translation lookaside buffer access around address translation parameter modification
    59.
    发明授权
    Serializing translation lookaside buffer access around address translation parameter modification 有权
    序列化翻译后备缓冲区访问围绕地址转换参数修改

    公开(公告)号：US08433855B2

    公开(公告)日：2013-04-30

    申请号：US12032178

    申请日：2008-02-15

    申请人： Gregory W. Alexander ,  Lisa C. Heller ,  Chung-Lung Kevin Shum

    发明人： Gregory W. Alexander ,  Lisa C. Heller ,  Chung-Lung Kevin Shum

    IPC分类号： G06F12/00

    CPC分类号： G06F12/1027 ,  G06F2212/684

    摘要： Embodiments of the invention include a method of synchronizing translation changes in a processor including a translation lookaside buffer, the method including setting a control bit to enable blocking of all fetch requests that miss the translation lookaside buffer without changing a translation state of the current process; if there is at least one pending translation, then waiting for completion of the at least one pending translation; and resetting the control bit. A processor and a computer program product are provided.

    摘要翻译： 本发明的实施例包括一种在包括翻译后备缓冲器的处理器中同步翻译改变的方法，所述方法包括设置控制位以使得能够阻止错过所述翻译后备缓冲器的所有提取请求，而不改变当前进程的转换状态; 如果存在至少一个未完成的翻译，则等待完成至少一个等待翻译; 并重置控制位。 提供处理器和计算机程序产品。