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    Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio
    61.
    发明授权
    Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio 有权
    包含双层多孔低k电介质的互连使用不同的致孔剂来构造前者的比例

    公开(公告)号：US07723226B2

    公开(公告)日：2010-05-25

    申请号：US11654427

    申请日：2007-01-17

    申请人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

    发明人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/7682 ,  H01L21/76807 ,  H01L21/76835 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A bilayer porous low dielectric constant (low-k) interconnect structure and methods of fabricating the same are presented. A preferred embodiment having an effective dielectric constant of about 2.2 comprises a bottom deposited dielectric layer and a top deposited dielectric layer in direct contact with the former. The bottom layer and the top layer have same atomic compositions, but a higher dielectric constant value k. The bottom dielectric layer serves as an etch stop layer for the top dielectric layer, and the top dielectric layer can act as CMP stop layer. One embodiment of making the structure includes forming a bottom dielectric layer having a first porogen content and a top dielectric layer having a higher porogen content. A curing process leaves lower pore density in the bottom dielectric layer than that left in the top dielectric layer, which leads to higher dielectric value k in the bottom dielectric layer.

    摘要翻译： 提出了双层多孔低介电常数（低k）互连结构及其制造方法。 具有约2.2的有效介电常数的优选实施例包括与前者直接接触的底部沉积的介电层和顶部沉积的介电层。 底层和顶层具有相同的原子组成，但是较高的介电常数值k。 底部介电层用作顶部介电层的蚀刻停止层，并且顶部介电层可以用作CMP停止层。 制造该结构的一个实施方案包括形成具有第一致孔剂含量的底部电介质层和具有较高致孔剂含量的顶部电介质层。 固化过程在底部电介质层中留下的孔隙密度低于顶部介电层中留下的孔密度，这导致底部介电层中较高的介电常数k。

    Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio
    64.
    发明申请
    Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio 有权
    包含双层多孔低k电介质的互连使用不同的致孔剂来构造前者的比例

    公开(公告)号：US20080171431A1

    公开(公告)日：2008-07-17

    申请号：US11654427

    申请日：2007-01-17

    申请人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

    发明人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/7682 ,  H01L21/76807 ,  H01L21/76835 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A bilayer porous low dielectric constant (low-k) interconnect structure and methods of fabricating the same are presented. A preferred embodiment having an effective dielectric constant of about 2.2 comprises a bottom deposited dielectric layer and a top deposited dielectric layer in direct contact with the former. The bottom layer and the top layer have same atomic compositions, but a higher dielectric constant value k. The bottom dielectric layer serves as an etch stop layer for the top dielectric layer, and the top dielectric layer can act as CMP stop layer. One embodiment of making the structure includes forming a bottom dielectric layer having a first porogen content and a top dielectric layer having a higher porogen content. A curing process leaves lower pore density in the bottom dielectric layer than that left in the top dielectric layer, which leads to higher dielectric value k in the bottom dielectric layer.

    摘要翻译： 提出了双层多孔低介电常数（低k）互连结构及其制造方法。 具有约2.2的有效介电常数的优选实施例包括与前者直接接触的底部沉积介电层和顶部沉积的介电层。 底层和顶层具有相同的原子组成，但是较高的介电常数值k。 底部介电层用作顶部电介质层的蚀刻停止层，并且顶部介电层可以用作CMP停止层。 制造该结构的一个实施方案包括形成具有第一致孔剂含量的底部电介质层和具有较高致孔剂含量的顶部电介质层。 固化过程在底部电介质层中留下比在顶部电介质层中留下的孔密度更低的孔密度，这导致底部电介质层中较高的介电值k。

    Pattern generator for a lithography system
    70.
    发明授权
    Pattern generator for a lithography system 有权
    光刻系统的图案发生器

    公开(公告)号：US09001308B2

    公开(公告)日：2015-04-07

    申请号：US13757477

    申请日：2013-02-01

    申请人： Chen-Hua Yu ,  Tien-I Bao ,  Chih Wei Lu ,  Jaw-Jung Shin ,  Shy-Jay Lin ,  Burn Jeng Lin

    发明人： Chen-Hua Yu ,  Tien-I Bao ,  Chih Wei Lu ,  Jaw-Jung Shin ,  Shy-Jay Lin ,  Burn Jeng Lin

    IPC分类号： G03F7/20

    CPC分类号： G03F7/702 ,  H01J37/00 ,  H01J37/3174 ,  H01J37/3177 ,  H01J2237/0435 ,  H01J2237/31789

    摘要： A pattern generator includes a minor array plate having a mirror, at least one electrode plate disposed over the minor array plate, a lens let disposed over the minor, and at least one insulator layer sandwiched between the mirror array plate and the electrode plate. The electrode plate includes a first conducting layer and a second conducting layer. The lens let has a non-straight sidewall formed in the electrode plate. The pattern generator further includes at least one insulator sandwiched between two electrode plates. The non-straight sidewall can be a U-shaped sidewall or an L-shaped sidewall.

    摘要翻译： 图案发生器包括具有反射镜的次阵列板，设置在次阵列板上的至少一个电极板，设置在副镜上的透镜，以及夹在反射镜阵列板和电极板之间的至少一个绝缘体层。 电极板包括第一导电层和第二导电层。 透镜让具有形成在电极板中的非直的侧壁。 图案发生器还包括夹在两个电极板之间的至少一个绝缘体。 非直的侧壁可以是U形侧壁或L形侧壁。