公开(公告)号：US20080170368A1

公开(公告)日：2008-07-17

申请号：US12032063

申请日：2008-02-15

申请人： Howard Chen ,  Hsichang Liu ,  Louis Hsu ,  Lawrence Mok

发明人： Howard Chen ,  Hsichang Liu ,  Louis Hsu ,  Lawrence Mok

IPC分类号： H05K7/20

CPC分类号： H01L23/427 ,  F28D15/0233 ,  F28D15/0275 ,  F28D15/04 ,  F28F2215/06 ,  H01L2224/16225

摘要： An apparatus for providing two-phase heat transfer for semiconductor devices includes a vapor chamber configured to carry a cooling liquid, the vapor chamber having a base section, and a plurality of three-dimensional (3D) shaped members. The plurality of 3D-shaped members have interior and exterior sidewalls, the 3D-shaped members being connected to the base section so that vapor carrying latent heat can reach the respective interior sidewalls and get transferred to the respective exterior sidewalls configured to be in contact with an external coolant. The vapor chamber is configured to be in contact with a semiconductor device in order to remove heat therefrom.

摘要翻译： 用于为半导体器件提供两相热传递的装置包括构造成承载冷却液体的蒸气室，蒸气室具有基部，以及多个三维（3D）形状的部件。 多个3D形构件具有内部和外部侧壁，3D形构件连接到基部，使得携带潜热的蒸汽可以到达相应的内侧壁并被转移到被配置为与 外部冷却液。 蒸气室被配置为与半导体器件接触以从其中除去热量。

公开(公告)号：US07369410B2

公开(公告)日：2008-05-06

申请号：US11416762

申请日：2006-05-03

申请人： Howard Chen ,  Hsichang Liu ,  Louis Hsu ,  Lawrence Mok

发明人： Howard Chen ,  Hsichang Liu ,  Louis Hsu ,  Lawrence Mok

IPC分类号： H05K7/20

CPC分类号： H01L23/427 ,  F28D15/0233 ,  F28D15/0275 ,  F28D15/04 ,  F28F2215/06 ,  H01L2224/16225

摘要： An apparatus for providing two-phase heat transfer for semiconductor devices includes a vapor chamber configured to carry a cooling liquid, the vapor chamber having base section, and a plurality of three-dimensional (3D) shaped members. The plurality of 3D-shaped members have interior and exterior sidewalls, the 3D-shaped members being connected to the base section so that vapor carrying latent heat can reach the respective interior sidewalls and get transferred to the respective exterior sidewalls configured to be in contact with an external coolant. The vapor chamber is configured to be in contact with a semiconductor device in order to remove heat therefrom.

摘要翻译： 一种用于半导体器件的两相热传递装置，包括一个蒸气室，被配置为承载冷却液体，该蒸气室具有基部，以及多个三维（3D）形状的部件。 多个3D形构件具有内部和外部侧壁，3D形构件连接到基部，使得携带潜热的蒸汽可以到达相应的内侧壁并被转移到被配置为与 外部冷却液。 蒸气室被配置为与半导体器件接触以从其中除去热量。

公开(公告)号：US20080059924A1

公开(公告)日：2008-03-06

申请号：US11875345

申请日：2007-10-19

申请人： Louis Hsu ,  Jack Mandelman ,  William Tonti ,  Chih-Chao Yang

发明人： Louis Hsu ,  Jack Mandelman ,  William Tonti ,  Chih-Chao Yang

IPC分类号： G06F17/50

CPC分类号： H01L23/53238 ,  H01L21/76814 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76868 ,  H01L2924/0002 ,  H01L2924/00

摘要： Design structure embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes an interconnect structure with a liner formed on roughened dielectric material in an insulating layer and a conformal liner repair layer bridging that breaches in the liner. The conformal liner repair layer is formed of a conductive material, such as a cobalt-containing material. The conformal liner repair layer may be particularly useful for repairing discontinuities in a conductive liner disposed on roughened dielectric material bordering the trenches and vias of damascene interconnect structures.

摘要翻译： 用于设计，制造或测试设计的机器可读介质中体现的设计结构。 该设计结构包括互连结构，其具有在绝缘层中的粗糙化介电材料上形成的衬垫和桥接该衬里中的破损的保形衬里修复层。 保形衬里修复层由诸如含钴材料的导电材料形成。 保形衬里修复层可能特别适用于修复布置在与镶嵌互连结构的沟槽和通孔相邻的粗糙化介电材料上的导电衬垫中的不连续性。

公开(公告)号：US20080054487A1

公开(公告)日：2008-03-06

申请号：US11928913

申请日：2007-10-30

申请人： Louis Hsu ,  Jack Mandelman ,  Chih-Chao Yang

发明人： Louis Hsu ,  Jack Mandelman ,  Chih-Chao Yang

IPC分类号： H01L23/48

CPC分类号： H01L21/31695 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/31633 ,  H01L21/7682 ,  H01L21/76831

摘要： In a first aspect, a first method of manufacturing a dielectric material with a reduced dielectric constant is provided. The first method includes the steps of (1) forming a dielectric material layer including a trench on a substrate; and (2) forming a cladding region in the dielectric material layer by forming a plurality of air gaps in the dielectric material layer along at least one of a sidewall and a bottom of the trench so as to reduce an effective dielectric constant of the dielectric material. Numerous other aspects are provided.

摘要翻译： 在第一方面，提供了制造介电常数降低的介电材料的第一种方法。 第一种方法包括以下步骤：（1）在衬底上形成包括沟槽的电介质材料层; 以及（2）通过沿着沟槽的侧壁和底部中的至少一个形成电介质材料层中的多个气隙，从而在电介质材料层中形成包层区域，从而降低电介质材料的有效介电常数 。 提供了许多其他方面。

公开(公告)号：US20080048286A1

公开(公告)日：2008-02-28

申请号：US11929490

申请日：2007-10-30

申请人： Louis Hsu ,  Jack Mandelman

发明人： Louis Hsu ,  Jack Mandelman

IPC分类号： H01L29/00

CPC分类号： H01L29/045 ,  H01L21/76283 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/84 ,  H01L27/0922 ,  H01L27/1203 ,  H01L27/1207

摘要： In a first aspect, a first method is provided for semiconductor device manufacturing. The first method includes the steps of (1) providing a substrate; and (2) forming a first silicon-on-insulator (SOI) region having a first crystal orientation, a second SOI region having a second crystal orientation and a third SOI region having a third crystal orientation on the substrate. The first, second and third SOI regions are coplanar. Numerous other aspects are provided.

公开(公告)号：US20080048186A1

公开(公告)日：2008-02-28

申请号：US11876116

申请日：2007-10-22

申请人： Kangguo Cheng ,  Louis Hsu ,  Jack Mandelman

发明人： Kangguo Cheng ,  Louis Hsu ,  Jack Mandelman

IPC分类号： H01L23/58

CPC分类号： H01L27/10841 ,  H01L27/10864 ,  H01L2924/0002 ,  H01L2924/00

摘要： Design structure embodied in a machine readable medium for designing, manufacturing, or testing a design in which the design structure includes semiconductor device structures with self-aligned doped regions. The semiconductor structure may include first and second doped regions of a first conductivity type defined in the semiconductor material of a substrate bordering a sidewall of a trench. An intervening region of the semiconductor material separates the first and second doped regions. A third doped region is defined in the semiconductor material bordering the sidewall of the trench and disposed between the first and second doped regions. The third doped region is doped to have a second conductivity type opposite to the first conductivity type.

摘要翻译： 设计结构体现在用于设计，制造或测试其中设计结构包括具有自对准掺杂区域的半导体器件结构的设计的机器可读介质中。 半导体结构可以包括限定在与沟槽的侧壁接合的衬底的半导体材料中的第一导电类型的第一和第二掺杂区域。 半导体材料的中间区域分离第一和第二掺杂区域。 第三掺杂区域限定在与沟槽的侧壁接壤并且设置在第一和第二掺杂区域之间的半导体材料中。 第三掺杂区被掺杂以具有与第一导电类型相反的第二导电类型。

公开(公告)号：US20070258213A1

公开(公告)日：2007-11-08

申请号：US11416762

申请日：2006-05-03

申请人： Howard Chen ,  Hsichang Liu ,  Louis Hsu ,  Lawrence Mok

发明人： Howard Chen ,  Hsichang Liu ,  Louis Hsu ,  Lawrence Mok

IPC分类号： H05K7/20

CPC分类号： H01L23/427 ,  F28D15/0233 ,  F28D15/0275 ,  F28D15/04 ,  F28F2215/06 ,  H01L2224/16225

摘要： An apparatus for providing two-phase heat transfer for semiconductor devices includes a vapor chamber configured to carry a cooling liquid, the vapor chamber having base section, and a plurality of three-dimensional (3D) shaped members. The plurality of 3D-shaped members have interior and exterior sidewalls, the 3D-shaped members being connected to the base section so that vapor carrying latent heat can reach the respective interior sidewalls and get transferred to the respective exterior sidewalls configured to be in contact with an external coolant. The vapor chamber is configured to be in contact with a semiconductor device in order to remove heat therefrom.

摘要翻译： 一种用于半导体器件的两相热传递装置，包括一个蒸气室，被配置为承载冷却液体，该蒸气室具有基部，以及多个三维（3D）形状的部件。 多个3D形构件具有内部和外部侧壁，3D形构件连接到基部，使得携带潜热的蒸汽可以到达相应的内侧壁并被转移到被配置为与 外部冷却液。 蒸气室被配置为与半导体器件接触以从其中除去热量。

公开(公告)号：US20070187670A1

公开(公告)日：2007-08-16

申请号：US11355799

申请日：2006-02-16

申请人： Louis Hsu ,  Jack Mandelman ,  Chandrasekhar Narayan ,  Chun-Yung Sung

发明人： Louis Hsu ,  Jack Mandelman ,  Chandrasekhar Narayan ,  Chun-Yung Sung

IPC分类号： H01L29/06

CPC分类号： H01L21/268 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78603 ,  H01L2924/0002 ,  H01L2924/00

摘要： An opto-thermal annealing mask stack layer includes a thermal dissipative layer located over a substrate. A reflective layer is located upon the thermal dissipative layer. A transparent capping layer, that may have a thickness from about 10 to about 100 angstroms, is located upon the reflective layer. The opto-thermal annealing mask layer may be used as a gate electrode within a field effect device.

摘要翻译： 光热退火掩模层叠层包括位于衬底上的散热层。 反射层位于热耗散层上。 可以具有约10至约100埃厚度的透明覆盖层位于反射层上。 光热退火掩模层可以用作场效应器件中的栅电极。

公开(公告)号：US20070164357A1

公开(公告)日：2007-07-19

申请号：US11333068

申请日：2006-01-17

申请人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

发明人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

IPC分类号： H01L27/12 ,  H01L27/01 ,  H01L31/0392

CPC分类号： H01L27/1203 ,  H01L21/28114 ,  H01L21/823456 ,  H01L21/84 ,  H01L29/42376 ,  H01L2924/0002 ,  H01L2924/00

摘要： A transistor device and method of forming the same comprises a substrate; a first gate electrode over the substrate; a second gate electrode over the substrate; and a landing pad comprising a pair of flanged ends overlapping the second gate electrode, wherein the structure of the second gate electrode is discontinuous with the structure of the landing pad.

摘要翻译： 晶体管器件及其形成方法包括：衬底; 衬底上的第一栅电极; 在所述衬底上方的第二栅电极; 以及着陆垫，其包括与所述第二栅电极重叠的一对凸缘端，其中所述第二栅极的结构与所述着陆焊盘的结构不连续。

公开(公告)号：US20070117313A1

公开(公告)日：2007-05-24

申请号：US11625883

申请日：2007-01-23

申请人： Chih-Chao Yang ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu

发明人： Chih-Chao Yang ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu

IPC分类号： H01L21/8242 ,  H01L29/94 ,  H01L27/108

CPC分类号： H01L23/5223 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A damascene MIM capacitor and a method of fabricating the MIM capacitor. The MIN capacitor includes a dielectric layer having top and bottom surfaces; a trench in the dielectric layer, the trench extending from the top surface to the bottom surface of the dielectric layer; a first plate of a MIM capacitor comprising a conformal conductive liner formed on all sidewalls and extending along a bottom of the trench, the bottom of the trench coplanar with the bottom surface of the dielectric layer; an insulating layer formed over a top surface of the conformal conductive liner; and a second plate of the MIM capacitor comprising a core conductor in direct physical contact with the insulating layer, the core conductor filling spaces in the trench not filled by the conformal conductive liner and the insulating layer. The method includes forming portions of the MIM capacitor simultaneously with damascene interconnection wires.

摘要翻译： 一种镶嵌MIM电容器和一种制造MIM电容器的方法。 MIN电容器包括具有顶表面和底表面的电介质层; 电介质层中的沟槽，沟槽从电介质层的顶表面延伸到底表面; MIM电容器的第一板包括形成在所有侧壁上并沿着沟槽的底部延伸的共形导电衬垫，沟槽的底部与电介质层的底表面共面; 绝缘层，形成在所述共形导电衬垫的顶表面上; 以及MIM电容器的第二板，其包括与所述绝缘层直接物理接触的芯导体，所述芯导体填充所述沟槽中的未被所述共形导电衬垫和所述绝缘层填充的空间。 该方法包括与镶嵌互连线同时形成MIM电容器的部分。