公开(公告)号：US20050139774A1

公开(公告)日：2005-06-30

申请号：US11063545

申请日：2005-02-24

Applicant: Sumio Ikegawa ,  Kohei Nakayama ,  Hideyuki Funaki ,  Yoshinori Iida ,  Keitaro Shigenaka

Inventor： Sumio Ikegawa ,  Kohei Nakayama ,  Hideyuki Funaki ,  Yoshinori Iida ,  Keitaro Shigenaka

IPC: G01J1/42 ,  G01J1/02 ,  G01J1/44 ,  G01J5/00 ,  G01J5/20 ,  G01J5/22 ,  G01J5/24 ,  G01J5/48 ,  H01L27/14 ,  H01L27/16 ,  H01L37/00 ,  H04N5/33 ,  H04N5/335 ,  H04N5/369

CPC classification number: H04N5/33 ,  G01J5/20 ,  G01J5/22 ,  G01J5/24 ,  G01J2005/202 ,  H01L27/16

Abstract: An imaging device comprises a select line, a first signal line crossing the select line, and a first pixel provided at a portion corresponding to a crossing portion of the select line and the first signal line, the first pixel comprising a first buffer layer formed on a substrate, a first bolometer film formed on the first buffer layer, made of a compound which undergoes metal-insulator transition, and generating a first temperature detection signal, a first switching element formed on the substrate, selected by a select signal from the select line, and supplying the first temperature detection signal to the first signal line, and a metal wiring connecting a top surface of the first bolometer film to the first switching element.

Abstract translation: 成像装置包括选择线，与选择线交叉的第一信号线和设置在与选择线和第一信号线的交叉部分对应的部分处的第一像素，第一像素包括形成在第一信号线上的第一缓冲层 基板，形成在第一缓冲层上的第一测辐射热计薄膜，由经历金属 - 绝缘体转变的化合物制成，并产生第一温度检测信号，形成在基板上的第一开关元件，通过来自选择的选择信号选择 并且将第一温度检测信号提供给第一信号线，以及将第一测辐射热计薄膜的顶表面连接到第一开关元件的金属布线。

公开(公告)号：US06740946B2

公开(公告)日：2004-05-25

申请号：US10230200

申请日：2002-08-29

Applicant: Hideyuki Funaki

Inventor： Hideyuki Funaki

IPC: H01L2982

CPC classification number: H03H9/462 ,  B81B3/0021 ,  B81B2201/016 ,  B81B2201/0271 ,  B81B2203/0109 ,  B81B2203/051 ,  H01H13/80 ,  H01H59/0009 ,  H01H2001/0078 ,  H01H2201/008 ,  H03H3/0072

Abstract: A micromechanical switch includes a substrate, at least one pair of support members fixed to the substrate, and at least one pair of beam members placed in proximity and parallel to each other above the substrate, and connected to one of the support members, respectively, each of the beam members having a moving portion which is movable with a gap with respect to the substrate. A contact portion is provided on the moving portion, and a driving electrode is placed on the substrate between the pair of beam members to attract the moving portions of the beam members in a direction in a plane substantially parallel to the substrate with an electrostatic force so that the contact portions of the bean members which are opposed to each other are short-circuited.

Abstract translation: 微机械开关包括基板，固定到基板的至少一对支撑构件和至少一对梁构件，所述至少一对梁构件分别邻近并平行放置在基板上方并分别连接到支撑构件之一， 每个梁构件具有可相对于基板间隙移动的移动部分。 接触部分设置在移动部分上，并且驱动电极被放置在一对梁构件之间的基板上，以静电力吸引梁构件的移动部分在大致平行于基板的平面中的方向上 豆制品的彼此相对的接触部分短路。

公开(公告)号：US6150702A

公开(公告)日：2000-11-21

申请号：US340721

申请日：1999-06-29

Applicant: Hideyuki Funaki ,  Akio Nakagawa ,  Fumito Suzuki

Inventor： Hideyuki Funaki ,  Akio Nakagawa ,  Fumito Suzuki

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/417 ,  H01L29/78 ,  H01L29/861 ,  H01L23/58

CPC classification number: H01L29/404 ,  H01L29/417 ,  H01L29/8611

Abstract: The breakdown strength of a lateral diode using a field plate is improved. There are provided a track-like first field plate connected to an anode electrode, a track-like second field plate formed outside the first field plate and connected to a cathode electrode, track-like third field plates provided concentrically between the first and second field plates, and fourth field plates provided so as to cross the first to third field plates and connected to each of them. The fourth field plates are so positioned that they allow more current to flow in the corner sections and under the electrodes where an electric field is liable to concentrate.

Abstract translation: 使用场板的横向二极管的击穿强度得到改善。 提供了连接到阳极电极的轨道状第一场板，形成在第一场板外部并连接到阴极电极的轨道状第二场板，同心地设置在第一场和第二场之间的轨道状第三场板 板和第四场板，其设置成穿过第一至第三场板并且连接到它们中的每一个。 第四场板的定位使得它们允许更多的电流在电场易于集中的拐角部分和电极下方流动。

公开(公告)号：US5985708A

公开(公告)日：1999-11-16

申请号：US816596

申请日：1997-03-13

Applicant: Akio Nakagawa ,  Naoharu Sugiyama ,  Tomoko Matsudai ,  Norio Yasuhara ,  Atsusi Kurobe ,  Hideyuki Funaki ,  Yusuke Kawaguchi ,  Yoshihiro Yamaguchi

Inventor： Akio Nakagawa ,  Naoharu Sugiyama ,  Tomoko Matsudai ,  Norio Yasuhara ,  Atsusi Kurobe ,  Hideyuki Funaki ,  Yusuke Kawaguchi ,  Yoshihiro Yamaguchi

IPC: H01L27/12 ,  H01L29/73 ,  H01L29/739 ,  H01L29/786 ,  H01L21/8249

CPC classification number: H01L29/78696 ,  H01L27/1203 ,  H01L29/7317 ,  H01L29/7394 ,  H01L29/78612 ,  H01L29/78624 ,  H01L29/78639 ,  H01L29/78645 ,  H01L29/78687

Abstract: A semiconductor apparatus comprising a vertical type semiconductor device having a first conducting type semiconductor substrate, a drain layer formed on the surface of the semiconductor substrate, a drain electrode formed on the surface of the drain layer, a second conducting type base layer selectively formed on the surface of the semiconductor substrate opposite to the drain layer, a first conducting type source layer selectively formed on the surface of the second conducting type base layer, a source electrode formed on the first conducting type source layer and the second conducting type base layer, and a gate electrode formed in contact with the first conducting type source layer, the second conducting type base layer and the semiconductor substrate through a gate insulating film and a lateral semiconductor device having an insulating layer formed in a region of the surface of the semiconductor substrate different from the second conducting type base layer, and a polycrystalline semiconductor layer formed on the insulating layer and having a first conducting type region and a second conducting type region, wherein the first conducting type source layer of the vertical semiconductor device and the first conducting type region of the polycrystalline semiconductor layer are simultaneously formed.

Abstract translation: 一种半导体装置，包括具有第一导电型半导体衬底的垂直型半导体器件，形成在半导体衬底的表面上的漏极层，形成在漏极层的表面上的漏电极，第二导电型基极层， 所述半导体衬底的与所述漏极层相对的表面，选择性地形成在所述第二导电型基极层的表面上的第一导电型源极层，形成在所述第一导电型源极层和所述第二导电型基极层上的源电极， 以及通过栅极绝缘膜与第一导电型源极层，第二导电型基极层和半导体基板接触形成的栅电极，以及在半导体基板的表面的区域中形成有绝缘层的侧面半导体装置 不同于第二导电型基底层，和多晶 半导体层形成在绝缘层上并具有第一导电类型区域和第二导电类型区域，其中垂直半导体器件的第一导电型源极层和多晶半导体层的第一导电类型区域同时形成。

公开(公告)号：US5982015A

公开(公告)日：1999-11-09

申请号：US251489

申请日：1999-02-17

Applicant: Keizo Hirayama ,  Hideyuki Funaki ,  Fumito Suzuki ,  Akio Nakagawa

Inventor： Keizo Hirayama ,  Hideyuki Funaki ,  Fumito Suzuki ,  Akio Nakagawa

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/47 ,  H01L29/861 ,  H01L29/872 ,  H01L27/095 ,  H01L29/812 ,  H01L31/07

CPC classification number: H01L29/404 ,  H01L29/0692 ,  H01L29/8611 ,  H01L29/872 ,  Y10S257/928

Abstract: Disclosed is a high breakdown voltage semiconductor device comprising a semiconductor substrate, an active layer consisting of a high resistivity semiconductor layer of a first conductivity type formed on the substrate with an insulating layer interposed therebetween, a first impurity region of the first conductivity type formed within the active layer, a second impurity region of a second conductivity type formed within the active layer, a third impurity region of the second conductivity type formed within the second impurity region and having a high impurity concentration, a first electrode being in ohmic contact with the first impurity region and the fourth impurity region, and a second electrode being in Schottky contact with the second impurity region and in ohmic contact with the third impurity region.

公开(公告)号：US5981983A

公开(公告)日：1999-11-09

申请号：US933135

申请日：1997-09-18

Applicant: Hideyuki Funaki ,  Yoshihiro Yamaguchi

Inventor： Hideyuki Funaki ,  Yoshihiro Yamaguchi

IPC: H01L29/417 ,  H01L29/739 ,  H01L29/68

CPC classification number: H01L29/41758 ,  H01L29/7394

Abstract: A semiconductor device includes a substrate, an insulating layer formed on the substrate, a base layer of a first conductivity type formed on the insulating layer, a drain layer of a second conductivity type selectively formed above the surface of the base layer of the first conductivity type, a drain electrode formed on and connected to the drain layer of the second conductivity type, a base layer of the second conductivity type selectively formed on the base layer of the first conductivity type, a source layer of the first conductivity type isolated from the base layer of the first conductivity type and selectively formed in the surface area of the base layer of the second conductivity type, a source electrode formed on and connected to the source layer of the first conductivity type and the base layer of the second conductivity type, and a gate electrode formed above a portion of the base layer of the second conductivity type which lies between the source layer of the first conductivity type and the base layer of the first conductivity type with a gate insulating film disposed therebetween.

Abstract translation: 半导体器件包括基板，形成在基板上的绝缘层，形成在绝缘层上的第一导电类型的基极层，第二导电类型的漏极层，选择性地形成在第一导电性的基底层表面上方 形成在第二导电类型的漏极层上并连接到第二导电类型的漏极层的漏电极，选择性地形成在第一导电类型的基极层上的第二导电类型的基极层，与第一导电类型的第一导电类型隔离的源极层 第一导电类型的基底层，并且选择性地形成在第二导电类型的基底层的表面区域中，形成在第一导电类型的源极层和第二导电类型的基极层上并连接到第二导电类型的源极层的源电极， 以及形成在位于第一导电体的源极层之间的第二导电类型的基底层的一部分上方的栅电极 vity型和第一导电类型的基底层，其间设置有栅极绝缘膜。

公开(公告)号：US5894164A

公开(公告)日：1999-04-13

申请号：US927691

申请日：1997-09-11

Applicant: Hideyuki Funaki ,  Akio Nakagawa ,  Norio Yasuhara ,  Yoshinori Terazaki

Inventor： Hideyuki Funaki ,  Akio Nakagawa ,  Norio Yasuhara ,  Yoshinori Terazaki

IPC: H01L29/06 ,  H01L29/739 ,  H01L29/72

CPC classification number: H01L29/7394 ,  H01L29/0696

Abstract: A lateral IGBT has a n-source layer and a p-contact layer both in contact with a source electrode. The source layer has a trunk adjacent to a channel region under a gate electrode, and a plurality of branches extending from its trunk to the source electrode to be in contact with the source electrode. The contact layer has a trunk in contact with the source electrode, and a plurality of branches extending from its trunk to the source layer trunk The source layer branches and the contact layer branches have shapes complementary with each other and are alternately arranged. The source layer trunk has a width La in an X direction (channel direction), which satisfies a condition, 0.5 .mu.m

Abstract translation: 横向IGBT具有与源电极接触的n源层和p接触层。 源极层具有与栅电极下方的沟道区域相邻的中继线，以及从其主干延伸到源极电极与源极电极接触的多个分支。 接触层具有与源电极接触的干线，以及从其干线延伸到源层干线的多个分支。源极层分支和接触层分支具有彼此互补的形状并交替布置。 源层干线在X方向（沟道方向）上具有宽度La，满足0.5μm

公开(公告)号：US5548150A

公开(公告)日：1996-08-20

申请号：US425246

申请日：1995-04-17

Applicant: Ichiro Omura ,  Akio Nakagawa ,  Tadashi Sakai ,  Masayuki Sekimura ,  Hideyuki Funaki

Inventor： Ichiro Omura ,  Akio Nakagawa ,  Tadashi Sakai ,  Masayuki Sekimura ,  Hideyuki Funaki

IPC: H01F41/04 ,  H01L21/336 ,  H01L27/02 ,  H01L27/12 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/739 ,  H01L29/74 ,  H01L29/78 ,  H01L29/786 ,  H01L27/01

CPC classification number: H01L29/7824 ,  H01F41/046 ,  H01L27/0255 ,  H01L27/1203 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/1087 ,  H01L29/402 ,  H01L29/66772 ,  H01L29/7393 ,  H01L29/7436 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/7833 ,  H01L29/7835 ,  H01L29/78612 ,  H01L29/78618 ,  H01L29/78624 ,  H01L29/78639 ,  H01F2017/0086 ,  H01L29/0657 ,  H01L29/0692 ,  H01L29/42368 ,  Y10S257/901

Abstract: A high-resistant p-silicon layer is formed on a silicon substrate through a silicon oxide film. N-source and n-drain layers are selectively formed in the surface of the high-resistant p-silicon layer. A gate electrode is formed through a gate insulating film on a channel region between the source and drain layers. To induce an n-inverted layer under the gate electrode, a p-base layer is formed in the high-resistant p-silicon layer. A depletion layer extending from a pn junction between the n-drain layer and the high-resistant p-silicon layer reaches the silicon oxide film in a thermal equilibrium state. Part of the high-resistant p-silicon layer extends into a channel region between the drain and base layers. The drain and base layers are connected to each other through part of the depletion layer in the thermal equilibrium state. A field effect transistor having a high-speed operation is provided.

Abstract translation: 通过氧化硅膜在硅衬底上形成高电阻的p硅层。 在高电阻p-硅层的表面上选择性地形成N源极和n-漏极层。 在源极和漏极层之间的沟道区上通过栅极绝缘膜形成栅电极。 为了在栅电极下方引入n反转层，在高电阻p-硅层中形成p基层。 从n-漏层和高电阻p-硅层之间的pn结延伸的耗尽层在热平衡状态下到达氧化硅膜。 部分耐高温p硅层延伸到漏极和基极层之间的沟道区域。 漏极和基极层在热平衡状态下通过耗尽层的一部分彼此连接。 提供具有高速操作的场效应晶体管。

公开(公告)号：US09284186B2

公开(公告)日：2016-03-15

申请号：US13625249

申请日：2012-09-24

Applicant: Hiroshi Yamada ,  Hideyuki Funaki ,  Kazuhiro Suzuki ,  Kazuhiko Itaya ,  Armon Mahajerin ,  Kevin Limkrailassiri ,  Liwei Lin

Inventor： Hiroshi Yamada ,  Hideyuki Funaki ,  Kazuhiro Suzuki ,  Kazuhiko Itaya ,  Armon Mahajerin ,  Kevin Limkrailassiri ,  Liwei Lin

IPC: B81C1/00

CPC classification number: B81C1/00182

Abstract: After a TEOS oxide film is formed on the surface of a semiconductor device, a PSG film and an SiN film, which have air permeability, are formed on the surface of the TEOS oxide film. Thereafter, a Poly-Si film is formed thereon. A sacrifice layer is removed by a gaseous HF that passes through the PSG film, the SiN film, and the Poly-Si film, and then, the uppermost layer is covered with a Poly-Si/SiC film. A chip scale package having a thin-film hollow-seal structure can be realized on the semiconductor element.

Abstract translation: 在半导体器件的表面上形成TEOS氧化物膜之后，在TEOS氧化物膜的表面上形成具有透气性的PSG膜和SiN膜。 此后，在其上形成多晶硅膜。 通过通过PSG膜，SiN膜和Poly-Si膜的气态HF除去牺牲层，然后用Poly-Si / SiC膜覆盖最上层。 可以在半导体元件上实现具有薄膜中空密封结构的芯片级封装。

公开(公告)号：US08716822B2

公开(公告)日：2014-05-06

申请号：US13363801

申请日：2012-02-01

Applicant: Risako Ueno ,  Kazuhiro Suzuki ,  Hideyuki Funaki ,  Yoshinori Iida

Inventor： Risako Ueno ,  Kazuhiro Suzuki ,  Hideyuki Funaki ,  Yoshinori Iida

IPC: H01L31/0232

CPC classification number: H01L27/1464 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14689

Abstract: A solid-state imaging device according to an embodiment includes: a plurality of pixels arranged on a first face of a first semiconductor layer, each of the pixels including a photoelectric conversion element converting light entering through a second face of the first semiconductor layer on the opposite side from the first face into a signal charge, the photoelectric conversion element having a pn junction formed with a first semiconductor region formed on the first face and a second semiconductor region formed on a surface of the first semiconductor region; pixel separating regions separating the pixels from one another and formed between the pixels, each of the pixel separating regions including a second semiconductor layer covering faces in contact with the photoelectric conversion elements, and an insulating film with a lower refractive index than a refractive index of the second semiconductor layer to cover the second semiconductor layer.

Abstract translation: 根据实施例的固态成像装置包括：布置在第一半导体层的第一面上的多个像素，每个像素包括光电转换元件，其转换通过第一半导体层的第二面进入的光 所述光电转换元件具有形成在所述第一面上形成的第一半导体区域的pn结，以及形成在所述第一半导体区域的表面上的第二半导体区域; 像素分离区域，彼此分离并形成在像素之间，每个像素分隔区域包括覆盖与光电转换元件接触的面的第二半导体层，以及折射率低于折射率的绝缘膜 第二半导体层覆盖第二半导体层。