公开(公告)号：US5635736A

公开(公告)日：1997-06-03

申请号：US527729

申请日：1995-09-13

申请人： Hideyuki Funaki ,  Yoshihiro Yamaguchi

发明人： Hideyuki Funaki ,  Yoshihiro Yamaguchi

IPC分类号： H01L23/482 ,  H01L27/08 ,  H01L29/06 ,  H01L29/417 ,  H01L29/78 ,  H01L29/786 ,  H01L27/10

CPC分类号： H01L27/0802 ,  H01L23/4824 ,  H01L29/0692 ,  H01L29/41725 ,  H01L29/41758 ,  H01L29/7835 ,  H01L2924/0002

摘要： A MOS gate type semiconductor device, comprising an upper source wiring consisting of a plurality of upper source electrodes, an upper drain wiring provided on a semiconductor substrate and consisting of a plurality of upper drain electrodes formed in a comb-like arrangement such that the plurality of upper drain electrodes are engaged with the upper source electrodes, lower source electrodes provided at each of lower portions of adjacent pairs of the upper source electrodes and the upper drain electrodes such that the lower source electrodes are layered below the upper source electrodes and the upper drain electrodes, and lower drain electrodes provided at each of lower portions of adjacent pairs of the upper source electrodes and the upper drain electrodes electrode such that the lower drain electrodes are layered below the upper source electrodes and the upper drain electrodes, wherein the lower source electrodes are connected to the upper source electrodes and the source region, and are disposed so as to form a wave-like shape, and the lower drain electrodes are connected to the upper drain electrodes and the drain region, and are disposed so as to form a wave-like shape.

摘要翻译： 一种MOS栅型半导体器件，包括由多个上源电极组成的上源极布线，设置在半导体衬底上的上漏极布线，并且由形成为梳状布置的多个上漏电极组成， 上部漏电极与上部源电极接合，设置在相邻成对的上部源电极和上部漏电极的下部的下部源电极，使得下部源电极层叠在上部源电极和上部 漏极电极和下漏电极，其设置在相邻成对的上源电极和上漏电极电极的下部，使得下漏电极层叠在上源电极和上漏电极的下方，其中下源 电极连接到上源电极和源区，a d被配置成波形形状，下部漏极连接到上部漏电极和漏极区域，并且被配置为形成波浪形状。

公开(公告)号：US5777371A

公开(公告)日：1998-07-07

申请号：US716863

申请日：1996-09-20

申请人： Yusuke Kawaguchi ,  Yoshihiro Yamaguchi ,  Hideyuki Funaki

发明人： Yusuke Kawaguchi ,  Yoshihiro Yamaguchi ,  Hideyuki Funaki

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/7801 ,  H01L29/7824 ,  H01L29/42368

摘要： A high-breakdown-voltage semiconductor device includes a high-resistance semiconductor layer, a drift layer of the first conductivity type selectively formed in the surface of the high-resistance semiconductor layer, a drain layer formed in the surface of the drift layer of the first conductivity type, base layers of the second conductivity type selectively formed in the surface of the high-resistance semiconductor layer, a plurality of island-shaped source layers of the first conductivity type formed in the surfaces of the base layers of the second conductivity type, a gate electrode formed on the base layers of the second conductivity type between the source layers of the first conductivity type and the drift layer of the first conductivity type and between adjacent source layers of the first conductivity type via a gate insulating film, a drain electrode which contacts the drain layer, and source electrodes which contact both the source layers of the first conductivity type and the base layers of the second conductivity type.

摘要翻译： 高耐压半导体器件包括高电阻半导体层，选择性地形成在高电阻半导体层的表面中的第一导电类型的漂移层，形成在所述高电阻半导体层的漂移层的表面中的漏极层 第一导电类型，选择性地形成在高电阻半导体层的表面中的第二导电类型的基极层，形成在第二导电类型的基极层的表面中的多个第一导电类型的岛状源极层 形成在第一导电类型的源极层和第一导电类型的漂移层之间的第二导电类型的基极层上的栅极电极和经由栅极绝缘膜的第一导电类型的相邻源极层之间， 与漏极层接触的电极以及接触第一导电类型的源极层的源电极 第二导电类型的基层。

公开(公告)号：US5438220A

公开(公告)日：1995-08-01

申请号：US085056

申请日：1993-07-02

申请人： Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura ,  Hideyuki Funaki

发明人： Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura ,  Hideyuki Funaki

IPC分类号： H01L21/336 ,  H01L21/74 ,  H01L21/762 ,  H01L27/06 ,  H01L27/092 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L29/786 ,  H01L29/861

CPC分类号： H01L29/404 ,  H01L21/74 ,  H01L21/76264 ,  H01L21/76297 ,  H01L27/0623 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/405 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66772 ,  H01L29/7394 ,  H01L29/7436 ,  H01L29/7455 ,  H01L29/749 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78624 ,  H01L29/8611 ,  H01L21/76275 ,  H01L21/76286 ,  H01L29/78603 ,  H01L2924/0002

摘要： A high breakdown voltage semiconductor device includes a semiconductor substrate, an insulating layer formed on the semiconductor substrate, an active layer formed on the insulating layer and made of a high resistance semiconductor of a first conductivity type, a first impurity region of the first conductivity type formed in the active layer, and a second impurity region of a second conductivity type formed in the active layer and spaced apart from the first impurity region by a predetermined distance. The first impurity region is formed of diffusion layers. The diffusion layers are superimposed one upon another and differ in diffusion depth or diffusion window width, or both.

摘要翻译： 高耐压半导体器件包括半导体衬底，形成在半导体衬底上的绝缘层，形成在绝缘层上并由第一导电类型的高电阻半导体形成的有源层，第一导电类型的第一杂质区 形成在有源层中的第二杂质区和形成在有源层中并与第一杂质区隔开预定距离的第二导电类型的第二杂质区。 第一杂质区由扩散层形成。 扩散层彼此叠加并且扩散深度或扩散窗宽度不同，或两者均不同。

公开(公告)号：US5985708A

公开(公告)日：1999-11-16

申请号：US816596

申请日：1997-03-13

申请人： Akio Nakagawa ,  Naoharu Sugiyama ,  Tomoko Matsudai ,  Norio Yasuhara ,  Atsusi Kurobe ,  Hideyuki Funaki ,  Yusuke Kawaguchi ,  Yoshihiro Yamaguchi

发明人： Akio Nakagawa ,  Naoharu Sugiyama ,  Tomoko Matsudai ,  Norio Yasuhara ,  Atsusi Kurobe ,  Hideyuki Funaki ,  Yusuke Kawaguchi ,  Yoshihiro Yamaguchi

IPC分类号： H01L27/12 ,  H01L29/73 ,  H01L29/739 ,  H01L29/786 ,  H01L21/8249

CPC分类号： H01L29/78696 ,  H01L27/1203 ,  H01L29/7317 ,  H01L29/7394 ,  H01L29/78612 ,  H01L29/78624 ,  H01L29/78639 ,  H01L29/78645 ,  H01L29/78687

摘要： A semiconductor apparatus comprising a vertical type semiconductor device having a first conducting type semiconductor substrate, a drain layer formed on the surface of the semiconductor substrate, a drain electrode formed on the surface of the drain layer, a second conducting type base layer selectively formed on the surface of the semiconductor substrate opposite to the drain layer, a first conducting type source layer selectively formed on the surface of the second conducting type base layer, a source electrode formed on the first conducting type source layer and the second conducting type base layer, and a gate electrode formed in contact with the first conducting type source layer, the second conducting type base layer and the semiconductor substrate through a gate insulating film and a lateral semiconductor device having an insulating layer formed in a region of the surface of the semiconductor substrate different from the second conducting type base layer, and a polycrystalline semiconductor layer formed on the insulating layer and having a first conducting type region and a second conducting type region, wherein the first conducting type source layer of the vertical semiconductor device and the first conducting type region of the polycrystalline semiconductor layer are simultaneously formed.

摘要翻译： 一种半导体装置，包括具有第一导电型半导体衬底的垂直型半导体器件，形成在半导体衬底的表面上的漏极层，形成在漏极层的表面上的漏电极，第二导电型基极层， 所述半导体衬底的与所述漏极层相对的表面，选择性地形成在所述第二导电型基极层的表面上的第一导电型源极层，形成在所述第一导电型源极层和所述第二导电型基极层上的源电极， 以及通过栅极绝缘膜与第一导电型源极层，第二导电型基极层和半导体基板接触形成的栅电极，以及在半导体基板的表面的区域中形成有绝缘层的侧面半导体装置 不同于第二导电型基底层，和多晶 半导体层形成在绝缘层上并具有第一导电类型区域和第二导电类型区域，其中垂直半导体器件的第一导电型源极层和多晶半导体层的第一导电类型区域同时形成。

公开(公告)号：US5981983A

公开(公告)日：1999-11-09

申请号：US933135

申请日：1997-09-18

申请人： Hideyuki Funaki ,  Yoshihiro Yamaguchi

发明人： Hideyuki Funaki ,  Yoshihiro Yamaguchi

IPC分类号： H01L29/417 ,  H01L29/739 ,  H01L29/68

CPC分类号： H01L29/41758 ,  H01L29/7394

摘要： A semiconductor device includes a substrate, an insulating layer formed on the substrate, a base layer of a first conductivity type formed on the insulating layer, a drain layer of a second conductivity type selectively formed above the surface of the base layer of the first conductivity type, a drain electrode formed on and connected to the drain layer of the second conductivity type, a base layer of the second conductivity type selectively formed on the base layer of the first conductivity type, a source layer of the first conductivity type isolated from the base layer of the first conductivity type and selectively formed in the surface area of the base layer of the second conductivity type, a source electrode formed on and connected to the source layer of the first conductivity type and the base layer of the second conductivity type, and a gate electrode formed above a portion of the base layer of the second conductivity type which lies between the source layer of the first conductivity type and the base layer of the first conductivity type with a gate insulating film disposed therebetween.

摘要翻译： 半导体器件包括基板，形成在基板上的绝缘层，形成在绝缘层上的第一导电类型的基极层，第二导电类型的漏极层，选择性地形成在第一导电性的基底层表面上方 形成在第二导电类型的漏极层上并连接到第二导电类型的漏极层的漏电极，选择性地形成在第一导电类型的基极层上的第二导电类型的基极层，与第一导电类型的第一导电类型隔离的源极层 第一导电类型的基底层，并且选择性地形成在第二导电类型的基底层的表面区域中，形成在第一导电类型的源极层和第二导电类型的基极层上并连接到第二导电类型的源极层的源电极， 以及形成在位于第一导电体的源极层之间的第二导电类型的基底层的一部分上方的栅电极 vity型和第一导电类型的基底层，其间设置有栅极绝缘膜。

公开(公告)号：US5640040A

公开(公告)日：1997-06-17

申请号：US481097

申请日：1995-06-07

申请人： Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura ,  Hideyuki Funaki

发明人： Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura ,  Hideyuki Funaki

IPC分类号： H01L21/336 ,  H01L21/74 ,  H01L21/762 ,  H01L27/06 ,  H01L27/092 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L29/786 ,  H01L29/861 ,  H01L23/58

CPC分类号： H01L29/404 ,  H01L21/74 ,  H01L21/76264 ,  H01L21/76297 ,  H01L27/0623 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/405 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66772 ,  H01L29/7394 ,  H01L29/7436 ,  H01L29/7455 ,  H01L29/749 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78624 ,  H01L29/8611 ,  H01L21/76275 ,  H01L21/76286 ,  H01L29/78603 ,  H01L2924/0002

摘要： A high breakdown voltage semiconductor device comprising a semiconductor substrate, an insulating layer formed on the semiconductor substrate, an active layer formed on the insulating layer and made of a high resistance semiconductor of a first conductivity type, a first impurity region of the first conductivity type formed in the active layer, and a second impurity region of a second conductivity type formed in the active layer and spaced apart from the first impurity region by a predetermined distance. The first impurity region is formed of diffusion layers. The diffusion layers are superimposed one upon another and differ in diffusion depth or diffusion window width, or both.

摘要翻译： 一种高耐压电压半导体器件，包括半导体衬底，形成在半导体衬底上的绝缘层，形成在绝缘层上并由第一导电类型的高电阻半导体形成的有源层，第一导电类型的第一杂质区 形成在有源层中的第二杂质区和形成在有源层中并与第一杂质区隔开预定距离的第二导电类型的第二杂质区。 第一杂质区由扩散层形成。 扩散层彼此叠加并且扩散深度或扩散窗宽度不同，或两者均不同。

公开(公告)号：US5592014A

公开(公告)日：1997-01-07

申请号：US484864

申请日：1995-06-07

申请人： Hideyuki Funaki ,  Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura

发明人： Hideyuki Funaki ,  Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura

IPC分类号： H01L21/336 ,  H01L21/762 ,  H01L27/06 ,  H01L27/092 ,  H01L27/12 ,  H01L29/06 ,  H01L29/40 ,  H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L29/786 ,  H01L29/861 ,  H01L23/58

CPC分类号： H01L29/404 ,  H01L21/76264 ,  H01L27/0623 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/402 ,  H01L29/405 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66772 ,  H01L29/7394 ,  H01L29/7436 ,  H01L29/7455 ,  H01L29/749 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78624 ,  H01L29/8611 ,  H01L21/76275 ,  H01L21/76286 ,  H01L2924/0002

摘要： A high breakdown voltage semiconductor apparatus comprises a substrate having an insulating layer formed thereon, a high resistance semiconductor layer of a first conductivity type formed on said insulating layer, a base region of the first conductivity type formed selectively in a surface region of the high resistance semiconductor layer, a drift region of a second conductivity type formed selectively in the surface region of the high resistance semiconductor layer so as not to reach the insulating layer, a source region of the second conductivity type formed in the base region, a drain region formed in the drift region, a gate electrode formed on a region between the source region and the drift region, with a gate insulating film interposed between the gate electrode and the region between the source region and the drift region, a source electrode provided in contact with the base region and the source region, a drain electrode provided in contact with the drain region. The dosage of impurities in the high resistance semiconductor layer is 2.times.10.sup.12 cm.sup.-2 to 3.times.10.sup.12 cm.sup.-2 and the dosage of impurities in the drift layer is 1.times.10.sup.12 cm.sup.-2 to 2.times.10.sup.12 cm.sup.-2.

摘要翻译： 一种高耐压电压半导体装置，包括：在其上形成有绝缘层的基板，形成在所述绝缘层上的第一导电类型的高电阻半导体层，所述第一导电类型的基极区选择性地形成在所述高电阻的表面区域中 半导体层，选择性地形成在高电阻半导体层的表面区域中以便不到达绝缘层的第二导电类型的漂移区域，形成在基极区域中的第二导电类型的源极区域，形成的漏极区域 在漂移区域中，形成在源极区域和漂移区域之间的区域上的栅电极，栅极绝缘膜插入在栅极电极和源极区域与漂移区域之间的区域中，源极电极与 所述基极区域和所述源极区域，设置成与所述漏极区域接触的漏极电极。 高电阻半导体层中的杂质用量为2×10 12 cm -2至3×10 12 cm -2，漂移层中的杂质用量为1×10 12 cm -2至2×10 12 cm -2。

公开(公告)号：US08987912B2

公开(公告)日：2015-03-24

申请号：US13020235

申请日：2011-02-03

申请人： Yoshihiro Yamaguchi

发明人： Yoshihiro Yamaguchi

IPC分类号： H01L23/02 ,  H01L23/52 ,  H01L23/48 ,  H01L23/10 ,  H01L23/34 ,  H01L29/40 ,  H01L23/31 ,  H01L23/373 ,  H01L23/433 ,  H01L23/495 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/3107 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49531 ,  H01L23/49811 ,  H01L24/01 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012

摘要： A semiconductor device includes a substrate having a conductor; a semiconductor chip disposed on the substrate and electrically connected to the conductor; a tubular electrode having one end electrically connected to the conductor; and a sealing resin sealing the substrate, the semiconductor chip and the electrode. The electrode is configured to be extendable and contractible in the stacking direction in which the substrate and the semiconductor chip are stacked in the state before sealing of the sealing resin. The edge of the other end of the electrode is exposed from the sealing resin. The electrode has a hollow space opened at the edge of the other end. Therefore, a semiconductor device reduced in size and a method of manufacturing this semiconductor device can be provided.

摘要翻译： 半导体器件包括具有导体的衬底; 半导体芯片，其设置在所述基板上并电连接到所述导体; 管状电极，其一端电连接到导体; 以及将基板，半导体芯片和电极密封的密封树脂。 电极被配置为在密封树脂密封之前的状态下层叠基板和半导体芯片的堆叠方向上可伸缩。 电极另一端的边缘从密封树脂露出。 电极具有在另一端的边缘处开口的中空空间。 因此，可以提供尺寸减小的半导体器件和制造该半导体器件的方法。

公开(公告)号：US08976193B2

公开(公告)日：2015-03-10

申请号：US11754582

申请日：2007-05-29

申请人： Hiroki Takakura ,  Shiro Miyagi ,  Yoshihiro Yamaguchi

发明人： Hiroki Takakura ,  Shiro Miyagi ,  Yoshihiro Yamaguchi

IPC分类号： G09G5/00 ,  G06F17/30 ,  G06F3/0481

CPC分类号： G06F17/30265 ,  G06F3/0481

摘要： An information processing apparatus that executes information display processing is disclosed. The apparatus includes: a display unit that executes information display; and a data processing unit that executes a control of the information display of the display unit and data processing based on a user input. The data processing unit displays an image browsing screen, which corresponds to image data stored in a storage unit, on the display unit and executes display of a map at the position, which corresponds to position information included in attribute information of a selected image, on the basis of a user's input of image selection information and map display request.

摘要翻译： 公开了执行信息显示处理的信息处理装置。 该装置包括：执行信息显示的显示单元; 以及数据处理单元，其执行对显示单元的信息显示的控制和基于用户输入的数据处理。 该数据处理单元将与存储在存储单元中的图像数据相对应的图像浏览屏幕显示在显示单元上，并且在与所选择的图像的属性信息中包括的位置信息对应的位置上执行地图的显示， 用户输入图像选择信息和地图显示请求的基础。

公开(公告)号：US08729421B2

公开(公告)日：2014-05-20

申请号：US11629283

申请日：2005-06-02

申请人： Satoshi Ohnishi ,  Yoshihiro Yamaguchi

发明人： Satoshi Ohnishi ,  Yoshihiro Yamaguchi

IPC分类号： B23K9/02

CPC分类号： B23K37/0408 ,  B23K7/002 ,  B23K10/00 ,  B23K26/0884 ,  B23K26/16 ,  B23K26/38 ,  B23K26/702 ,  B23K37/0461 ,  B23K2101/18

摘要： A lattice pallet 13 having a large number of supporters for placing a plate 14 is installed to a table 12 so as to be freely fittable and removable. Bringing in of the plate 14 is performed by the method of raising the lattice pallet 13 with a crane with the plate 14 already having been loaded upon the lattice pallet 13 in a different location, transporting them over the table 12, and lowering them down onto the table 12. Directly after cutting has been completed, the lattice pallet 12 is raised and separated from the table 12 with the manufactured product and the left over material carried upon it and is taken away to a different location, and another lattice pallet 13 with another plate 14 mounted upon it is brought in with the crane upon the table 12, and the task of cutting this other plate 14 is commenced.

摘要翻译： 具有用于放置板14的大量支撑器的格子托盘13被安装到桌子12上，以便可自由地装配和拆卸。 通过用起重机提升格子托盘13的方法来进行板14的进入，该起重机已将板14已经装载在不同位置的格子托盘13上，将它们运送到工作台12上，并将它们下降到 桌子12.切割完成之后，格子托盘12被升起并与工作台12分离，制成品并将剩下的材料运送到其上并被带走到不同的位置，另一个格子托盘13具有 安装在其上的另一个板14与起重机一起被放置在工作台12上，并且开始切割另一个板14的任务。