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    Current leakage in RC ESD clamps
    61.
    发明授权
    Current leakage in RC ESD clamps 有权
    RC ESD钳位电流泄漏

    公开(公告)号：US08643987B2

    公开(公告)日：2014-02-04

    申请号：US13464131

    申请日：2012-05-04

    申请人： Albert M. Chu ,  Joseph A. Iadanza ,  Mujahid Muhammad ,  Daryl M. Seitzer ,  Rohit Shetty ,  Jane S. Tu

    发明人： Albert M. Chu ,  Joseph A. Iadanza ,  Mujahid Muhammad ,  Daryl M. Seitzer ,  Rohit Shetty ,  Jane S. Tu

    IPC分类号： H02H9/00 ,  H02H3/20 ,  H02H9/04 ,  H02H3/22

    CPC分类号： H02H9/046

    摘要： Aspects of the invention provide an electrostatic discharge (ESD) protection device for eliminating current leakage, and a related method. In one embodiment, an ESD protection device includes: a resistor-capacitor (RC) circuit for receiving a power supply voltage; an ESD clamp including a plurality of n-type field-effect transistors (nFETs) for protecting the IC during an ESD event; a trigger circuit for receiving an output of the RC circuit and generating a trigger pulse to turn on the ESD clamp during the ESD event; and an nFET bias selection circuit connected to the trigger circuit, the nFET bias selection circuit for selecting one of: a low voltage supply or a negative bias voltage supply for the trigger circuit, such that the trigger circuit generates a trigger pulse, in response to selecting the negative bias voltage supply, to turn off the ESD clamp during normal operation.

    摘要翻译： 本发明提供一种用于消除电流泄漏的静电放电（ESD）保护装置及相关方法。 在一个实施例中，ESD保护装置包括：用于接收电源电压的电阻器 - 电容器（RC）电路; 包括用于在ESD事件期间保护IC的多个n型场效应晶体管（nFET）的ESD钳位; 触发电路，用于接收RC电路的输出并产生触发脉冲以在ESD事件期间导通ESD钳位; 以及连接到触发电路的nFET偏置选择电路，nFET偏置选择电路，用于选择触发电路的低电压电源或负偏置电压源，使得触发电路响应于触发电路产生触发脉冲 选择负偏压电源，在正常工作期间关闭ESD钳位。

    CURRENT LEAKAGE IN RC ESD CLAMPS
    62.
    发明申请
    CURRENT LEAKAGE IN RC ESD CLAMPS 有权
    RC ESD CLAMP中的电流泄漏

    公开(公告)号：US20130293991A1

    公开(公告)日：2013-11-07

    申请号：US13464131

    申请日：2012-05-04

    申请人： Albert M. Chu ,  Joseph A. Iadanza ,  Mujahid Muhammad ,  Daryl M. Seitzer ,  Rohit Shetty ,  Jane S. Tu

    发明人： Albert M. Chu ,  Joseph A. Iadanza ,  Mujahid Muhammad ,  Daryl M. Seitzer ,  Rohit Shetty ,  Jane S. Tu

    IPC分类号： H02H9/04 ,  H01L27/06

    CPC分类号： H02H9/046

    摘要： Aspects of the invention provide an electrostatic discharge (ESD) protection device for eliminating current leakage, and a related method. In one embodiment, an ESD protection device includes: a resistor-capacitor (RC) circuit for receiving a power supply voltage; an ESD clamp including a plurality of n-type field-effect transistors (nFETs) for protecting the IC during an ESD event; a trigger circuit for receiving an output of the RC circuit and generating a trigger pulse to turn on the ESD clamp during the ESD event; and an nFET bias selection circuit connected to the trigger circuit, the nFET bias selection circuit for selecting one of: a low voltage supply or a negative bias voltage supply for the trigger circuit, such that the trigger circuit generates a trigger pulse, in response to selecting the negative bias voltage supply, to turn off the ESD clamp during normal operation.

    摘要翻译： 本发明提供一种用于消除电流泄漏的静电放电（ESD）保护装置及相关方法。 在一个实施例中，ESD保护装置包括：用于接收电源电压的电阻器 - 电容器（RC）电路; 包括用于在ESD事件期间保护IC的多个n型场效应晶体管（nFET）的ESD钳位; 触发电路，用于接收RC电路的输出并产生触发脉冲以在ESD事件期间导通ESD钳位; 以及连接到触发电路的nFET偏置选择电路，nFET偏置选择电路，用于选择触发电路的低电压电源或负偏置电压源，使得触发电路响应于触发电路产生触发脉冲 选择负偏压电源，在正常工作期间关闭ESD钳位。

    Resistor-2 resistor (R-2R) digital-to-analog converter with resistor network reversal
    66.
    发明授权
    Resistor-2 resistor (R-2R) digital-to-analog converter with resistor network reversal 失效
    具有电阻网络反转的电阻器-2电阻（R-2R）数模转换器

    公开(公告)号：US08711022B2

    公开(公告)日：2014-04-29

    申请号：US13526915

    申请日：2012-06-19

    申请人： Joseph A. Iadanza

    发明人： Joseph A. Iadanza

    IPC分类号： H03M1/78

    CPC分类号： H03M1/785

    摘要： A resistor-2 resistor (R-2R) digital-to-analog converter with resistor network reversal and methods of use are disclosed. A circuit includes a plurality of resistor stacks and a plurality of separation resistors which separate the resistor stacks. The circuit further includes a plurality of selection devices connected to a respective one of the plurality of resistor stacks. The circuit also includes a first termination resistor stack connected to a drain of a first resistor stack of the plurality of resistor stacks and a second termination resistor stack connected to a drain of a last resistor stack of the plurality of resistor stacks. The circuit further includes a first switch connected to the drain of the first resistor stack of the plurality of resistor stacks and an output. The circuit also includes a second switch connected to the drain of the last resistor stack of the plurality of resistor stacks and the output.

    摘要翻译： 公开了一种具有电阻网络反转的电阻器2电阻（R-2R）数模转换器及其使用方法。 电路包括多个电阻器堆叠和分离电阻器堆叠的多个分离电阻器。 电路还包括连接到多个电阻器堆叠中的相应一个的多个选择装置。 电路还包括连接到多个电阻器堆叠中的第一电阻器堆叠的漏极的第一终端电阻器堆叠和连接到多个电阻器堆叠的最后一个电阻器堆叠的漏极的第二终端电阻器堆叠。 电路还包括连接到多个电阻器堆叠中的第一电阻器堆叠的漏极的第一开关和输出端。 电路还包括连接到多个电阻器堆叠的最后一个电阻器堆叠的漏极和输出端的第二开关。

    Digital to analog converter having fastpaths
    67.
    发明授权
    Digital to analog converter having fastpaths 有权
    具有快速路径的数模转换器

    公开(公告)号：US07868809B2

    公开(公告)日：2011-01-11

    申请号：US12389618

    申请日：2009-02-20

    申请人： Joseph A. Iadanza ,  Benjamin T Voegeli

    发明人： Joseph A. Iadanza ,  Benjamin T Voegeli

    IPC分类号： H03M1/78

    CPC分类号： H03M1/06 ,  H03M1/682 ,  H03M1/765

    摘要： A resistor-based digital to analog converter (DAC) having mux fastpaths, which selectively connect a subset (or an entirety) of voltage divider nodes in a DAC to either a higher level of multiplexor hierarchy, or a DAC output node, effectively bypassing one or more levels of multiplexor devices. In addition, the fastpaths may selectively connect lower levels of multiplexor hierarchy to higher levels of multiplexor hierarchy and/or a DAC output node.

    摘要翻译： 具有多路复用快速路径的基于电阻的数模转换器（DAC），其将DAC中的分压器节点的子集（或整体）有选择地连接到更高级别的多路复用器层级或DAC输出节点，有效地绕过一个 或更多级别的多路复用器设备。 此外，快速路径可以选择性地将较低级别的多路复用器层级连接到更高级别的多路复用器层级和/或DAC输出节点。

    Design structure for implementing oxide leakage based voltage divider network for integrated circuit devices
    68.
    发明授权
    Design structure for implementing oxide leakage based voltage divider network for integrated circuit devices 失效
    用于集成电路器件实现基于氧化物泄漏的分压网络的设计结构

    公开(公告)号：US07579897B2

    公开(公告)日：2009-08-25

    申请号：US11872743

    申请日：2007-10-16

    申请人： Kenneth J. Goodnow ,  Joseph A. Iadanza ,  Edward J. Nowak ,  Douglas W. Stout

    发明人： Kenneth J. Goodnow ,  Joseph A. Iadanza ,  Edward J. Nowak ,  Douglas W. Stout

    IPC分类号： H03K17/687

    CPC分类号： H03K17/687 ,  H03K2017/6878

    摘要： A design structure embodied in a machine readable medium used in a design process includes a voltage divider device, including a double gate field effect transistor (FET) having a first gate and a second gate disposed at opposite sides of a body region; the first and second gates configured to have an input voltage coupled thereacross; and at least one of a source of the FET and a drain of the FET configured to have an output voltage taken therefrom; wherein the output voltage represents a divided voltage with respect to the input voltage.

    摘要翻译： 体现在设计过程中使用的机器可读介质中的设计结构包括分压器件，其包括具有第一栅极的双栅场效应晶体管（FET）和设置在体区相对侧的第二栅极; 所述第一和第二栅极配置成具有耦合到其上的输入电压; 并且所述FET的源极和所述FET的漏极中的至少一个被配置为具有从其获取的输出电压; 其中输出电压表示相对于输入电压的分压。

    Digital to Analog Converter Having Fastpaths
    69.
    发明申请
    Digital to Analog Converter Having Fastpaths 有权
    具有快速路径的数模转换器

    公开(公告)号：US20090160691A1

    公开(公告)日：2009-06-25

    申请号：US12389618

    申请日：2009-02-20

    申请人： Joseph A. Iadanza ,  Benjamin T. Voegeli

    发明人： Joseph A. Iadanza ,  Benjamin T. Voegeli

    IPC分类号： H03M1/76

    CPC分类号： H03M1/06 ,  H03M1/682 ,  H03M1/765

    摘要： A resistor-based digital to analog converter (DAC) having mux fastpaths, which selectively connect a subset (or an entirety) of voltage divider nodes in a DAC to either a higher level of multiplexor hierarchy, or a DAC output node, effectively bypassing one or more levels of multiplexor devices. In addition, the fastpaths may selectively connect lower levels of multiplexor hierarchy to higher levels of multiplexor hierarchy and/or a DAC output node.

    摘要翻译： 具有多路复用快速路径的基于电阻的数模转换器（DAC），其将DAC中的分压器节点的子集（或整体）有选择地连接到更高级别的多路复用器层级或DAC输出节点，有效地绕过一个 或更多级别的多路复用器设备。 此外，快速路径可以选择性地将较低级别的多路复用器层级连接到更高级别的多路复用器层级和/或DAC输出节点。