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    Methods of reading and using memory cells
    61.
    发明授权
    Methods of reading and using memory cells 有权
    阅读和使用记忆体的方法

    公开(公告)号：US08675392B2

    公开(公告)日：2014-03-18

    申请号：US13463794

    申请日：2012-05-03

    Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

    Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: G11C11/21 ,  G11C7/22 ,  G11C7/12 ,  G11C8/08 ,  G11C8/18

    CPC classification number: G11C13/004 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0061 ,  G11C2013/0052 ,  G11C2213/72

    Abstract: Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is applied for a sufficient duration of time; and the reading is conducted with a pulse that is of too short of a time duration to be sufficient for the write operation. In some embodiments, the pulse utilized for the reading may have an absolute value of voltage that is greater than or equal to the voltage utilized for the write operation. In some embodiments, the memory cells may comprise non-ohmic devices; such as memristors and diodes.

    Abstract translation: 一些实施例包括读取存储器单元的方法。 存储器单元具有写入操作，只有当足够的绝对值的电压施加足够的持续时间时才发生; 并且读取是用太短的持续时间的脉冲来进行的，以足以用于写入操作。 在一些实施例中，用于读取的脉冲可以具有大于或等于用于写入操作的电压的绝对值。 在一些实施例中，存储器单元可以包括非欧姆器件; 如忆阻器和二极管。

    Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays
    62.
    发明授权
    Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays 有权
    非易失性电阻氧化物存储单元，非易失性电阻氧化物存储器阵列以及形成非易失性电阻氧化物存储器单元和存储器阵列的方法

    公开(公告)号：US08674336B2

    公开(公告)日：2014-03-18

    申请号：US13231667

    申请日：2011-09-13

    Applicant: John Smythe ,  Bhaskar Srinivasan ,  Gurtej S. Sandhu

    Inventor： John Smythe ,  Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: H01L45/00

    CPC classification number: H01L45/04 ,  G11C11/56 ,  G11C13/00 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1666

    Abstract: A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Insulative material is deposited over the first electrode. An opening is formed into the insulative material over the first electrode. The opening includes sidewalls and a base. The opening sidewalls and base are lined with a multi-resistive state layer comprising multi-resistive state metal oxide-comprising material which less than fills the opening. A second conductive electrode of the memory cell is formed within the opening laterally inward of the multi-resistive state layer lining the sidewalls and elevationally over the multi-resistive state layer lining the base. Other aspects and implementations are contemplated.

    Abstract translation: 一种形成非易失性电阻氧化物存储单元的方法包括形成存储单元的第一导电电极作为衬底的一部分。 绝缘材料沉积在第一电极上。 在第一电极上形成绝缘材料的开口。 开口包括侧壁和底座。 开口侧壁和基底衬有包含少于填充开口的多电阻态金属氧化物材料的多电阻状态层。 存储单元的第二导电电极形成在多个电阻状态层的横向内侧的开口的内部，该电阻层衬在侧壁上并且在衬底基底上的多电阻状态层上。 考虑了其他方面和实现。

    Select devices including an open volume, memory devices and systems including same, and methods for forming same
    64.
    发明授权
    Select devices including an open volume, memory devices and systems including same, and methods for forming same 有权
    选择包括开放卷的设备，包括其的存储设备和系统以及用于形成它们的方法

    公开(公告)号：US08541770B2

    公开(公告)日：2013-09-24

    申请号：US13211036

    申请日：2011-08-16

    Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

    Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: H01L29/06

    CPC classification number: H01L29/88 ,  H01L21/3205 ,  H01L27/1021 ,  Y10S438/957

    Abstract: Select devices including an open volume that functions as a high bandgap material having a low dielectric constant are disclosed. The open volume may provide a more nonlinear, asymmetric I-V curve and enhanced rectifying behavior in the select devices. The select devices may comprise, for example, a metal-insulator-insulator-metal (MIIM) diode. Various methods may be used to form select devices and memory systems including such select devices. Memory devices and electronic systems include such select devices.

    Abstract translation: 公开了包括用作具有低介电常数的高带隙材料的开放体积的装置。 开放体积可以在选择装置中提供更非线性的非对称I-V曲线和增强的整流行为。 选择装置可以包括例如金属 - 绝缘体 - 绝缘体 - 金属（MIIM）二极管。 可以使用各种方法来形成包括这种选择装置的选择装置和存储器系统。 存储器件和电子系统包括这样的选择器件。

    Memory cells, methods of programming memory cells, and methods of forming memory cells
    65.
    发明授权
    Memory cells, methods of programming memory cells, and methods of forming memory cells 有权
    存储单元，编程存储单元的方法以及形成存储单元的方法

    公开(公告)号：US08526213B2

    公开(公告)日：2013-09-03

    申请号：US12917361

    申请日：2010-11-01

    Applicant: Roy E. Meade ,  Bhaskar Srinivasan ,  Gurtej S. Sandhu

    Inventor： Roy E. Meade ,  Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: G11C11/00 ,  G11C13/02 ,  G11C11/21 ,  G11C13/00

    CPC classification number: H01L45/085 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0069 ,  G11C2213/56 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/145 ,  H01L45/146

    Abstract: Some embodiments include methods of programming a memory cell. A plurality of charge carriers may be moved within the memory cell, with an average charge across the moving charge carriers having an absolute value greater than 2. Some embodiments include methods of forming and programming an ionic-transport-based memory cell. A stack is formed to have programmable material between first and second electrodes. The programmable material has mobile ions which are moved within the programmable material to transform the programmable material from one memory state to another. An average charge across the moving mobile ions has an absolute value greater than 2. Some embodiments include memory cells with programmable material between first and second electrodes. The programmable material includes an aluminum nitride first layer, and includes a second layer containing a mobile ion species in common with the first layer.

    Abstract translation: 一些实施例包括编程存储器单元的方法。 多个电荷载体可以在存储器单元内移动，其中跨越移动电荷载流子的绝对值大于2的平均电荷。一些实施例包括形成和编程基于离子传输的存储单元的方法。 堆叠形成为在第一和第二电极之间具有可编程材料。 可编程材料具有在可编程材料内移动的移动离子，以将可编程材料从一个存储器状态转换到另一个。 移动移动离子上的平均电荷具有大于2的绝对值。一些实施例包括在第一和第二电极之间具有可编程材料的存储单元。 可编程材料包括氮化铝第一层，并且包括含有与第一层共同的可移动离子物质的第二层。

    Methods of self-aligned growth of chalcogenide memory access device
    67.
    发明授权
    Methods of self-aligned growth of chalcogenide memory access device 有权
    硫属化物存储器存取装置的自对准生长方法

    公开(公告)号：US08415661B2

    公开(公告)日：2013-04-09

    申请号：US13491165

    申请日：2012-06-07

    Applicant: Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

    Inventor： Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

    IPC: H01L29/06

    CPC classification number: H01L27/2481 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1683

    Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.

    Abstract translation: 用于形成包含掺杂的硫族化物材料的存储器存取装置的自对准制造方法。 该方法可用于形成三维堆叠的交叉点存储器阵列。 该方法包括在第一导电电极上形成绝缘材料，图案化绝缘材料以形成暴露第一导电电极的部分的通孔，在绝缘材料的通孔内形成存储器访问装置，并在存储器访问上形成存储元件 设备，其中存储在所述存储器元件中的数据可经由所述存储器访问设备访问。 存储器存取装置由掺杂的硫族化物材料形成，并使用自对准制造方法形成。

    Memory Cells, Non-Volatile Memory Arrays, Methods Of Operating Memory Cells, Methods Of Reading To And Writing From A Memory Cell, And Methods Of Programming A Memory Cell
    68.
    发明申请
    Memory Cells, Non-Volatile Memory Arrays, Methods Of Operating Memory Cells, Methods Of Reading To And Writing From A Memory Cell, And Methods Of Programming A Memory Cell 有权
    存储单元，非易失性存储器阵列，操作存储器单元的方法，从存储器单元读取和写入的方法以及编程存储单元的方法

    公开(公告)号：US20130001498A1

    公开(公告)日：2013-01-03

    申请号：US13612513

    申请日：2012-09-12

    Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

    Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: H01L45/00

    CPC classification number: G11C13/0002 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/12 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/52 ,  G11C2213/56 ,  G11C2213/77 ,  H01L27/101 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1206

    Abstract: In one aspect, a method of operating a memory cell includes using different electrodes to change a programmed state of the memory cell than are used to read the programmed state of the memory cell. In one aspect, a memory cell includes first and second opposing electrodes having material received there-between. The material has first and second lateral regions of different composition relative one another. One of the first and second lateral regions is received along one of two laterally opposing edges of the material. Another of the first and second lateral regions is received along the other of said two laterally opposing edges of the material. At least one of the first and second lateral regions is capable of being repeatedly programmed to at least two different resistance states. Other aspects and implementations are disclosed.

    Abstract translation: 一方面，操作存储单元的方法包括使用不同的电极来改变存储器单元的编程状态，而不是用于读取存储单元的编程状态。 在一个方面，存储单元包括第一和第二相对电极，其间具有接收在其间的材料。 该材料具有彼此不同组成的第一和第二横向区域。 第一和第二横向区域中的一个沿着材料的两个横向相对的边缘中的一个被接收。 第一和第二横向区域中的另一个沿着材料的所述两个横向相对的边缘中的另一个被容纳。 第一和第二横向区域中的至少一个能够被重复编程至至少两个不同的阻力状态。 公开了其他方面和实现。

    Diodes, and methods of forming diodes
    69.
    发明授权
    Diodes, and methods of forming diodes 有权
    二极管和形成二极管的方法

    公开(公告)号：US08323995B2

    公开(公告)日：2012-12-04

    申请号：US13094642

    申请日：2011-04-26

    Applicant: Gurtej S. Sandhu ,  Bhaskar Srinivasan

    Inventor： Gurtej S. Sandhu ,  Bhaskar Srinivasan

    IPC: H01L21/00

    CPC classification number: H01L45/00 ,  Y10S257/91 ,  Y10S438/90 ,  Y10S438/902 ,  Y10S438/983

    Abstract: Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes.

    Abstract translation: 一些实施例包括形成二极管的方法。 所述方法可以包括氧化导电电极的上表面以在导电电极上形成氧化物层。 在一些实施方案中，所述方法可包括在导电电​​极上形成可氧化材料，以及随后氧化可氧化材料以在导电电极上形成氧化物层。 在一些实施例中，所述方法可包括在导电电​​极上形成金属卤化物层。 一些实施例包括在一对二极管电极之间包含金属卤化物层的二极管。

    MEMORY CELL STRUCTURES AND METHODS
    70.
    发明申请
    MEMORY CELL STRUCTURES AND METHODS 有权
    存储单元结构和方法

    公开(公告)号：US20120280302A1

    公开(公告)日：2012-11-08

    申请号：US13554278

    申请日：2012-07-20

    Applicant: Gurtej S. Sandhu ,  Bhaskar Srinivasan

    Inventor： Gurtej S. Sandhu ,  Bhaskar Srinivasan

    IPC: H01L29/78 ,  G11C16/04

    CPC classification number: G11C16/0416 ,  G11C16/0483

    Abstract: Memory cell structures and methods are described herein. One or more memory cells include a transistor having a charge storage node, a dielectric material positioned between the charge storage node and a channel region of the transistor, the channel region positioned between a source region and a drain region, and a first electrode of a diode coupled to the charge storage node.

    Abstract translation: 本文描述了存储单元结构和方法。 一个或多个存储单元包括具有电荷存储节点的晶体管，位于电荷存储节点和晶体管的沟道区之间的电介质材料，位于源区和漏区之间的沟道区，以及位于源区和漏区之间的第一电极 耦合到电荷存储节点的二极管。

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