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    Methods and systems for limiting data traffic while processing computer system operations
    61.
    发明授权
    Methods and systems for limiting data traffic while processing computer system operations 有权

    公开(公告)号：US12287970B2

    公开(公告)日：2025-04-29

    申请号：US18422162

    申请日：2024-01-25

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Yamin Friedman ,  Idan Burstein ,  Hillel Chapman ,  Gal Yefet

    IPC: G06F3/06 ,  G06F12/06 ,  G06F12/0897

    Abstract: A method and system are provided for limiting unnecessary data traffic on the data busses connecting the various levels of system memory. Some embodiments may include processing an invalidation command associated with a system or network operation requiring temporary storage of data in a local memory area. The invalidation command may comprise a memory location indicator capable of identifying the physical addresses of the associated data in the local memory area. Some embodiments may preclude the data associated with the system or network operation from being written to a main memory by invalidating the memory locations holding the temporary data once the system or network operation has finished utilizing the local memory area.

    Methods and systems for managing memory buffer usage while processing computer system operations
    63.
    发明授权
    Methods and systems for managing memory buffer usage while processing computer system operations 有权

    公开(公告)号：US12182394B2

    公开(公告)日：2024-12-31

    申请号：US17658292

    申请日：2022-04-07

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Yamin Friedman ,  Idan Burstein ,  Gal Yefet

    IPC: G06F3/06

    Abstract: A method and system are provided for limiting unnecessary data traffic on the data communication connections connecting various system components, including the various levels of system memory. Some embodiments may include processing a buffer allotment request and/or a buffer release command in coordination with a system or network operation requiring temporary storage of data in a memory buffer. The buffer allotment request may be capable of indicating the amount of storage space required on the memory buffer to execute the system or network operation. The system may be capable of precluding the system or network operation from executing until there is sufficient space in the memory buffer to complete the operation without evicting operational data from the memory buffer. In some embodiments, the buffer release command may signal completion of the system or network operation and release of the utilized memory buffer space for other operations.

    Flexible per-flow multipath managed by sender-side network adapter
    66.
    发明公开
    Flexible per-flow multipath managed by sender-side network adapter 审中-公开

    公开(公告)号：US20240080266A1

    公开(公告)日：2024-03-07

    申请号：US17902920

    申请日：2022-09-05

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Yamin Friedman ,  Omer Shabtai ,  Rotem Levinson ,  Idan Burstein ,  Yuval Shpigelman ,  Charlie Mbariky

    IPC: H04L45/00 ,  H04L45/24

    CPC classification number: H04L45/38 ,  H04L45/24 ,  H04L45/566

    Abstract: A network adapter includes a port and one or more circuits. The port communicates packets over a network in which switches forward packets in accordance with tuples of the packets. The one or more circuits are to hold a user-programmable scheme specifying assignments of the packets of a given flow destined to a peer node to sub-flows having respective different tuples, assign first packets of the given flow to one or more of the sub-flows in accordance with the user-programmable scheme, by setting respective tuples of the first packets, transmit the first packets to the peer node via the port, monitor notifications received from the network, the notifications being indicative of respective states of the sub-flows, based on the notifications and on the user-programmable scheme determine an assignment of second packets of the given flow to the sub-flows, and transmit the second packets to the peer node via the port.

    Cryptographic data communication apparatus
    68.
    发明授权
    Cryptographic data communication apparatus 有权

    公开(公告)号：US11909856B2

    公开(公告)日：2024-02-20

    申请号：US18076423

    申请日：2022-12-07

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Miriam Menes ,  Noam Bloch ,  Adi Menachem ,  Idan Burstein ,  Ariel Shahar ,  Maxim Fudim

    IPC: H04L9/06 ,  H04L9/32 ,  H04L9/08

    CPC classification number: H04L9/0625 ,  H04L9/0861 ,  H04L9/3247

    Abstract: In one embodiment, an apparatus includes a network interface to receive a sequence of data packets from a remote device responsively to a data transfer request, the received sequence including received data blocks, and packet processing circuitry to read cryptographic parameters from a memory in which the parameters were registered by a processing unit, the cryptographic parameters including an initial cryptographic key and initial value, compute a first cryptographic key responsively to the initial cryptographic key and initial value, cryptographically process a first block responsively to the first cryptographic key, compute an updated value responsively to the initial value and a size of the first block, compute a second cryptographic key responsively to the initial cryptographic key and the updated value, cryptographically process a second block of the received data blocks responsively to the second cryptographic key, and write the cryptographically processed first and second block to the memory.

    METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODUCTS FOR DYNAMIC LOAD BALANCING
    69.
    发明公开
    METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODUCTS FOR DYNAMIC LOAD BALANCING 审中-公开

    公开(公告)号：US20240039849A1

    公开(公告)日：2024-02-01

    申请号：US17875999

    申请日：2022-07-28

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Michael Weiner ,  Avi Urman ,  Gary Mataev ,  Idan Burstein

    IPC: H04L47/125 ,  H04W28/08 ,  H04L47/32

    CPC classification number: H04L47/125 ,  H04W28/08 ,  H04L47/32

    Abstract: Methods, systems, and computer program products for selecting packing processing cores are provided. An example system includes a plurality of packet processing cores and a load balancing unit communicatively connected to the plurality of packet processing cores. The load balancing unit is configured to receive a workflow packet including packet description data indicative of at least a packet structure and a packet priority and receive, from the plurality of packet processing cores, state data indicative of at least a utilization state and an operating state of each of the respective packet processing cores. The load balancing unit determines a selected packet processing core from amongst the plurality of packet processing cores based on the state data of the packet processing core and the packet description data of the workflow packet and transmits the workflow packet to the selected packet processing core.

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