公开(公告)号：US20150187818A1

公开(公告)日：2015-07-02

申请号：US14580949

申请日：2014-12-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroyuki Miyake ,  Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Shunpei Yamazaki

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/7869

Abstract: A light-emitting device capable of suppressing variation in luminance among pixels is provided. A light-emitting device includes a pixel and first and second circuits. The first circuit has a function of generating a signal including a value of current extracted from the pixel. The second circuit has a function of correcting an image signal by the signal. The pixel includes at least a light-emitting element and first and second transistors. The first transistor has a function of controlling supply of the current to the light-emitting element by the image signal. The second transistor has a function of controlling extraction of the current from the pixel. A semiconductor film of each of the first and second transistors includes a first semiconductor region overlapping with a gate, a second semiconductor region in contact with a source or a drain, and a third semiconductor region between the first and second semiconductor regions.

Abstract translation: 提供能够抑制像素之间的亮度变化的发光装置。 发光装置包括像素和第一和第二电路。 第一电路具有生成包括从像素提取的电流值的信号的功能。 第二电路具有通过该信号校正图像信号的功能。 像素至少包括发光元件和第一和第二晶体管。 第一晶体管具有通过图像信号控制向发光元件的电流的供给的功能。 第二晶体管具有控制从像素提取电流的功能。 第一和第二晶体管中的每一个的半导体膜包括与栅极重叠的第一半导体区域，与源极或漏极接触的第二半导体区域以及第一和第二半导体区域之间的第三半导体区域。

公开(公告)号：US12278292B2

公开(公告)日：2025-04-15

申请号：US17949632

申请日：2022-09-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Kenichi Okazaki ,  Masami Jintyou ,  Takahiro Iguchi ,  Yukinori Shima

IPC: H01L29/786 ,  H01L27/15 ,  H01L29/66 ,  H10K59/131

Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer containing a metal oxide, a first insulating layer, a second insulating layer, a third insulating layer containing a nitride, and a first conductive layer. The first insulating layer includes a projecting first region that overlaps with the semiconductor layer and a second region that does not overlap with the semiconductor layer and is thinner than the first region. The second insulating layer is provided to cover a top surface of the second region, a side surface of the first region, and the semiconductor layer. The first conductive layer is provided over the second insulating layer and a bottom surface of the first conductive layer over the second region includes a portion positioned below a bottom surface of the semiconductor layer.

公开(公告)号：US12142688B2

公开(公告)日：2024-11-12

申请号：US18240775

申请日：2023-08-31

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Takashi Hamochi ,  Yasutaka Nakazawa

IPC: H01L29/786 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1339 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/10 ,  H01L29/45 ,  H10K59/121

Abstract: A semiconductor device comprising an oxide semiconductor film, a gate electrode, a first insulating film, a source electrode, a drain electrode, and a second insulating film is provided. Each of a top surface of the gate electrode, a top surface of the source electrode, and a top surface of the drain electrode comprises a region in contact with the second insulating film. A top surface of the first insulating film comprises a region in contact with the gate electrode and a region in contact with the second insulating film and overlapping with the oxide semiconductor film in a cross-sectional view of the oxide semiconductor film. The oxide semiconductor film comprises a region in contact with the first insulating film and a region in contact with the second insulating film and adjacent to the region in contact with the first insulating film in the cross-sectional view.

公开(公告)号：US12057459B2

公开(公告)日：2024-08-06

申请号：US17830546

申请日：2022-06-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Daisuke Kurosaki ,  Masataka Nakada ,  Shunpei Yamazaki

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1251 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/124 ,  H01L29/78603 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.

公开(公告)号：US11705525B2

公开(公告)日：2023-07-18

申请号：US17367677

申请日：2021-07-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Masami Jintyou ,  Yasutaka Nakazawa ,  Toshimitsu Obonai

IPC: H01L27/12 ,  H01L29/66 ,  G02F1/00 ,  H01L29/786 ,  G02F1/1368

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  H01L27/1225 ,  H01L29/66969

Abstract: A semiconductor device with favorable electrical characteristics, a semiconductor device with stable electrical characteristics, or a highly reliable semiconductor device or display device is provided. A first insulating layer and a first conductive layer are stacked over a first region of a first metal oxide layer. A first layer is formed in contact with a second metal oxide layer and a second region of the first metal oxide layer that is not overlapped by the first insulating layer. Heat treatment is performed to lower the resistance of the second region and the second metal oxide layer. A second insulating layer is formed. A second conductive layer electrically connected to the second region is formed over the second insulating layer. Here, the first layer is formed to contain at least one of aluminum, titanium, tantalum, and tungsten.

公开(公告)号：US11552111B2

公开(公告)日：2023-01-10

申请号：US17043232

申请日：2019-04-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Kenichi Okazaki ,  Masami Jintyou ,  Yukinori Shima

IPC: H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L21/426

Abstract: A semiconductor device having favorable and stable electrical characteristics is provided. The semiconductor device includes a first and a second transistor over an insulating surface. The first and the second transistors each include a first insulating layer, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a first conductive layer overlapping with the semiconductor layer with the second insulating layer interposed therebetween. The first insulating layer includes a convex first region that overlaps with the semiconductor layer and a second region that does not and is thinner than the first region. The first conductive layer includes a part over the second region where a lower surface of the first conductive layer is positioned below a lower surface of the semiconductor layer. The second transistor further includes a third conductive layer overlapping with the semiconductor layer with the first insulating layer interposed therebetween.

公开(公告)号：US11424334B2

公开(公告)日：2022-08-23

申请号：US16758091

申请日：2018-10-23

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Masami Jintyou ,  Takahiro Iguchi ,  Yukinori Shima ,  Kenichi Okazaki

IPC: H01L27/00 ,  H01L29/00 ,  G02F1/1368 ,  H01L29/423 ,  H01L27/12 ,  H01L29/51

Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided.
The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer. The semiconductor layer contains a metal oxide, the second insulating layer and the third insulating layer contain an oxide, the first insulating layer contains a metal oxide or a nitride, and the fourth insulating layer contains a metal nitride.

公开(公告)号：US11237444B2

公开(公告)日：2022-02-01

申请号：US16635290

申请日：2018-08-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami Jintyou ,  Daisuke Kurosaki ,  Masakatsu Ohno ,  Junichi Koezuka

IPC: G02F1/136 ,  G02F1/1368 ,  H01L27/12 ,  H01L33/62 ,  H01L29/786 ,  H01L27/32

Abstract: A highly reliable semiconductor device is provided. A second insulating layer is positioned over a first insulating layer. A semiconductor layer is positioned between the first insulating layer and the second insulating layer. A third insulating layer is positioned over the second insulating layer. A fourth insulating layer is positioned over the third insulating layer. A first conductive layer includes a region overlapping with the semiconductor layer, and is positioned between the third insulating layer and the fourth insulating layer. The third insulating layer includes a region in contact with a bottom surface of the first conductive layer and a region in contact with the fourth insulating layer. The fourth insulating layer is in contact with atop surface and a side surface of the first conductive layer. A fifth insulating layer is in contact with a top surface and a side surface of the semiconductor layer. The fifth insulating layer includes a first opening and a second opening in a region overlapping with the semiconductor layer and not overlapping with the first conductive layer. A second conductive layer and a third conductive layer are electrically connected to the semiconductor layer in the first opening and the second opening, respectively. The third to fifth insulating layers include metal, and oxygen or nitrogen. A sixth insulating layer includes a region in contact with a top surface and a side surface of the fifth insulating layer and a region in contact with the first insulating layer.

公开(公告)号：US20210288183A1

公开(公告)日：2021-09-16

申请号：US17330463

申请日：2021-05-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiaki Oikawa ,  Nobuharu Ohsawa ,  Masami Jintyou ,  Yasutaka Nakazawa

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/28 ,  H01L29/49 ,  H01L29/04 ,  H01L29/45

Abstract: The transistor includes a first gate electrode, a first insulating film over the first gate electrode, an oxide semiconductor film over the first insulating film, a source electrode over the oxide semiconductor film, a drain electrode over the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, and a second gate electrode over the second insulating film. The first insulating film includes a first opening. A connection electrode electrically connected to the first gate electrode through the first opening is formed over the first insulating film. The second insulating film includes a second opening that reaches the connection electrode. The second gate electrode includes an oxide conductive film and a metal film over the oxide conductive film. The connection electrode and the second gate electrode are electrically connected to each other through the metal film.

公开(公告)号：US11063125B2

公开(公告)日：2021-07-13

申请号：US16739647

申请日：2020-01-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasuharu Hosaka ,  Toshimitsu Obonai ,  Yukinori Shima ,  Masami Jintyou ,  Daisuke Kurosaki ,  Takashi Hamochi ,  Junichi Koezuka ,  Kenichi Okazaki ,  Shunpei Yamazaki

IPC: H01L29/24 ,  H01L29/786 ,  C04B35/622 ,  C04B35/453 ,  H01L27/12 ,  H01L29/778 ,  C23C14/58 ,  C23C14/08 ,  C04B35/01 ,  C03C17/245

Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.