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    Logic circuit and semiconductor device
    63.
    发明授权
    Logic circuit and semiconductor device 有权
    逻辑电路和半导体器件

    公开(公告)号：US08400187B2

    公开(公告)日：2013-03-19

    申请号：US12901057

    申请日：2010-10-08

    申请人： Shunpei Yamazaki ,  Jun Koyama ,  Masashi Tsubuku ,  Kosei Noda

    发明人： Shunpei Yamazaki ,  Jun Koyama ,  Masashi Tsubuku ,  Kosei Noda

    IPC分类号： H01L25/00 ,  H03K19/094 ,  H03B1/00

    CPC分类号： H01L29/7869 ,  H01L22/34 ,  H01L27/0207 ,  H01L27/1225 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.

    摘要翻译： 逻辑电路包括具有使用氧化物半导体形成的沟道形成区域的薄膜晶体管，以及通过关闭薄膜晶体管而使端子中的一个成为浮置状态的电容器。 氧化物半导体的氢浓度为5×1019（原子/ cm3）以下，因此在不产生电场的状态下基本上用作绝缘体。 因此，可以减小薄膜晶体管的截止电流，从而通过薄膜晶体管抑制存储在电容器中的电荷的泄漏。 因此，可以防止逻辑电路的故障。 此外，可以通过减小薄膜晶体管的截止电流来降低在逻辑电路中流动的过量的电流，导致逻辑电路的低功耗。

    Semiconductor device and manufacturing method thereof
    64.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US08389417B2

    公开(公告)日：2013-03-05

    申请号：US12945516

    申请日：2010-11-12

    申请人： Shunpei Yamazaki ,  Jun Koyama

    发明人： Shunpei Yamazaki ,  Jun Koyama

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： H01L27/1207 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/1225 ,  H01L29/24

    摘要： An object is to provide a semiconductor device with a novel structure. A semiconductor device includes a first transistor, which includes a channel formation region provided in a substrate including a semiconductor material, impurity regions, a first gate insulating layer, a first gate electrode, and a first source electrode and a first drain electrode, and a second transistor, which includes an oxide semiconductor layer over the substrate including the semiconductor material, a second source electrode and a second drain electrode, a second gate insulating layer, and a second gate electrode. The second source electrode and the second drain electrode include an oxide region formed by oxidizing a side surface thereof, and at least one of the first gate electrode, the first source electrode, and the first drain electrode is electrically connected to at least one of the second gate electrode, the second source electrode, and the second drain electrode.

    摘要翻译： 目的是提供具有新颖结构的半导体器件。 半导体器件包括第一晶体管，其包括设置在包括半导体材料的衬底中的沟道形成区域，杂质区域，第一栅极绝缘层，第一栅极电极和第一源极电极以及第一漏极电极， 第二晶体管，其包括在包括半导体材料的衬底上的氧化物半导体层，第二源电极和第二漏电极，第二栅极绝缘层和第二栅电极。 第二源电极和第二漏极包括通过氧化其侧表面而形成的氧化物区域，并且第一栅电极，第一源电极和第一漏极电极中的至少一个电连接到 第二栅电极，第二源电极和第二漏电极。

    Display Device
    67.
    发明申请
    Display Device 有权
    显示设备

    公开(公告)号：US20120326951A1

    公开(公告)日：2012-12-27

    申请号：US13529129

    申请日：2012-06-21

    申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

    发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

    IPC分类号： G09G3/30

    CPC分类号： G02F1/1345

    摘要： To provide a display device with little signal delay and a display device that can operate with low power consumption, parasitic capacitance between a common wiring that applies a common potential to a plurality of pixels and signal lines that input signals for driving the pixels is avoided. Specifically, the common wiring is routed outwardly with respect to an external input terminal to which a signal is input from the, outside, to avoid intersections of the signal lines and the common wiring. Thus, parasitic capacitance between the common wiring and the signal lines is avoided, so that the display device can operate at high speed with low power consumption.

    摘要翻译： 为了提供几乎没有信号延迟的显示装置和能够以低功耗工作的显示装置，避免了对多个像素施加共同电位的公共布线与输入用于驱动像素的信号的信号线之间的寄生电容。 具体地，公共布线相对于从外部输入信号的外部输入端子向外布线，以避免信号线和公共布线的交叉。 因此，避免了公共布线和信号线之间的寄生电容，使得显示装置能够以低功耗高速运行。

    Active matrix display device having wiring layers which are connected over multiple contact parts
    69.
    再颁专利
    Active matrix display device having wiring layers which are connected over multiple contact parts 有权
    有源矩阵显示装置具有通过多个接触部分连接的布线层

    公开(公告)号：USRE43782E1

    公开(公告)日：2012-11-06

    申请号：US10960897

    申请日：2004-10-08

    申请人： Jun Koyama ,  Hisashi Ohtani ,  Yasushi Ogata ,  Shunpei Yamazaki

    发明人： Jun Koyama ,  Hisashi Ohtani ,  Yasushi Ogata ,  Shunpei Yamazaki

    IPC分类号： H01L29/04 ,  H01L29/15 ,  H04B10/00

    CPC分类号： G02F1/13454 ,  G02F1/136227 ,  H01L27/124

    摘要： A wiring line to which a high-frequency signal is applied is electrically connected in parallel to an auxiliary wiring line via a plurality of contact holes. The contact holes are formed through an interlayer insulating film and arranged in vertical direction to the wiring line. Since the auxiliary wiring line is formed in the same layer as an electrode that constitutes a TFT, the electric resistance of the wiring line can be reduced effectively and waveform rounding of an applied high-frequency signal can be reduced without increasing the number of manufacturing steps.

    摘要翻译： 施加高频信号的布线经由多个接触孔与辅助布线并联电连接。 接触孔通过层间绝缘膜形成并且布置在与布线的垂直方向上。 由于辅助布线形成在与构成TFT的电极相同的层中，因此可以有效地降低布线的电阻，并且可以减少施加的高频信号的波形舍入，而不增加制造步骤的数量 。

    Semiconductor device and manufacturing method thereof
    70.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US08289164B2

    公开(公告)日：2012-10-16

    申请号：US12846104

    申请日：2010-07-29

    申请人： Shunpei Yamazaki ,  Jun Koyama ,  Mai Akiba

    发明人： Shunpei Yamazaki ,  Jun Koyama ,  Mai Akiba

    IPC分类号： G08B13/14

    CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L29/78603 ,  Y10T29/49117

    摘要： A semiconductor device typified by a wireless tag, which has improved mechanical strength, can be formed by a more simple process at a low cost and prevent radio waves from being shielded, and a manufacturing method of the semiconductor device. According to the invention, a wireless tag includes a thin film integrated circuit formed of an isolated TFT having a thin film semiconductor film. The wireless tag may be attached directly to an object, or attached to a flexible support such as plastic and paper before being attached to an object. The wireless tag of the invention may include an antenna as well as the thin film integrated circuit. The antenna allows to communicate signals between a reader/writer and the thin film integrated circuit, and to supply a power source voltage from the reader/writer to the thin film integrated circuit.

    摘要翻译： 可以通过更简单的方法以低成本的方法形成具有改善的机械强度的无线标签代表的半导体器件，并且防止无线电波被屏蔽，以及半导体器件的制造方法。 根据本发明，无线标签包括由具有薄膜半导体膜的隔离TFT形成的薄膜集成电路。 无线标签可以在被附接到对象之前直接附着到物体上，或者附着到诸如塑料和纸张之类的柔性支撑件上。 本发明的无线标签可以包括天线以及薄膜集成电路。 该天线允许在读/写器和薄膜集成电路之间通信信号，并将读取器/写入器的电源电压提供给薄膜集成电路。