公开(公告)号：US20120302011A1

公开(公告)日：2012-11-29

申请号：US13561240

申请日：2012-07-30

申请人： Christos D. Dimitrakopoulos ,  Kam L. Lee ,  Robert L. Wisnieff

发明人： Christos D. Dimitrakopoulos ,  Kam L. Lee ,  Robert L. Wisnieff

IPC分类号： H01L21/02 ,  H01L21/56

CPC分类号： H01L21/76825 ,  B29C71/04 ,  B29C2035/0877 ,  H01J37/026 ,  H01J37/317 ,  H01J2237/0044 ,  H01J2237/024 ,  H01J2237/047 ,  H01J2237/3156 ,  H01L21/3105 ,  H01L21/76835

摘要： An ultra low-k dielectric material layer is formed on a semiconductor substrate. In one embodiment, a grid of wires is placed at a distance above a top surface of the ultra low-k dielectric material layer and is electrically biased such that the total electron emission coefficient becomes 1.0 at the energy of electrons employed in electron beam curing of the ultra low-k dielectric material layer. In another embodiment, a polymeric conductive layer is formed directly on the ultra low-k dielectric material layer and is electrically biased so that the total electron emission coefficient becomes 1.0 at the energy of electrons employed in electron beam curing of the ultra low-k dielectric material layer. By maintaining the total electron emission coefficient at 1.0, charging of the substrate is avoided, thus protecting any device on the substrate from any adverse changes in electrical characteristics.

摘要翻译： 在半导体基板上形成超低k电介质材料层。 在一个实施例中，电线格栅放置在超低k电介质材料层的顶表面上方的距离处，并被电偏置，使得在电子束固化中使用的电子的能量下，总电子发射系数为1.0 超低k电介质材料层。 在另一个实施例中，聚合物导电层直接形成在超低k电介质材料层上并被电偏置，使得在超低k电介质的电子束固化中使用的电子能量下，总电子发射系数变为1.0 材料层。 通过将总电子发射系数保持在1.0，避免了衬底的充电，从而保护衬底上的任何器件免受电特性的任何不利变化。

公开(公告)号：US20120211723A1

公开(公告)日：2012-08-23

申请号：US13030834

申请日：2011-02-18

申请人： Christos D. Dimitrakopoulos ,  Alred Grill ,  Timothy J. McArdle ,  John A. Ott ,  Robert L. Wisnierff

发明人： Christos D. Dimitrakopoulos ,  Alred Grill ,  Timothy J. McArdle ,  John A. Ott ,  Robert L. Wisnierff

IPC分类号： H01L29/06 ,  H01L21/20

CPC分类号： H01L21/02527 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02612 ,  H01L21/02656 ,  H01L29/045 ,  H01L29/1606 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/66045 ,  H01L29/66431 ,  H01L29/7781

摘要： A semiconductor structure having a high Hall mobility is provided that includes a SiC substrate having a miscut angle of 0.1° or less and a graphene layer located on an upper surface of the SiC substrate. Also, provided are semiconductor devices that include a SiC substrate having a miscut angle of 0.1° or less and at least one graphene-containing semiconductor device located atop the SiC substrate. The at least one graphene-containing semiconductor device includes a graphene layer overlying and in contact with an upper surface of the SiC substrate.

摘要翻译： 提供具有高霍尔迁移率的半导体结构，其包括具有0.1°或更小的误差角的SiC衬底和位于SiC衬底的上表面上的石墨烯层。 此外，提供了包括具有0.1°或更小的误差角的SiC衬底和位于SiC衬底顶部的至少一个含石墨烯的半导体器件的半导体器件。 所述至少一个含石墨烯的半导体器件包括覆盖并与SiC衬底的上表面接触的石墨烯层。

公开(公告)号：US07977032B2

公开(公告)日：2011-07-12

申请号：US10906268

申请日：2005-02-11

申请人： Christos D. Dimitrakopoulos ,  Daniel C. Edelstein ,  Vincent J. McGahay ,  Satyanarayana V. Nitta ,  Kevin S. Petrarca ,  Shom Ponoth ,  Shahab Siddiqui

发明人： Christos D. Dimitrakopoulos ,  Daniel C. Edelstein ,  Vincent J. McGahay ,  Satyanarayana V. Nitta ,  Kevin S. Petrarca ,  Shom Ponoth ,  Shahab Siddiqui

IPC分类号： G03F7/20

CPC分类号： G03F7/2022

摘要： A method of selectively altering material properties of a substrate in one region while making a different alteration of material properties in an adjoining region is provided. The method includes selectively masking a first portion of the substrate during a first exposure and selectively masking a second portion of the substrate during a second exposure. Additionally, a mask may be formed having more than one thickness where each thickness will selectively reduce the amount of energy from a blanket exposure of the substrate thereby allowing a substrate to receive different levels of energy dosage in a single blanket exposure.

摘要翻译： 提供了一种在邻接区域中对材料性质进行不同的改变的同时选择性地改变一个区域中的衬底的材料特性的方法。 该方法包括在第一曝光期间选择性地掩蔽衬底的第一部分，并且在第二次曝光期间选择性地掩蔽衬底的第二部分。 另外，可以形成具有多于一个厚度的掩模，其中每个厚度将选择性地减少来自衬底的覆盖曝光的能量的量，从而允许衬底在单次覆盖曝光中接收不同水平的能量。

公开(公告)号：US07687913B2

公开(公告)日：2010-03-30

申请号：US11676447

申请日：2007-02-19

申请人： Nirupama Chakrapani ,  Matthew E. Colburn ,  Christos D. Dimitrakopoulos ,  Dirk Pfeiffer ,  Sampath Purushothaman ,  Satyanarayana V. Nitta

发明人： Nirupama Chakrapani ,  Matthew E. Colburn ,  Christos D. Dimitrakopoulos ,  Dirk Pfeiffer ,  Sampath Purushothaman ,  Satyanarayana V. Nitta

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76826 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/31058 ,  H01L21/76807 ,  H01L21/76814 ,  H01L2924/0002 ,  H01L2924/00

摘要： Often used to reduce the RC delay in integrated circuits are dielectric films of porous organosilicates which have a silica like backbone with alkyl or aryl groups (to add hydrophobicity to the materials and create free volume) attached directly to the Si atoms in the network. Si—R bonds rarely survive an exposure to plasmas or chemical treatments commonly used in processing; this is especially the case in materials with an open cell pore structure. When Si—R bonds are broken, the materials lose hydrophobicity, due to formation of hydrophilic silanols and low dielectric constant is compromised. A method by which the hydrophobicity of the materials is recovered using a novel class of silylation agents which may have the general formula (R2N)XSiR′Y where X and Y are integers from 1 to 3 and 3 to 1 respectively, and where R and R′ are selected from the group of hydrogen, alkyl, aryl, allyl and a vinyl moiety. Mechanical strength of porous organosilicates is also improved as a result of the silylation treatment.

摘要翻译： 通常用于减少集成电路中的RC延迟的是多孔有机硅酸盐的介电膜，其具有二氧化硅像主链与烷基或芳基（以增加材料的疏水性并产生自由体积）直接附着在网络中的Si原子。 Si-R键在暴露于等离子体或通常用于加工的化学处理中很少存活; 这在具有开孔细孔结构的材料中尤其如此。 当Si-R键断裂时，材料由于形成亲水硅烷醇而损失疏水性，并且低介电常数受损。 使用新型甲硅烷基化剂回收材料的疏水性的方法，其可以具有通式（R2N）XSiR'Y，其中X和Y分别为1至3和3至1的整数，并且其中R和 R'选自氢，烷基，芳基，烯丙基和乙烯基部分。 由于甲硅烷基化处理，多孔有机硅酸盐的机械强度也得到改善。

公开(公告)号：US07531444B2

公开(公告)日：2009-05-12

申请号：US10906267

申请日：2005-02-11

申请人： Christos D. Dimitrakopoulos ,  Daniel C. Edelstein ,  Vincent J. McGahay ,  Satyanarayana V. Nittta ,  Kevin S. Petrarca ,  Shom Ponoth ,  Shahab Siddiqui

发明人： Christos D. Dimitrakopoulos ,  Daniel C. Edelstein ,  Vincent J. McGahay ,  Satyanarayana V. Nittta ,  Kevin S. Petrarca ,  Shom Ponoth ,  Shahab Siddiqui

IPC分类号： H01L21/4763

CPC分类号： H01L21/76832 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76834

摘要： A method of forming airgaps is provided where a blocking mask is applied to a substrate to shield a portion of the substrate from a beam of energy. After irradiation, the blocking mask is removed and a capping material is applied to the substrate. Alternatively, the capping material may be applied before irradiation. The capping material is perforated to allow an etchant to pass therethrough to the substrate below the capping material. The exposed portions of the substrate are removed from underneath the capping material by etching. The capping material is then sealed leaving sealed airgaps within the substrate.

摘要翻译： 提供了一种形成气隙的方法，其中将阻挡掩模施加到基板以将基板的一部分与能量束屏蔽。 照射后，去除阻挡掩模，并将封盖材料施加到基底上。 或者，可以在照射之前施加封盖材料。 封盖材料被穿孔以允许蚀刻剂从其穿过覆盖材料下方的基底。 通过蚀刻从封盖材料的下方去除衬底的暴露部分。 然后密封封盖材料，留下基板内的密封气囊。

公开(公告)号：US20090101892A1

公开(公告)日：2009-04-23

申请号：US11977009

申请日：2007-10-23

申请人： Christos D. Dimitrakopoulos ,  Laura Louise Kosbar ,  Debra Jane Mascaro

发明人： Christos D. Dimitrakopoulos ,  Laura Louise Kosbar ,  Debra Jane Mascaro

IPC分类号： H01L51/30 ,  H01L51/40

CPC分类号： H01L51/0541 ,  B82Y15/00 ,  B82Y30/00 ,  H01L51/0012 ,  H01L51/0052 ,  H01L51/0516 ,  H01L51/105

摘要： A process for producing high performance organic thin film transistors in which the molecules in the organic thin film are highly ordered and oriented to maximize the mobility of current charge carriers. The uniform monolayer surface over various substrate materials so formed, result in a more reproducible and readily manufacturable process for higher performance organic field effect transistors that can be used to create large area circuits using a range of materials.

摘要翻译： 一种生产高性能有机薄膜晶体管的方法，其中有机薄膜中的分子被高度排序并定向成使电流载流子的迁移率最大化。 在如此形成的各种衬底材料上的均匀单层表面导致可用于使用一系列材料制造大面积电路的更高性能有机场效应晶体管的更可再现和易制造的工艺。

公开(公告)号：US07179758B2

公开(公告)日：2007-02-20

申请号：US10853771

申请日：2004-05-25

申请人： Nirupama Chakrapani ,  Matthew E. Colburn ,  Christos D. Dimitrakopoulos ,  Dirk Pfeiffer ,  Sampath Purushothaman ,  Satyanarayana V. Nitta

发明人： Nirupama Chakrapani ,  Matthew E. Colburn ,  Christos D. Dimitrakopoulos ,  Dirk Pfeiffer ,  Sampath Purushothaman ,  Satyanarayana V. Nitta

IPC分类号： H01L21/311 ,  H01L21/469 ,  H01L21/31 ,  H01L21/461 ,  H01L21/302

CPC分类号： H01L21/76826 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/31058 ,  H01L21/76807 ,  H01L21/76814 ,  H01L2924/0002 ,  H01L2924/00

摘要： Often used to reduce the RC delay in integrated circuits are dielectric films of porous organosilicates which have a silica like backbone with alkyl or aryl groups (to add hydrophobicity to the materials and create free volume) attached directly to the Si atoms in the network. Si—R bonds rarely survive an exposure to plasmas or chemical treatments commonly used in processing; this is especially the case in materials with an open cell pore structure. When Si—R bonds are broken, the materials lose hydrophobicity, due to formation of hydrophilic silanols and low dielectric constant is compromised. A method by which the hydrophobicity of the materials is recovered using a novel class of silylation agents which may have the general formula (R2N)XSiR′Y where X and Y are integers from 1 to 3 and 3 to 1 respectively, and where R and R′ are selected from the group of hydrogen, alkyl, aryl, allyl and a vinyl moiety. Mechanical strength of porous organosilicates is also improved as a result of the silylation treatment.

摘要翻译： 通常用于减少集成电路中的RC延迟的是多孔有机硅酸盐的介电膜，其具有二氧化硅像主链与烷基或芳基（以增加材料的疏水性并产生自由体积）直接连接到网络中的Si原子。 Si-R键在暴露于等离子体或通常用于加工的化学处理中很少存活; 这在具有开孔细孔结构的材料中尤其如此。 当Si-R键断裂时，材料由于形成亲水硅烷醇而损失疏水性，并且低介电常数受损。 使用新型甲硅烷基化剂回收材料的疏水性的方法，其可以具有通式（R 2 N 2）X SiR'Y 其中X和Y分别为1至3和3至1的整数，并且其中R和R'选自氢，烷基，芳基，烯丙基和乙烯基部分。 由于甲硅烷基化处理，多孔有机硅酸盐的机械强度也得到改善。