公开(公告)号：US06984871B2

公开(公告)日：2006-01-10

申请号：US10441096

申请日：2003-05-20

申请人： Tomonori Tanoue ,  Kazuhiro Mochizuki ,  Hiroji Yamada

发明人： Tomonori Tanoue ,  Kazuhiro Mochizuki ,  Hiroji Yamada

IPC分类号： H01L27/082

CPC分类号： H01L29/66318 ,  H01L24/32 ,  H01L29/0657 ,  H01L29/0692 ,  H01L29/41708 ,  H01L29/7371 ,  H01L2924/1305 ,  H01L2924/15787 ,  H01L2924/00

摘要： A semiconductor device with high structural reliability and low parasitic capacitance is provided. In one example, the semiconductor device has a surface. The semiconductor device comprises a semiconductor region, wherein an emitter region, a base region, and a collector region are laminated from a side near a substrate of the semiconductor region; an insulating protection layer disposed on the surface; and a wiring layer disposed on the surface, the insulating protection layer forming a via hole from the side of the substrate of the semiconductor region, the via hole being formed to allow the wiring layer to make a contact to an electrode of the emitter region from a side of the substrate where the emitter region, the base region, and the collector region are laminated and where the semiconductor region is isolated.

摘要翻译： 提供具有高结构可靠性和低寄生电容的半导体器件。 在一个示例中，半导体器件具有表面。 半导体器件包括半导体区域，其中从半导体区域的衬底附近的一侧层叠发射极区域，基极区域和集电极区域; 设置在所述表面上的绝缘保护层; 以及设置在所述表面上的布线层，所述绝缘保护层从所述半导体区域的所述基板的侧面形成通孔，所述通孔形成为允许所述布线层与所述发射极区域的电极接触 衬底的一侧，其中发射极区域，基极区域和集电极区域被层叠并且半导体区域被隔离。

公开(公告)号：US20050046474A1

公开(公告)日：2005-03-03

申请号：US10922146

申请日：2004-08-20

申请人： Hidetoshi Matsumoto ,  Tomonori Tanoue ,  Masami Ohnishi

发明人： Hidetoshi Matsumoto ,  Tomonori Tanoue ,  Masami Ohnishi

IPC分类号： H03F3/20 ,  H03F1/02 ,  H03F1/32 ,  H03F3/19 ,  H03F3/38 ,  H04B1/04

CPC分类号： H03F1/0227 ,  H03F2200/432

摘要： An amplifier using a wide band, high efficiency, and low distortion amplifier free from clipping distortion, and a high efficiency and low distortion radio frequency power amplifier, using that amplifier, which can be applied to wide band wireless communication systems are provided. The amplifier has a DC-DC converter 2, augmented with a low pass filter 4, for amplifying the low frequency components of an input signal from a terminal 5, and a class B amplifier, augmented with a high pass filter, for amplifying the input signal and supplying its high frequency components after amplification. The DC-DC converter and the class B amplifier are connected in parallel, and the power supply voltage of the class B amplifier is controlled with the low frequency components of the input signal.

摘要翻译： 提供了一种使用宽带，高效率和低失真放大器的放大器，无限幅失真，以及高效率和低失真射频功率放大器，使用该放大器，可应用于宽带无线通信系统。 放大器具有DC-DC转换器2，增强了低通滤波器4，用于放大来自端子5的输入信号的低频分量，以及增加了高通滤波器的B类放大器，用于放大输入 信号并在放大后提供其高频分量。 DC-DC转换器和B类放大器并联，B类放大器的电源电压由输入信号的低频分量控制。

公开(公告)号：US06816017B2

公开(公告)日：2004-11-09

申请号：US09931877

申请日：2001-08-20

申请人： Kiichi Yamashita ,  Tomonori Tanoue ,  Isao Ohbu ,  Kenji Sekine

发明人： Kiichi Yamashita ,  Tomonori Tanoue ,  Isao Ohbu ,  Kenji Sekine

IPC分类号： H03F152

CPC分类号： H03F3/19 ,  H03F1/0261 ,  H03F1/302 ,  H03F3/347 ,  H03F2200/444

摘要： A power amplifier module is provided with a function of protecting an amplifying device against destruction caused by a standing wave by reflection from an antenna end in load variation. Increase in base current from idling current of a final stage amplifying portion GaAs-HBT in load variation is detected and canceled and collector current is restrained to thereby prevent an increase in output and prevent destruction of GaAs-RET. By also using a function of successively lowering idling current when power source voltage is elevated and a clipping function of diodes connected in parallel with output stage GaAs-RET, voltage as well as current more than necessary are avoided from being applied on the output stage GaAs-RET.

摘要翻译： 功率放大器模块具有保护放大装置的功能，以防止由负载变化引起的天线反射引起的驻波的破坏。 检测并抵消了负载变化中的最终级放大部分GaAs-HBT的空载电流的基极电流的增加，并抑制集电极电流，从而防止输出增加并防止GaAs-RET的破坏。 通过使用在电源电压升高时连续降低空载电流并且与输出级GaAs-RET并联连接的二极管的限幅功能也被避免施加在输出级GaAs上的功能。 -RET。

公开(公告)号：US06710649B2

公开(公告)日：2004-03-23

申请号：US10239157

申请日：2002-11-21

申请人： Hidetoshi Matsumoto ,  Tomonori Tanoue ,  Satoshi Tanaka ,  Kiichi Yamashita

发明人： Hidetoshi Matsumoto ,  Tomonori Tanoue ,  Satoshi Tanaka ,  Kiichi Yamashita

IPC分类号： H03F368

CPC分类号： H03F1/56 ,  H03F1/0222 ,  H03F1/0261 ,  H03F1/0266 ,  H03F1/301 ,  H03F1/302 ,  H03F1/306 ,  H03F3/19 ,  H03F3/1935 ,  H03F2200/318 ,  H03F2200/453

摘要： A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.

摘要翻译： 功率放大器模块包括多个放大器级，每个放大器级包括用于模拟放大器的操作的参考放大器。 根据输入功率电平流向形成每个参考放大器的双极晶体管的基极的电流被检测，放大并作为相应放大器的晶体管的基极电流提供。

公开(公告)号：US5381027A

公开(公告)日：1995-01-10

申请号：US134622

申请日：1993-10-12

申请人： Toshiyuki Usagawa ,  Kenji Hiruma ,  Masahiko Kawata ,  Shigeo Goto ,  Katsuhiko Mitani ,  Masao Yamane ,  Susumu Takahashi ,  Tomonori Tanoue ,  Yoshinori Imamura

发明人： Toshiyuki Usagawa ,  Kenji Hiruma ,  Masahiko Kawata ,  Shigeo Goto ,  Katsuhiko Mitani ,  Masao Yamane ,  Susumu Takahashi ,  Tomonori Tanoue ,  Yoshinori Imamura

IPC分类号： H01L21/18 ,  H01L21/285 ,  H01L21/331 ,  H01L21/335 ,  H01L27/06 ,  H01L29/737 ,  H01L29/778 ,  H01L29/804 ,  H01L29/784

CPC分类号： H01L29/66318 ,  H01L21/182 ,  H01L21/28587 ,  H01L27/0605 ,  H01L29/66462 ,  H01L29/7373 ,  H01L29/7787

摘要： This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by intoduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance. The invention discloses also the structure of the ohmic contact layer which has a trench on the surface thereof and is particularly effective for reducing the source-gate parasitic resistance.

摘要翻译： 本发明公开了一种异质结型场效应晶体管，例如2DEG-FET和异质结型双极晶体管，例如2DEG-HBT。 前者通过应用于其源极和漏极区域的形成来制造通过诸如通过离子注入引起杂质的异质结的紊乱或通过形成由 选自绝缘体，金属和半导体的至少一种材料，其具有不同于待混杂的异质结半导体区域上的半导体衬底的材料的线性热膨胀系数。 后者通过将上述技术中的任一种应用于基极欧姆接触区域来制造。 这些半导体器件可以降低源极栅极电阻和寄生基极电阻。 本发明还公开了欧姆接触层的结构，其在其表面上具有沟槽，并且对于减小源极寄生电阻特别有效。

公开(公告)号：US5019524A

公开(公告)日：1991-05-28

申请号：US401506

申请日：1989-08-30

申请人： Katsuhiko Mitani ,  Tomonori Tanoue ,  Chushiro Kusano ,  Masayoshi Kobayashi ,  Susumu Takahashi

发明人： Katsuhiko Mitani ,  Tomonori Tanoue ,  Chushiro Kusano ,  Masayoshi Kobayashi ,  Susumu Takahashi

IPC分类号： H01L29/205 ,  H01L21/331 ,  H01L29/10 ,  H01L29/73 ,  H01L29/737

CPC分类号： H01L29/66318 ,  H01L29/1004 ,  H01L29/7371 ,  Y10S148/01 ,  Y10S148/072 ,  Y10S148/084

摘要： Disclosed is a semiconductor device including a heterojunction bipolar transistor in which the front surface of a base layer and the surface of an emitter-base junction are covered with a high-resistivity layer of compound semiconductor containing at least one constituent element common to an emitter layer and the base layer.

公开(公告)号：US5017973A

公开(公告)日：1991-05-21

申请号：US287738

申请日：1988-12-21

申请人： Hiroshi Mizuta ,  Tomonori Tanoue ,  Chushirou Kusano ,  Susumu Takahashi

发明人： Hiroshi Mizuta ,  Tomonori Tanoue ,  Chushirou Kusano ,  Susumu Takahashi

IPC分类号： H01L29/15 ,  H01L29/201 ,  H01L29/205 ,  H01L29/68 ,  H01L29/88

CPC分类号： B82Y10/00 ,  H01L29/155 ,  H01L29/882

摘要： A resonant tunneling device includes a superlattice layer which includes an interlaminated structure of three semiconductor layers each having a narrow energy bandgap and serving as a quantum well layer and four semiconductor layers each having a wide energy bandgap and serving as a barrier layer and in which three quantum levels are formed in the quantum well layers. A resonant tunneling phenomenon produced between the quantum levels provides peak current values which are substantially equal to each other, peak voltages which can be set independently from each other, and peak-to-valley (P/V) ratios which are high, thereby realizing a resonant tunneling device which has an excellent performance as a three state logic element for a logic circuit. By increasing the number of quantum well layers and the number of barrier layers, a logic element of four or more states can be realized for a logic circuit.

公开(公告)号：US4979009A

公开(公告)日：1990-12-18

申请号：US415708

申请日：1989-09-29

申请人： Chushiro Kusano ,  Tomonori Tanoue ,  Katsuhiko Mitani

发明人： Chushiro Kusano ,  Tomonori Tanoue ,  Katsuhiko Mitani

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L29/205 ,  H01L29/737

CPC分类号： H01L29/7371

摘要： 2A heterojunction bipolar transistor is disclosed in which a region of a base layer which extends in the vicinity of the interface between the base layer and an emitter layer is doped with an impurity at a higher concentration than that in the inside of the base layer to thereby form a built-in field by which carriers injected from the emitter are caused to drift to the inside of the base layer. In the transistor having this structure, the current gain does not depend on the emitter area, and it is possible to obtain a large current gain with a small emitter area.

摘要翻译： 2A公开了其中在基极层和发射极层之间的界面附近延伸的基极层的区域以比基底层内侧的浓度更高的浓度掺杂杂质的异质结双极晶体管，由此 形成内置的场，通过该场，使从发射器注入的载流子漂移到基层的内部。 在具有这种结构的晶体管中，电流增益不取决于发射极面积，并且可以获得具有小发射极面积的大电流增益。