公开(公告)号：US5381027A

公开(公告)日：1995-01-10

申请号：US134622

申请日：1993-10-12

申请人： Toshiyuki Usagawa ,  Kenji Hiruma ,  Masahiko Kawata ,  Shigeo Goto ,  Katsuhiko Mitani ,  Masao Yamane ,  Susumu Takahashi ,  Tomonori Tanoue ,  Yoshinori Imamura

发明人： Toshiyuki Usagawa ,  Kenji Hiruma ,  Masahiko Kawata ,  Shigeo Goto ,  Katsuhiko Mitani ,  Masao Yamane ,  Susumu Takahashi ,  Tomonori Tanoue ,  Yoshinori Imamura

IPC分类号： H01L21/18 ,  H01L21/285 ,  H01L21/331 ,  H01L21/335 ,  H01L27/06 ,  H01L29/737 ,  H01L29/778 ,  H01L29/804 ,  H01L29/784

CPC分类号： H01L29/66318 ,  H01L21/182 ,  H01L21/28587 ,  H01L27/0605 ,  H01L29/66462 ,  H01L29/7373 ,  H01L29/7787

摘要： This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by intoduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance. The invention discloses also the structure of the ohmic contact layer which has a trench on the surface thereof and is particularly effective for reducing the source-gate parasitic resistance.

摘要翻译： 本发明公开了一种异质结型场效应晶体管，例如2DEG-FET和异质结型双极晶体管，例如2DEG-HBT。 前者通过应用于其源极和漏极区域的形成来制造通过诸如通过离子注入引起杂质的异质结的紊乱或通过形成由 选自绝缘体，金属和半导体的至少一种材料，其具有不同于待混杂的异质结半导体区域上的半导体衬底的材料的线性热膨胀系数。 后者通过将上述技术中的任一种应用于基极欧姆接触区域来制造。 这些半导体器件可以降低源极栅极电阻和寄生基极电阻。 本发明还公开了欧姆接触层的结构，其在其表面上具有沟槽，并且对于减小源极寄生电阻特别有效。

公开(公告)号：US5025751A

公开(公告)日：1991-06-25

申请号：US366185

申请日：1989-06-14

申请人： Shinichiro Takatani ,  Shigeo Goto ,  Masahiko Kawata ,  Kenji Hiruma

发明人： Shinichiro Takatani ,  Shigeo Goto ,  Masahiko Kawata ,  Kenji Hiruma

IPC分类号： C23C16/44 ,  C23C16/455 ,  C30B25/02 ,  C30B25/14

CPC分类号： C23C16/4551 ,  C30B25/02 ,  C30B25/14 ,  C30B29/40 ,  Y10S148/169

摘要： A solid film forming apparatus, e.g., an MO-MBE (Metal-Organic Molecular Beam Epitaxy) apparatus, wherein evacuatable containers isolated from a growth chamber by a switching device and connected to raw material gas introduction pipings are provided between the growth chamber for a solid film, e.g., a compound semiconductor, and raw material gas introduction pipings. Growth of the solid film is controlled by opening and closing the switching device and evacuating the container at least while the switching device is closed during the growth of the solid film. An undesired influence on the growing film due to residual gas in the containers which are not used for growth can be prevented and, hence, interception and introduction of the raw material gas into the growth chamber can be performed with remarkably high controllability, and films of superior abruptness of the interface between films, e.g., the heterojunction of the compound semiconductor, can be obtained.

摘要翻译： 一种固体成膜装置，例如MO-MBE（金属有机分子束外延）装置，其中通过开关装置从生长室隔离并连接到原料气体导入管的可排出容器设置在生长室之间用于 固体膜，例如化合物半导体和原料气体导入管。 至少在固体膜生长期间开关装置关闭时，通过打开和关闭开关装置并抽出容器来控制固体膜的生长。 可以防止由于不用于生长的容器中的残留气体对生长的膜产生不期望的影响，因此可以以非常高的可控性进行原料气体截留和引入生长室，并且可以进行膜的 可以获得膜之间的界面的优异的突变性，例如化合物半导体的异质结。

公开(公告)号：US4737015A

公开(公告)日：1988-04-12

申请号：US674770

申请日：1984-11-26

申请人： Koji Ishida ,  Hiroyoshi Matsumura ,  Kenji Hiruma ,  Kazuyuki Nagatsuma ,  Akihito Hongo

发明人： Koji Ishida ,  Hiroyoshi Matsumura ,  Kenji Hiruma ,  Kazuyuki Nagatsuma ,  Akihito Hongo

IPC分类号： G02B6/00 ,  G02B6/02 ,  G02B6/122 ,  G02B6/13 ,  G02B6/132

CPC分类号： G02B6/132 ,  G02B6/122

摘要： An optical waveguide comprising a layer formed on a substrate, having a mixed composition of silicon oxide and silicon nitride and having an arbitrary value of refractive index ranging between those of the silicon oxide and the silicon nitride. The layer of said mixed composition can be formed on the substrate to easily fabricate the optical waveguide of the present invention by conducting a sputtering method employing a Si target and controlling the composition of a sputtering gas composed of a mixture of N.sub.2 and O.sub.2 gases.

摘要翻译： 一种光波导，包括形成在基板上的层，其具有氧化硅和氮化硅的混合组成，并且具有范围在氧化硅和氮化硅的折射率之间的任意值。 所述混合组合物的层可以形成在基板上，以通过使用Si靶的溅射方法和控制由N 2和O 2气体的混合物组成的溅射气体的组成来容易地制造本发明的光波导。

公开(公告)号：US4720836A

公开(公告)日：1988-01-19

申请号：US767631

申请日：1985-08-20

申请人： Tadashi Fukuzawa ,  Hiroyoshi Matsumura ,  Shinji Tsuji ,  Hitoshi Nakamura ,  Kenji Hiruma

发明人： Tadashi Fukuzawa ,  Hiroyoshi Matsumura ,  Shinji Tsuji ,  Hitoshi Nakamura ,  Kenji Hiruma

IPC分类号： H01S5/00 ,  H01S5/12 ,  H01S5/34 ,  H01S3/08 ,  H01S3/19

CPC分类号： B82Y20/00 ,  H01S5/1228 ,  H01S5/34

摘要： The present invention relates to a semiconductor laser which oscillates in a single longitudinal mode and with a low threshold current and which exhibits a good mode stability against reflected light, and provides a structure of a distributed feedback semiconductor laser with modulation for a gain. The structure is such that gain producing regions are periodically arranged and that a substance transparent to laser radiation is buried between the regions. A layer including the gain regions is formed of a superlattice layer, and an impurity is diffused or implanted into periodic positions of the layer, whereby the transparent regions and the gain regions with little lattice damages can be readily formed.

摘要翻译： 本发明涉及一种半导体激光器，其以单一纵向模式和低阈值电流振荡，并且对反射光表现出良好的模式稳定性，并且提供具有用于增益的调制的分布式反馈半导体激光器的结构。 该结构使得增益产生区域周期性地布置，并且对于激光辐射透明的物质被埋在区域之间。 包含增益区域的层由超晶格层形成，杂质扩散或注入层的周期性位置，由此可以容易地形成几乎没有晶格损伤的透明区域和增益区域。

公开(公告)号：US08519378B2

公开(公告)日：2013-08-27

申请号：US13124493

申请日：2008-10-17

申请人： Kenji Hiruma ,  Shinjiro Hara ,  Junichi Motohisa ,  Takashi Fukui

发明人： Kenji Hiruma ,  Shinjiro Hara ,  Junichi Motohisa ,  Takashi Fukui

IPC分类号： H01L29/06

CPC分类号： H01L27/153 ,  H01L33/06 ,  H01L33/18 ,  H01L2224/48091 ,  H01L2924/00014

摘要： Semiconductor surface emitting elements having a plurality of wavelengths being manufactured on a signal substrate through MOVPE selective growth. More specifically, provided is a semiconductor light emitting element array which comprises; a semiconductor crystal substrate; an insulating film disposed on a surface of the substrate, the insulating film being divided into two or more regions, each of which having two or more openings exposing the surface of the substrate; semiconductor rods extending from the surface of the substrate upward through the openings, the semiconductor rods each having an n-type semiconductor layer and a p-type semiconductor layer being laminated in its extending direction, thereby providing a p-n junction; a first electrode connected to the semiconductor crystal substrate; and a second electrode connected to upper portions of the semiconductor rods; wherein the heights of the semiconductor rods as measured from the substrate surface vary by each of the two or more regions.

摘要翻译： 具有多个波长的半导体表面发射元件通过MOVPE选择性生长在信号衬底上制造。 更具体地，提供了一种半导体发光元件阵列，其包括： 半导体晶体基板; 绝缘膜设置在所述基板的表面上，所述绝缘膜被分成两个或更多个区域，每个区域具有暴露所述基板的表面的两个或多个开口; 半导体棒从衬底的表面向上延伸通过开口，每个半导体棒都具有n型半导体层和p型半导体层，其沿其延伸方向层压，从而提供p-n结; 连接到所述半导体晶体基板的第一电极; 以及连接到所述半导体棒的上部的第二电极; 其中从所述衬底表面测量的所述半导体棒的高度随所述两个或更多个区域中的每一个而变化。

公开(公告)号：US06356572B1

公开(公告)日：2002-03-12

申请号：US09268658

申请日：1999-03-16

申请人： Toshiaki Tanaka ,  Kenji Hiruma ,  Hiroshi Hamada

发明人： Toshiaki Tanaka ,  Kenji Hiruma ,  Hiroshi Hamada

IPC分类号： H01S534

CPC分类号： B82Y20/00 ,  H01S5/162 ,  H01S5/2013 ,  H01S5/3202 ,  H01S5/34 ,  H01S5/3407 ,  H01S5/3425

摘要： It is an object of the present invention to provide a semiconductor light emitting device capable of securing, in use of an optical information processing or an optical communication system, a low threshold and high efficiency operation as well as a high output characteristic. An active layer structure having a flatness and an interface acuteness of a quantum well structure improved by introducing a multi-period super lattice structure between a substrate for crystal growth and a light emitting layer area further to on a misoriented substrate sued to enhance a homogeneity of a semiconductor crystal. Further, a carrier confinement and a light confinement can be enhanced by providing a margin for design of the quantum well structure. According to the present invention, it is possible to realize a semiconductor laser element which can improve, as compared with a semiconductor laser device to which the present process is not applied, a threshold current and a slope efficiency, and which can achieve, as compared with an element not provided with a window structure, a high output characteristic with a maximum optical output enhanced.

摘要翻译： 本发明的目的是提供一种半导体发光器件，其能够在光信息处理或光通信系统的使用中确保低阈值和高效率操作以及高输出特性。活性层 通过在用于晶体生长的衬底之间引入多周期超晶格结构和进一步在被取向以提高半导体晶体的均匀性的错误取向的衬底上的发光层区域而提高量子阱结构的平坦度和界面精度的结构 。 此外，通过为量子阱结构的设计提供余量可以增强载流子限制和光限制。 根据本发明，可以实现与不施加本工艺​​的半导体激光器件相比可以改善阈值电流和斜率效率的半导体激光器元件，并且可以实现相比之下 具有不具有窗口结构的元件，具有增强的最大光输出的高输出特性。

公开(公告)号：US5351128A

公开(公告)日：1994-09-27

申请号：US919676

申请日：1992-07-27

申请人： Shigeo Goto ,  Hidetoshi Matsumoto ,  Masamitsu Yazawa ,  Yasunari Umemoto ,  Yoko Uchida ,  Kenji Hiruma

发明人： Shigeo Goto ,  Hidetoshi Matsumoto ,  Masamitsu Yazawa ,  Yasunari Umemoto ,  Yoko Uchida ,  Kenji Hiruma

IPC分类号： H01L29/45 ,  H01L29/16 ,  H01L29/205

CPC分类号： H01L29/452

摘要： A field-effect transistor or a bipolar transistor may be provided in which the contact resistance between a channel layer or base layer and a contact layer are reduced. For example, an InGaAs buffer layer may be formed on the substrate side of an InGaAs channel layer of a field-effect transistor and by the bypassing effect that carriers pass through this InGaAs buffer layer, the InGaAs channel layer comes in contact with the contact layer with a low resistance. The contact resistance between the InGaAs channel layer and the contact layer can be reduced to 10 ohm per a width of 10.mu.m, and as a result, the value of transconductance factor K of a field-effect transistor can be increased in 14 mA/V.sup.2 per a width of 10.mu.m.

摘要翻译： 可以提供场效应晶体管或双极晶体管，其中沟道层或基极层与接触层之间的接触电阻降低。 例如，可以在场效应晶体管的InGaAs沟道层的衬底侧上形成InGaAs缓冲层，并且通过载流子通过该InGaAs缓冲层的旁路效应，InGaAs沟道层与接触层接触 具有低阻力。 InGaAs沟道层和接触层之间的接触电阻可以减小到10欧姆，宽度为10微米，结果是场效应晶体管的跨导因子K的值可以增加到14mA / V2宽度为10微米。

公开(公告)号：US4784451A

公开(公告)日：1988-11-15

申请号：US762328

申请日：1985-08-05

申请人： Hitoshi Nakamura ,  Tadashi Fukuzawa ,  Koji Ishida ,  Hiroyoshi Matumura ,  Kenji Hiruma ,  Hiroaki Inoue

发明人： Hitoshi Nakamura ,  Tadashi Fukuzawa ,  Koji Ishida ,  Hiroyoshi Matumura ,  Kenji Hiruma ,  Hiroaki Inoue

IPC分类号： G02F1/313 ,  G02F1/315 ,  G02F1/015

CPC分类号： G02F1/3133 ,  G02F1/3138 ,  G02F1/315

摘要： The present invention provides a waveguide type optical switch which has a high extinction ratio and can be driven efficiently at a low voltage or a low current injection. Where the waveguide type optical switch is used as a reflection type optical switch, the switch section is of current confinement structure, and where it is used as a directional coupler type optical switch, the pn junction is formed in the position where the optical electric field takes the maximum value for the fundamental mode of the light propagating in the waveguide.

摘要翻译： 本发明提供一种具有高消光比且可在低电压或低电流注入下有效驱动的波导型光开关。 在波导型光开关用作反射型光开关的情况下，开关部分为电流限制结构，在用作定向耦合器型光开关的情况下，pn结形成在光电场 获取在波导中传播的光的基本模式的最大值。

公开(公告)号：US4766092A

公开(公告)日：1988-08-23

申请号：US937019

申请日：1986-12-02

申请人： Takao Kuroda ,  Kenji Hiruma ,  Hiroyoshi Matsumura

发明人： Takao Kuroda ,  Kenji Hiruma ,  Hiroyoshi Matsumura

IPC分类号： H01L21/20 ,  H01L21/203 ,  H01L21/205 ,  H01L21/265 ,  H01S5/00

CPC分类号： H01L21/26506 ,  H01L21/02381 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02658 ,  H01S2301/173 ,  H01S2304/04 ,  H01S5/021 ,  H01S5/0422 ,  H01S5/305 ,  H01S5/3054 ,  Y10S148/072 ,  Y10S148/097 ,  Y10S148/119 ,  Y10S438/933 ,  Y10S438/938

摘要： When a semiconductor device is produced by growing epitaxially a compound semiconductor layer on a Si or Ge substrate, lattice matching between the substrate crystal and the compound semiconductor layer to be formed on the substrate can be improved by ion-implanting an ion species element, which increases the lattice constant of Si or Ge as the substrate, into the Si or Ge substrate in order to increase its lattice constant. In comparison with conventional semiconductor devices using Si or Ge into which ion implantation is not made, the semiconductor device produced by the method described above can improve remarkably its characteristics. In the case of a semiconductor laser device, for example, its threshold value drops drastically and its service life can be prolonged remarkably.

摘要翻译： 当通过在Si或Ge衬底上外延生长化合物半导体层来制造半导体器件时，可以通过离子注入离子种类元素来改善衬底晶体和待形成在衬底上的化合物半导体层之间的晶格匹配， 将作为衬底的Si或Ge的晶格常数增加到Si或Ge衬底中，以增加其晶格常数。 与使用不进行离子注入的Si或Ge的常规半导体器件相比，通过上述方法制造的半导体器件可以显着改善其特性。 在半导体激光器件的情况下，例如，其阈值急剧下降，使用寿命显着延长。

公开(公告)号：US20110155236A1

公开(公告)日：2011-06-30

申请号：US12975755

申请日：2010-12-22

申请人： Hajime Goto ,  Takashi Fukui ,  Junichi Motohisa ,  Kenji Hiruma

发明人： Hajime Goto ,  Takashi Fukui ,  Junichi Motohisa ,  Kenji Hiruma

IPC分类号： H01L31/06 ,  H01L31/0352 ,  B82Y40/00

CPC分类号： H01L31/035227 ,  H01L31/02167 ,  H01L31/03529 ,  H01L31/0693 ,  H01L31/077 ,  H01L31/184 ,  Y02E10/544 ,  Y02P70/521

摘要： To provide a solar cell enabling practical electric power to be obtained and excitons to be effectively collected, and a manufacturing method of the solar cell. A nanowire solar cell 1 comprises: a semiconductor substrate 2; a plurality of nanowire semiconductors 4 and 5 forming pn junctions; a transparent insulating material 6 filled in the gap between the plurality of nanowire semiconductors 4 and 5; an electrode 7 covering the end portion of the plurality of nanowire semiconductors 4 and 5; and a passivation layer 10 provided between the semiconductor 5 and the transparent insulating material 6 and between the semiconductor 5 and the electrode 7.

摘要翻译： 提供能够获得实际电力并有效收集激子的太阳能电池，以及太阳能电池的制造方法。 纳米线太阳能电池1包括：半导体衬底2; 形成pn结的多个纳米线半导体4和5; 填充在多个纳米线半导体4和5之间的间隙中的透明绝缘材料6; 覆盖多个纳米线半导体4和5的端部的电极7; 以及设置在半导体5和透明绝缘材料6之间以及半导体5和电极7之间的钝化层10。