公开(公告)号：US20090200888A1

公开(公告)日：2009-08-13

申请号：US12370307

申请日：2009-02-12

申请人： Yuichiro Tanaka ,  Takashi Ishigami ,  Kenichi Nakayama ,  Yasuyuki Saito

发明人： Yuichiro Tanaka ,  Takashi Ishigami ,  Kenichi Nakayama ,  Yasuyuki Saito

IPC分类号： H02K3/28

CPC分类号： H02K3/28 ,  H02K3/12 ,  H02K15/0081

摘要： Each pair of coils mutually connected in a stator winding is arranged in a fashion that a first coil of each pair of coils has an inner-circumferential-side coil terminal (212) led out from an inner-circumferential-side slot position in the direction of a coil end (220) of the stator winding, and that a second coil of each pair of coils has an outer-circumferential-side coil terminal (211) led out from an outer-circumferential-side slot position in the direction of the coil end (220) of the stator winding for connection to the inner-circumferential-side coil terminal (212), wherein there is provided a coil terminal connection structure in which the inner-circumferential-side coil terminal (212) is connected to the outer-circumferential-side coil terminal (211) across the coil end (220), and joint parts (211a, 212a) thereof are bent close to the coil end (220).

摘要翻译： 互相连接在定子绕组中的每对线圈以每一对线圈的第一线圈的内周侧线圈端子（212）的方式配置，内周侧线圈端子（212）从内周侧槽位置朝向 定子绕组的线圈端部（220），并且每对线圈的第二线圈具有从外周侧槽位置沿着该方向从外周侧槽位置引出的外周侧线圈端子（211​​） 用于与内周侧线圈端子（212）连接的定子绕组的线圈端部（220），其中，设置有内周侧线圈端子（212）连接到所述内周侧线圈端子 跨越线圈端（220）的外周侧线圈端子（211​​）及其接合部（211a，212a）在线圈端（220）附近弯曲。

公开(公告)号：US20070228894A1

公开(公告)日：2007-10-04

申请号：US11723224

申请日：2007-03-19

申请人： Junri Ishikura ,  Naoari Shibata ,  Katsumi Aoki ,  Yasuyuki Saito

发明人： Junri Ishikura ,  Naoari Shibata ,  Katsumi Aoki ,  Yasuyuki Saito

IPC分类号： H01L41/00

CPC分类号： B41J2/161 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1632 ,  B41J2/1642 ,  B41J2/1646 ,  H01L41/0478 ,  H01L41/0973 ,  H01L41/316 ,  Y10T29/42 ,  Y10T29/49155

摘要： Providing a manufacturing method of a piezoelectric element by which even if an electrode and a piezoelectric film stacked on a substrate are baked at a high temperature, the electrode does not oxidize and mutual diffusion between the substrate, the electrode and the piezoelectric film may be suppressed. The electrode is adapted as a laminated layer body which includes an electroconductive oxide layer, a mixture layer having an electroconductive oxide and electroconductive metal, and an electroconductive metal layer including the electroconductive metal from a substrate side, and the mixture layer above is adapted as a graded composition structure in which a ration of the electroconductive oxide is highest in an interface with the electroconductive oxide layer and lowest in an interface with the electroconductive metal layer.

摘要翻译： 提供一种压电元件的制造方法，其中即使在高温下堆积在基板上的电极和压电膜也能够被氧化，并且可以抑制基板，电极和压电膜之间的相互扩散 。 该电极适合作为层压层体，其包括导电氧化物层，具有导电氧化物和导电金属的混合层，以及包含来自衬底侧的导电金属的导电金属层，并且上述混合层适于作为 分级组成结构，其中导电氧化物的比例在与导电氧化物层的界面中最高，并且在与导电金属层的界面中最低。

公开(公告)号：US07277038B2

公开(公告)日：2007-10-02

申请号：US11369752

申请日：2006-03-08

申请人： Naoki Yada ,  Yasuyuki Saito

发明人： Naoki Yada ,  Yasuyuki Saito

IPC分类号： H03M1/78 ,  H03M1/12

CPC分类号： H03M1/1023 ,  H03M1/46 ,  H03M1/682 ,  H03M1/765

摘要： A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

公开(公告)号：US20060238216A1

公开(公告)日：2006-10-26

申请号：US11446219

申请日：2006-06-05

申请人： Naoki Yada ,  Yasuyuki Saito ,  Yasushi Shibatsuka ,  Katsunori Koike ,  Mitsuhiko Okutsu

发明人： Naoki Yada ,  Yasuyuki Saito ,  Yasushi Shibatsuka ,  Katsunori Koike ,  Mitsuhiko Okutsu

IPC分类号： H03K19/195

CPC分类号： H03L7/08 ,  G06F1/08 ,  G11C7/04 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/2254 ,  H03K3/0315 ,  H03K5/133 ,  H03K5/2481 ,  H03K2005/00039 ,  H03K2005/00143 ,  H03L7/085

摘要： A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.

公开(公告)号：US20060152399A1

公开(公告)日：2006-07-13

申请号：US11369751

申请日：2006-03-08

申请人： Naoki Yada ,  Yasuyuki Saito

发明人： Naoki Yada ,  Yasuyuki Saito

IPC分类号： H03M1/12

CPC分类号： H03M1/1023 ,  H03M1/46 ,  H03M1/682 ,  H03M1/765

摘要： A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

公开(公告)号：US20060145907A1

公开(公告)日：2006-07-06

申请号：US11369753

申请日：2006-03-08

申请人： Naoki Yada ,  Yasuyuki Saito

发明人： Naoki Yada ,  Yasuyuki Saito

IPC分类号： H03M1/12

CPC分类号： H03M1/1023 ,  H03M1/46 ,  H03M1/682 ,  H03M1/765

摘要： A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

公开(公告)号：US07023729B2

公开(公告)日：2006-04-04

申请号：US11004869

申请日：2004-12-07

申请人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

发明人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

IPC分类号： G11C14/00

CPC分类号： G11C16/12 ,  G11C5/14 ,  G11C5/145 ,  G11C5/147 ,  G11C16/30

摘要： A microcomputer incorporating a flash memory which is erased and programmed electrically in a stable manner within a relatively wide range of external power supply voltages including those for low-voltage operations. The microcomputer comprises a voltage clamp unit including a reference voltage generating circuit and a constant voltage generating circuit. In operation, the voltage clamp unit generates a voltage of a low dependency on a supply voltage and clamps the generated voltage to a voltage level which, within a tolerable range, is lower than a single supply voltage externally furnished. This prevents voltages boosted by boosting circuits operating on the clamped voltage, i.e., programming and erasure voltages, from being dependent on the externally supplied voltage.

公开(公告)号：US20060066167A1

公开(公告)日：2006-03-30

申请号：US11200198

申请日：2005-08-10

申请人： Yasuyuki Saito ,  Takashi Yasuhara ,  Hidemitsu Kobayashi

发明人： Yasuyuki Saito ,  Takashi Yasuhara ,  Hidemitsu Kobayashi

IPC分类号： H02K11/00 ,  H02K19/00 ,  H02K3/00 ,  H01F7/06

CPC分类号： H02K3/12 ,  B60L11/12 ,  Y02T10/641 ,  Y02T10/7077 ,  Y10T29/49073

摘要： A stator coil, being a rectangular coil, is wound on a salient pole, striding across a plurality of slots, while being inserted sequentially through the inlet of a predetermined slot of the stator core. The stator coil comprises two slot inserts and to be inserted into the slot; two coil ends and located outside the end of the slot; and four twist sections arranged between the slot inserts and coil ends, processed by twisting. In the twist sections, twisting is applied to ensure that the surface of the rectangular coil in the second coil end will be opposite to the surface of the rectangular coil in the first coil end. The start of winding of the rectangular coil and the end of winding of the same coil are located on the same surface. Thereby, a rotating electrical machine with the large internal dimensions without increasing the external dimensions can be permitted.

摘要翻译： 作为矩形线圈的定子线圈被缠绕在凸极上，跨越多个槽，同时顺序地插入定子芯的预定槽的入口。 定子线圈包括两个槽插入件并插入插槽中; 两个线圈端部并位于槽的端部外部; 并且四个扭转部分布置在槽插入件和线圈端部之间，通过扭转加工。 在扭转部分中，施加扭转以确保第二线圈端部中的矩形线圈的表面将与第一线圈端部中的矩形线圈的表面相反。 矩形线圈的卷绕开始和相同线圈的卷绕结束位于相同的表面上。 因此，可以允许具有大的内部尺寸而不增加外部尺寸的旋转电机。

公开(公告)号：US20050094472A1

公开(公告)日：2005-05-05

申请号：US11004869

申请日：2004-12-07

申请人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

发明人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

IPC分类号： G11C5/14 ,  G11C16/30 ,  G11C5/00

CPC分类号： G11C16/12 ,  G11C5/14 ,  G11C5/145 ,  G11C5/147 ,  G11C16/30

摘要： A microcomputer incorporating a flash memory which is erased and programmed electrically in a stable manner within a relatively wide range of external power supply voltages including those for low-voltage operations The microcomputer comprises a voltage-clamp unit including a reference voltage generating circuit and a constant voltage generating circuit. In operation, the voltage clamp unit generates a voltage of a low dependency on a supply voltage and clamps the generated voltage to a voltage level which, within a tolerable range, is lower than a single supply voltage externally furnished. This prevents voltages boosted by boosting circuits operating on the clamped voltage, i.e., programming and erasure voltages, from being dependent on the externally supplied voltage.

摘要翻译： 一种微型计算机，其包括在包括用于低电压操作的外部电源电压的相对宽范围内以稳定的方式电擦除和编程的闪存。微计算机包括电压钳位单元，其包括参考电压产生电路和恒定电压 电压发生电路。 在操作中，电压钳位单元产生对电源电压的低依赖性的电压，并将所产生的电压钳位到在可容忍范围内低于外部单个电源电压的电压电平。 这可防止由钳位电压工作的升压电路（即编程和擦除电压）由外部提供的电压而提升的电压。

公开(公告)号：US06509860B2

公开(公告)日：2003-01-21

申请号：US09960925

申请日：2001-09-25

申请人： Yasuyuki Saito

发明人： Yasuyuki Saito

IPC分类号： H03M100

CPC分类号： H03K17/162 ,  G11C27/02 ,  G11C27/024 ,  H03K17/6872 ,  H03K17/6874 ,  H03K17/6877 ,  H03K17/693 ,  H03M1/46

摘要： An analog switch and an analog multiplexer are realized by which electron charges which have been stored in a stray capacitance provided on the output side thereof before a switch is conducted do not give an adverse influence to a level of such an analog input voltage which is subsequently entered after the switch has been switched. An analog switch circuit is arranged by insulating gate type transistors and a voltage follower which is parallel-connected to these insulating type transistors. When the analog switch circuit is turned ON, the voltage follower is firstly brought into an active state, and thereafter, these insulating gate type transistors are brought into conductive conditions.