公开(公告)号：US09093534B2

公开(公告)日：2015-07-28

申请号：US13953024

申请日：2013-07-29

Applicant: International Business Machines Corporation

Inventor： Kangguo Cheng ,  Ramachandra Divakaruni ,  Bruce B. Doris ,  Ali Khakifirooz ,  Edward J. Nowak ,  Kern Rim

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/66795 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0653 ,  H01L29/785

Abstract: An array of stacks containing a semiconductor fins and an oxygen-impermeable cap is formed on a semiconductor substrate with a substantially uniform areal density. Oxygen-impermeable spacers are formed around each stack, and the semiconductor substrate is etched to vertically extend trenches. Semiconductor sidewalls are physically exposed from underneath the oxygen-impermeable spacers. The oxygen-impermeable spacers are removed in regions in which semiconductor fins are not needed. A dielectric oxide material is deposited to fill the trenches. Oxidation is performed to convert a top portion of the semiconductor substrate and semiconductor fins not protected by oxygen-impermeable spacers into dielectric material portions. Upon removal of the oxygen-impermeable caps and remaining oxygen-impermeable spacers, an array including semiconductor fins and dielectric fins is provided. The dielectric fins alleviate variations in the local density of protruding structures, thereby reducing topographical variations in the height of gate level structures to be subsequently formed.

Abstract translation: 在半导体衬底上形成具有基本均匀的面密度的包含半导体鳍片和不透氧帽的叠层阵列。 在每个堆叠周围形成不透氧的间隔物，并且蚀刻半导体衬底以垂直延伸沟槽。 半导体侧壁从不透氧间隔物的下方物理暴露。 在不需要半导体散热片的区域中去除不透氧隔离物。 沉积电介质氧化物材料以填充沟槽。 执行氧化以将半导体衬底的顶部部分和不被不透氧隔离物保护的半导体鳍片转换成电介质材料部分。 在除去不透氧的盖子和剩余的不透氧隔离物之后，提供了包括半导体鳍片和介电鳍片的阵列。 介电散热片减轻突出结构的局部密度的变化，从而减少随后形成的栅极层结构的高度的形貌变化。

公开(公告)号：US20140332861A1

公开(公告)日：2014-11-13

申请号：US13891212

申请日：2013-05-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Ali Khakifirooz ,  Kern Rim

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/306

CPC classification number: H01L29/66795 ,  H01L21/306 ,  H01L21/32 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/10826 ,  H01L27/10879 ,  H01L27/1211 ,  H01L29/785

Abstract: Semiconductor fins having isolation regions of different thicknesses on the same integrated circuit are disclosed. Nitride spacers protect the lower portion of some fins, while other fins do not have spacers on the lower portion. The exposed lower portion of the fins are oxidized to provide isolation regions of different thicknesses.

Abstract translation: 公开了在同一集成电路上具有不同厚度的隔离区域的半导体散热片。 氮化物间隔件保护一些翅片的下部，而其他翅片在下部不具有间隔物。 翅片的暴露的下部被氧化以提供不同厚度的隔离区域。

公开(公告)号：US20140273381A1

公开(公告)日：2014-09-18

申请号：US13833656

申请日：2013-03-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kern Rim ,  William K. Henson ,  Yue Liang ,  Xinlin Wang

IPC: H01L29/66

CPC classification number: H01L29/1054 ,  H01L29/66575 ,  H01L29/78

Abstract: A semiconductor structure including a p-channel field effect transistor (pFET) device located on a surface of a silicon germanium (SiGe) channel is provided in which the junction profile of the source/drain region is abrupt. The abrupt source/drain junctions for pFET devices are provided by forming an N- or C-doped Si layer directly beneath a SiGe channel layer which is located above a Si substrate. A structure is provided in which the N- or C-doped Si layer (sandwiched between the SiGe channel layer and the Si substrate) has approximately the same diffusion rate for a p-type dopant as the overlying SiGe channel layer. Since the N- or C-doped Si layer and the overlying SiGe channel layer have substantially the same diffusivity for a p-type dopant and because the N- or C-doped Si layer retards diffusion of the p-type dopant into the underlying Si substrate, abrupt source/drain junctions can be formed.

Abstract translation: 提供了包括位于硅锗（SiGe）沟道的表面上的p沟道场效应晶体管（pFET）器件的半导体结构，其中源极/漏极区的结型材突变。 通过在位于Si衬底之上的SiGe沟道层的正下方形成N或C掺杂的Si层来提供pFET器件的突发的源极/漏极结。 提供了一种结构，其中N或C掺杂的Si层（夹在SiGe沟道层和Si衬底之间）对于p型掺杂剂具有与覆盖的SiGe沟道层大致相同的扩散速率。 由于N或C掺杂的Si层和上覆的SiGe沟道层对于p型掺杂物具有基本上相同的扩散率，并且因为N或C掺杂的Si层阻碍p型掺杂剂扩散到下面的Si 衬底，可以形成突发的源极/漏极结。

公开(公告)号：US20200083374A1

公开(公告)日：2020-03-12

申请号：US16682645

申请日：2019-11-13

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Darsen D. Lu ,  Ali Khakifirooz ,  Kern Rim

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L21/762 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/02 ,  H01L29/10 ,  H01L21/324 ,  H01L21/306 ,  H01L21/308

Abstract: A method of forming a fin structure that includes forming a plurality of fin structures from a bulk semiconductor substrate and forming a dielectric spacer on a sidewall of each fin structure in the plurality of fin structure. A semiconductor spacer is formed on a sidewall of the dielectric spacer. A dielectric fill is formed in the space between the adjacent fin structures. The semiconductor spacer and a portion of the fin structures that is present below a lower surface of the dielectric spacer are oxidized. Oxidizing a base portion of the fin structures produces a first strain and oxidizing the semiconductor spacer produces a second strain that is opposite the first strain.

公开(公告)号：US10546955B2

公开(公告)日：2020-01-28

申请号：US15134960

申请日：2016-04-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Darsen D. Lu ,  Ali Khakifirooz ,  Kern Rim

IPC: H01L29/66 ,  H01L21/84 ,  H01L21/76 ,  H01L29/78 ,  H01L21/311 ,  H01L21/308 ,  H01L21/306 ,  H01L21/324 ,  H01L29/10 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/762 ,  H01L29/06

Abstract: A method of forming a fin structure that includes forming a plurality of fin structures from a bulk semiconductor substrate and forming a dielectric spacer on a sidewall of each fin structure in the plurality of fin structure. A semiconductor spacer is formed on a sidewall of the dielectric spacer. A dielectric fill is formed in the space between the adjacent fin structures. The semiconductor spacer and a portion of the fin structures that is present below a lower surface of the dielectric spacer are oxidized. Oxidizing a base portion of the fin structures produces a first strain and oxidizing the semiconductor spacer produces a second strain that is opposite the first strain.

公开(公告)号：US20190237561A1

公开(公告)日：2019-08-01

申请号：US16375890

申请日：2019-04-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Ali Khakifirooz ,  Darsen D. Lu ,  Alexander Reznicek ,  Kern Rim

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/84 ,  H01L29/165 ,  H01L29/10 ,  H01L21/32 ,  H01L21/324 ,  H01L21/02 ,  H01L21/033 ,  H01L29/161

CPC classification number: H01L29/6681 ,  H01L21/02532 ,  H01L21/0332 ,  H01L21/32 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/845 ,  H01L29/1033 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7849 ,  H01L29/785

Abstract: A method of introducing strain in a channel region of a FinFET device includes forming a fin structure on a substrate, the fin structure having a lower portion comprising a sacrificial layer and an upper portion comprising a strained semiconductor layer; and removing a portion of the sacrificial layer corresponding to a channel region of the FinFET device so as to release the upper portion of the fin structure from the substrate in the channel region.

公开(公告)号：US10056474B2

公开(公告)日：2018-08-21

申请号：US14953519

申请日：2015-11-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Ali Khakifirooz ,  Darsen D. Lu ,  Alexander Reznicek ,  Kern Rim

IPC: H01L27/12 ,  H01L21/336 ,  H01L29/66 ,  H01L29/165 ,  H01L21/8238 ,  H01L21/84 ,  H01L29/78 ,  H01L21/02 ,  H01L21/033 ,  H01L21/32 ,  H01L21/324 ,  H01L29/10 ,  H01L29/161

CPC classification number: H01L29/6681 ,  H01L21/02532 ,  H01L21/0332 ,  H01L21/32 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/845 ,  H01L29/1033 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7849 ,  H01L29/785

Abstract: A method of introducing strain in a channel region of a FinFET device includes forming a fin structure on a substrate, the fin structure having a lower portion comprising a sacrificial layer and an upper portion comprising a strained semiconductor layer; and removing a portion of the sacrificial layer corresponding to a channel region of the FinFET device so as to release the upper portion of the fin structure from the substrate in the channel region.

公开(公告)号：US09954083B2

公开(公告)日：2018-04-24

申请号：US14830789

申请日：2015-08-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Ali Khakifirooz ,  Darsen D. Lu ,  Alexander Reznicek ,  Kern Rim

IPC: H01L27/092 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/165 ,  H01L21/8238 ,  H01L21/84 ,  H01L29/78 ,  H01L21/02 ,  H01L21/033 ,  H01L21/32 ,  H01L21/324 ,  H01L29/10 ,  H01L29/161

CPC classification number: H01L29/6681 ,  H01L21/02532 ,  H01L21/0332 ,  H01L21/32 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/845 ,  H01L29/1033 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7849 ,  H01L29/785

Abstract: A method of introducing strain in a channel region of a FinFET device includes forming a fin structure on a substrate, the fin structure having a lower portion comprising a sacrificial layer and an upper portion comprising a strained semiconductor layer; and removing a portion of the sacrificial layer corresponding to a channel region of the FinFET device so as to release the upper portion of the fin structure from the substrate in the channel region.

公开(公告)号：US09735277B2

公开(公告)日：2017-08-15

申请号：US15336654

申请日：2016-10-27

Applicant: International Business Machines Corporation

Inventor： Kangguo Cheng ,  Ramachandra Divakaruni ,  Johnathan E. Faltermeier ,  Edward J. Nowak ,  Kern Rim

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  H01L29/66 ,  H01L21/306

CPC classification number: H01L21/7624 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/02255 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/30604 ,  H01L21/31105 ,  H01L21/762 ,  H01L21/76202 ,  H01L29/66795 ,  H01L29/7848 ,  H01L2029/7857

Abstract: One embodiment provides a method comprising etching a fin of a fin-shaped field effect transistor (FinFET) to form a reduced fin, and laterally etching the reduced fin to form a fin channel including a first fin channel sidewall and a second fin channel sidewall opposing the first fin channel sidewall. The method further comprises forming a first thin dielectric tunnel and a second thin dielectric tunnel on the first fin channel sidewall and the second fin channel sidewall, respectively. Each thin dielectric tunnel prevents lateral epitaxial crystal growth on the fin channel. The method further comprises etching an insulator layer disposed between the fin channel and a substrate of the FinFET to expose portions of a substrate surface of the substrate. A source epitaxy and a drain epitaxy are formed from vertical epitaxial crystal growth on the exposed portions of the substrate surface after epitaxial deposition.

公开(公告)号：US09583492B2

公开(公告)日：2017-02-28

申请号：US15069557

申请日：2016-03-14

Applicant: International Business Machines Corporation

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Ali Khakifirooz ,  Darsen D. Lu ,  Alexander Reznicek ,  Kern Rim

IPC: H01L27/092 ,  H01L21/8238 ,  H01L21/02 ,  H01L29/10 ,  H01L21/308 ,  H01L29/165

CPC classification number: H01L27/0924 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/3081 ,  H01L21/823807 ,  H01L21/823821 ,  H01L29/1054 ,  H01L29/1083 ,  H01L29/165

Abstract: A non-planar semiconductor structure containing semiconductor fins that are isolated from an underlying bulk silicon substrate by an epitaxial semiconductor stack is provided. The epitaxial semiconductor material stack that provides the isolation includes, from bottom to top, a semiconductor punch through stop containing at least one dopant of a conductivity type which differs from the conductivity type of the particular device region that the semiconductor fin is formed in, and a semiconductor diffusion barrier layer containing no n- or p-type dopant.