公开(公告)号：US20120225268A1

公开(公告)日：2012-09-06

申请号：US13038605

申请日：2011-03-02

Applicant: Vassil Antonov ,  Jennifer K. Sigman ,  Vishwanath Bhat ,  Matthew N. Rocklein ,  Bhaskar Srinivasan ,  Chris Carlson

Inventor： Vassil Antonov ,  Jennifer K. Sigman ,  Vishwanath Bhat ,  Matthew N. Rocklein ,  Bhaskar Srinivasan ,  Chris Carlson

IPC: B32B7/02 ,  B05D1/36 ,  B05D5/12 ,  B05D3/02 ,  B32B9/00 ,  B05D5/00

CPC classification number: H01L28/40 ,  H01G4/1209 ,  H01G4/1218 ,  H01G4/1236 ,  H01G4/1254 ,  H01G4/1272 ,  H01G4/306 ,  H01G4/33 ,  H01L21/02172 ,  H01L21/02356 ,  H01L21/225 ,  Y10T428/2495

Abstract: Methods of forming an insulative element are described, including forming a first metal oxide material having a first dielectric constant, forming a second metal oxide material having a second dielectric constant different from the first, and heating at least portions of the structure to crystallize at least a portion of at least one of the first dielectric material and the second dielectric material. Methods of forming a capacitor are described, including forming a first electrode, forming a dielectric material with a first oxide and a second oxide over the first electrode, and forming a second electrode over the dielectric material. Structures including dielectric materials are also described.

Abstract translation: 描述了形成绝缘元件的方法，包括形成具有第一介电常数的第一金属氧化物材料，形成具有与第一介电常数不同的第二介电常数的第二金属氧化物材料，并加热该结构的至少部分至少结晶 第一电介质材料和第二电介质材料中的至少一个的一部分。 描述了形成电容器的方法，包括形成第一电极，在第一电极上形成具有第一氧化物和第二氧化物的介电材料，以及在电介质材料上形成第二电极。 还描述了包括电介质材料的结构。

公开(公告)号：US20120218810A1

公开(公告)日：2012-08-30

申请号：US13463794

申请日：2012-05-03

Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

IPC: G11C11/00 ,  G11C7/00

CPC classification number: G11C13/004 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0061 ,  G11C2013/0052 ,  G11C2213/72

Abstract: Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is applied for a sufficient duration of time; and the reading is conducted with a pulse that is of too short of a time duration to be sufficient for the write operation. In some embodiments, the pulse utilized for the reading may have an absolute value of voltage that is greater than or equal to the voltage utilized for the write operation. In some embodiments, the memory cells may comprise non-ohmic devices; such as memristors and diodes.

Abstract translation: 一些实施例包括读取存储器单元的方法。 存储器单元具有写入操作，只有当足够的绝对值的电压施加足够的持续时间时才发生; 并且读取是用太短的持续时间的脉冲来进行的，以足以用于写入操作。 在一些实施例中，用于读取的脉冲可以具有大于或等于用于写入操作的电压的绝对值。 在一些实施例中，存储器单元可以包括非欧姆器件; 如忆阻器和二极管。

公开(公告)号：US08228730B2

公开(公告)日：2012-07-24

申请号：US12872368

申请日：2010-08-31

Applicant: Gurtej S. Sandhu ,  Bhaskar Srinivasan

Inventor： Gurtej S. Sandhu ,  Bhaskar Srinivasan

IPC: G11C16/04 ,  H01L29/788

CPC classification number: G11C16/0416 ,  G11C16/0483

Abstract: Memory cell structures and methods are described herein. One or more memory cells include a transistor having a charge storage node, a dielectric material positioned between the charge storage node and a channel region of the transistor, the channel region positioned between a source region and a drain region, and a first electrode of a diode coupled to the charge storage node.

Abstract translation: 本文描述了存储单元结构和方法。 一个或多个存储单元包括具有电荷存储节点的晶体管，位于电荷存储节点和晶体管的沟道区之间的电介质材料，位于源区和漏区之间的沟道区，以及位于源区和漏区之间的第一电极 耦合到电荷存储节点的二极管。

公开(公告)号：US08198124B2

公开(公告)日：2012-06-12

申请号：US12652576

申请日：2010-01-05

Applicant: Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

Inventor： Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

IPC: H01L21/00

CPC classification number: H01L27/2481 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1683

Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.

Abstract translation: 用于形成包含掺杂的硫族化物材料的存储器存取装置的自对准制造方法。 该方法可用于形成三维堆叠的交叉点存储器阵列。 该方法包括在第一导电电极上形成绝缘材料，图案化绝缘材料以形成暴露第一导电电极的部分的通孔，在绝缘材料的通孔内形成存储器访问装置，并在存储器访问上形成存储元件 设备，其中存储在所述存储器元件中的数据可经由所述存储器访问设备访问。 存储器存取装置由掺杂的硫族化物材料形成，并使用自对准制造方法形成。

公开(公告)号：US08120134B2

公开(公告)日：2012-02-21

申请号：US12580013

申请日：2009-10-15

Applicant: Gurtej Sandhu ,  Bhaskar Srinivasan

Inventor： Gurtej Sandhu ,  Bhaskar Srinivasan

IPC: H01L31/058 ,  H01L29/06

CPC classification number: H01L29/24 ,  H01L27/24 ,  H01L45/00

Abstract: A diode and memory device including the diode, where the diode includes a conductive portion and another portion formed of a first material that has characteristics allowing a first decrease in a resistivity of the material upon application of a voltage to the material, thereby allowing current to flow there through, and has further characteristics allowing a second decrease in the resistivity of the first material in response to an increase in temperature of the first material.

Abstract translation: 包括二极管的二极管和存储器件，其中二极管包括导电部分和由第一材料形成的另一部分，该第一材料具有允许在向材料施加电压时第一次降低材料的电阻率的特性，从而允许电流 流过其中，并且具有允许第一材料的电阻率响应于第一材料的温度升高而第二次降低的特征。

公开(公告)号：US20110298007A1

公开(公告)日：2011-12-08

申请号：US13211036

申请日：2011-08-16

Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

IPC: H01L29/88 ,  H01L21/3205

CPC classification number: H01L29/88 ,  H01L21/3205 ,  H01L27/1021 ,  Y10S438/957

Abstract: Select devices including an open volume that functions as a high bandgap material having a low dielectric constant are disclosed. The open volume may provide a more nonlinear, asymmetric I-V curve and enhanced rectifying behavior in the select devices. The select devices may comprise, for example, a metal-insulator-insulator-metal (MIIM) diode. Various methods may be used to form select devices and memory systems including such select devices. Memory devices and electronic systems include such select devices.

Abstract translation: 公开了包括用作具有低介电常数的高带隙材料的开放体积的装置。 开放体积可以在选择装置中提供更非线性的非对称I-V曲线和增强的整流行为。 选择装置可以包括例如金属 - 绝缘体 - 绝缘体 - 金属（MIIM）二极管。 可以使用各种方法来形成包括这种选择装置的选择装置和存储器系统。 存储器件和电子系统包括这样的选择器件。

公开(公告)号：US20110165728A1

公开(公告)日：2011-07-07

申请号：US12652576

申请日：2010-01-05

Applicant: Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

Inventor： Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

IPC: H01L21/06

CPC classification number: H01L27/2481 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1683

Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.

Abstract translation: 用于形成包含掺杂的硫族化物材料的存储器存取装置的自对准制造方法。 该方法可用于形成三维堆叠的交叉点存储器阵列。 该方法包括在第一导电电极上形成绝缘材料，图案化绝缘材料以形成暴露第一导电电极的部分的通孔，在绝缘材料的通孔内形成存储器访问装置，并在存储器访问上形成存储元件 设备，其中存储在所述存储器元件中的数据可经由所述存储器访问设备访问。 存储器存取装置由掺杂的硫族化物材料形成，并使用自对准制造方法形成。

公开(公告)号：US07939442B2

公开(公告)日：2011-05-10

申请号：US12421916

申请日：2009-04-10

Applicant: Bhaskar Srinivasan ,  Vassil Antonov ,  John Smythe

Inventor： Bhaskar Srinivasan ,  Vassil Antonov ,  John Smythe

IPC: H01L21/00

CPC classification number: H01L28/75 ,  C23C16/404 ,  C23C16/409 ,  C23C16/45527 ,  C23C16/45529 ,  C23C16/45531 ,  C23C16/56 ,  H01G4/33 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/0228 ,  H01L28/56 ,  H01L28/65

Abstract: Strontium ruthenium oxide provides an effective interface between a ruthenium conductor and a strontium titanium oxide dielectric. Formation of the strontium ruthenium oxide includes the use of atomic layer deposition to form strontium oxide and subsequent annealing of the strontium oxide to form the strontium ruthenium oxide. A first atomic layer deposition of strontium oxide is preformed using water as an oxygen source, followed by a subsequent atomic layer deposition of strontium oxide using ozone as an oxygen source.

Abstract translation: 钌氧化钌提供钌导体和锶钛氧化物电介质之间的有效界面。 锶氧化钌的形成包括使用原子层沉积形成氧化锶，随后退火氧化锶以形成氧化锶锶。 使用水作为氧源来进行氧化锶的第一原子层沉积，然后使用臭氧作为氧源，随后用氧化锶沉积氧化锶。

公开(公告)号：US20100316793A1

公开(公告)日：2010-12-16

申请号：US12483455

申请日：2009-06-12

Applicant: Rishikesh Krishnan ,  John Smythe ,  Vishwanath Bhat ,  Noel Rocklein ,  Bhaskar Srinivasan ,  Jef Hall ,  Chris Carlson

Inventor： Rishikesh Krishnan ,  John Smythe ,  Vishwanath Bhat ,  Noel Rocklein ,  Bhaskar Srinivasan ,  Jef Hall ,  Chris Carlson

IPC: B05D5/12

CPC classification number: H01G4/12 ,  H01G4/1272 ,  H01G4/33 ,  H01L28/40

Abstract: Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10−7 amps/cm2 at from −1.1V to +1.1V.

Abstract translation: 公开了形成电容器的电容器和方法，其包括内部导电金属电容器电极和外部导电金属电容器电极。 电容器电介质区域被容纳在内导电金属电容电极和外导电金属电容器电极之间，并且具有不大于150埃的厚度。 公开了厚度和关系的材料的各种组合，其相互之间可以实现和导致电介质区域的介电常数k至少为35，而在-1.1V至-1.0V的范围内漏电流不大于1×10-7Aps / cm 2 + 1.1V。

公开(公告)号：US20100259611A1

公开(公告)日：2010-10-14

申请号：US11521279

申请日：2006-09-14

Applicant: Abtin Keshavarzian ,  David Krum ,  Dhananjay Lal ,  Bhaskar Srinivasan

Inventor： Abtin Keshavarzian ,  David Krum ,  Dhananjay Lal ,  Bhaskar Srinivasan

IPC: G08B1/08 ,  H04N7/18

CPC classification number: G07C9/00111 ,  G08B13/19697 ,  G08B13/2462 ,  G08B21/0476 ,  G08B21/0492

Abstract: In a system and method for controlled user tracking, a mobile device is provided for transmitting an identification signal, and a reader unit, which is statically located at a location, is provided for receiving the identification signal and transmitting to a surveillance control unit, in response to receipt of the identification signal, either the received identification signal or another signal that identifies the mobile device, for logging by the surveillance control unit of a presence of the mobile device at the location, where the mobile device and/or the reader unit is configured to transmit at least one surveillance control message for control of surveillance at the location.

Abstract translation: 在用于受控用户跟踪的系统和方法中，提供了用于发送识别信号的移动设备，并且静态地位于一个位置处的读取器单元被提供用于接收识别信号并且传送到监视控制单元 响应于接收到识别信号，接收到的标识信号或识别移动设备的另一个信号，用于由监视控制单元记录在该位置处的移动设备的存在，其中移动设备和/或读取器单元 被配置为传送至少一个监控控制消息，以控制在该位置的监视。