公开(公告)号：US20230244629A1

公开(公告)日：2023-08-03

申请号：US17590339

申请日：2022-02-01

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Dotan David Levi ,  Eyal Srebro ,  Eliel Peretz ,  Roee Moyal ,  Richard Graham ,  Gil Bloch ,  Sean Pieper

IPC: G06F13/42 ,  G06F7/76

CPC classification number: G06F13/42 ,  G06F7/76

Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.

公开(公告)号：US11700414B2

公开(公告)日：2023-07-11

申请号：US17542426

申请日：2021-12-05

Applicant: Mellanox Technologies, Ltd.

Inventor： Dotan David Levi ,  Michael Kagan

IPC: H04N21/00 ,  H04N21/426 ,  G06T1/60

CPC classification number: H04N21/42607 ,  G06T1/60 ,  H04N21/42653

Abstract: Apparatus for data communications includes a host interface, which is configured to be connected to a bus of a host computer having a processor and a memory. Processing circuitry, which is coupled to the host interface, is configured to receive video data with respect to a sequence of pixels, the video data including data words of more than eight bits per pixel for at least one pixel component of the pixels, and to write the video data, via the host interface, to at least one buffer in the memory while justifying the video data in the memory so that the successive pixels in the sequence are byte-aligned in the at least one buffer.

公开(公告)号：US11641245B2

公开(公告)日：2023-05-02

申请号：US17246730

申请日：2021-05-03

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Wojciech Wasko ,  Natan Manevich ,  Roee Moyal ,  Eliel Peretz ,  Eran Ben Elisha ,  Ariel Almog ,  Teferet Geula ,  Amit Mandelbaum

IPC: H04J3/06 ,  H04L43/0817 ,  H04L43/0882 ,  H04L67/55

Abstract: In one embodiment, an event processing system includes a clock configured to provide time values, and event processing circuitry, which is configured to generate a confidence level indicative of a degree of confidence of an accuracy of a timestamp, the timestamp being generated for an event responsively to a time value indicative of when an operation associated with the event occurred.

公开(公告)号：US11588609B2

公开(公告)日：2023-02-21

申请号：US17148605

申请日：2021-01-14

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Liron Mula ,  Dotan David Levi ,  Ariel Almog

IPC: H04W40/20 ,  H04L7/00

Abstract: A network device includes one or more ports for connecting to a communication network, packet processing circuitry and clock circuitry. The packet processing circuitry is configured to communicate packets over the communication network via the ports. The clock circuitry includes a hardware clock configured to indicate a network time used for synchronizing network devices in the communication network, and a built-in accuracy test circuit configured to check an accuracy of the hardware clock.

公开(公告)号：US20230012939A1

公开(公告)日：2023-01-19

申请号：US17898496

申请日：2022-08-30

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Assaf Weissman ,  Kobi Pines ,  Noam Bloch ,  Erez Yaacov ,  Ariel Naftali Cohen

IPC: H04N19/42 ,  H04N19/119 ,  H04N19/176 ,  H04N19/105 ,  H04N19/132

Abstract: A system including an acceleration device including input circuitry configured, for each of a first plurality of video frames to be encoded, to receive an input including at least one raw video frame and at least one reference frame, and to divide each of the first plurality of video frames to be encoded into a second plurality of blocks, and similarity computation circuitry configured, for each one of the first plurality of video frame to be encoded: for each block of the second plurality of blocks, to produce a score of result blocks based on similarity of each block in each frame to be encoded to every block of the reference frame, an AC energy coefficient, and a displacement vector. Related apparatus and methods are also provided.

公开(公告)号：US11552871B2

公开(公告)日：2023-01-10

申请号：US16900931

申请日：2020-06-14

Applicant: Mellanox Technologies, Ltd.

Inventor： Ran Sela ,  Liron Mula ,  Ran Ravid ,  Guy Lederman ,  Dotan David Levi

IPC: H04L43/106 ,  H04J3/06 ,  H04L43/0852 ,  G06F15/173 ,  H04L7/00

Abstract: In one embodiment, a network device, includes a network interface port configured to receive data symbols from a network node over a packet data network, at least some of the symbols being included in data packets, and controller circuitry including physical layer (PHY) circuitry, which includes receive PHY pipeline circuitry configured to process the received data symbols, and a counter configured to maintain a counter value indicative of a number of the data symbols in the receive PHY pipeline circuitry.

公开(公告)号：US20230006981A1

公开(公告)日：2023-01-05

申请号：US17369305

申请日：2021-07-07

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dimitrios Syrivelis ,  Dotan David Levi ,  Paraskevas Bakopoulos ,  Ioannis (Giannis) Patronas ,  Elad Mentovich

IPC: H04L29/06 ,  H04L9/08 ,  G06F9/455 ,  H04L9/32

Abstract: A network interface controller includes processing circuitry configured to pair with a local root of trust of a host device connected to the network interface controller and provide a key to an encryption device of the host device that enables the encryption device to encrypt data of one or more host device applications using the key. The encrypted data are stored in host device memory. The processing circuitry is configured to share the key with a remote endpoint and forward the encrypted data from the host device memory to the remote endpoint.

公开(公告)号：US11483127B2

公开(公告)日：2022-10-25

申请号：US16683309

申请日：2019-11-14

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ariel Almog ,  Thomas Kernen ,  Alex Vainman ,  Nir Nitzani ,  Dotan David Levi ,  Ilan Smith ,  Rafi Wiener

IPC: H04L7/10 ,  G06F9/455

Abstract: Apparatus including a shared device in communication with a plurality of computing machines external to the shared device, the shared device including at least one PTP domain coefficient storage area, the at least one PTP domain coefficient storage area receiving a PTP coefficient from a computing machine having a PTP client, and providing the PTP coefficient to a computing machine not having a PTP client. Related apparatus and methods are also provided.

公开(公告)号：US20220173741A1

公开(公告)日：2022-06-02

申请号：US17670540

申请日：2022-02-14

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ran Ravid ,  Aviv Berg ,  Lavi Koch ,  Chen Gaist ,  Dotan David Levi

IPC: H03L7/08 ,  G06F1/12 ,  H04L7/033 ,  H03L7/099

Abstract: In one embodiment, a device includes frequency generation circuitry configured to generate a clock signal, a phase-locked loop (PLL) configured to generate a local clock based on the clock signal, a receiver configured to receive a data stream from a remote clock source and recover a remote clock from the data stream, and a controller configured to find a clock differential between the local clock and the remote clock identified as a master dock, and provide a control signal to the frequency generation circuitry responsively to the clock differential, which causes the frequency generation circuitry to adjust the clock signal so as to iteratively reduce an absolute value of the clock differential between the local clock and the remote clock identified as the master clock so that the local clock generated by the PLL is synchronized with the master clock.

公开(公告)号：US11336383B2

公开(公告)日：2022-05-17

申请号：US16910193

申请日：2020-06-24

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Liron Mula ,  Dotan David Levi ,  Ran Ravid ,  Guy Lederman

IPC: H04J3/06 ,  H04L12/46 ,  H04L43/0852 ,  H04L69/22

Abstract: In certain exemplary embodiments, a switching device is provided, including an input interface configured to communicate with a packet source, an output interface configured to communicate with a packet destination, and packet processing circuitry. The packet processing circuitry is configured to receive a plurality of packets from the packet source via the input interface, each of the plurality of packets being associated with a packet descriptor, at least one of the packet descriptors being a transmission time packet descriptor including a desired physical transmission time for the packet associated with the transmission time packet descriptor, to receive an indication of a clock time, and for each packet associated with a transmission time packet descriptor, to physically transmit the packet associated with the transmission time packet descriptor, via the output interface, at a clock time corresponding to the desired physical transmission time. Related apparatus an methods are also provided.