公开(公告)号：US09299926B2

公开(公告)日：2016-03-29

申请号：US13399728

申请日：2012-02-17

申请人： Mihir Tendulkar ,  Imran Hashim ,  Yun Wang ,  Tim Minvielle ,  Takeshi Yamaguchi

发明人： Mihir Tendulkar ,  Imran Hashim ,  Yun Wang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC分类号： H01L21/02 ,  H01L45/00

CPC分类号： H01L45/08 ,  G11C2213/51 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/146 ,  H01L45/16

摘要： Embodiments of the invention include a method of forming a nonvolatile memory device that contains a resistive switching memory element with improved device switching performance and lifetime, due to the addition of a current limiting component. In one embodiment, the current limiting component comprises a resistive material configured to improve the switching performance and lifetime of the resistive switching memory element. The electrical properties of the current limiting layer are configured to lower the current flow through the variable resistance layer during the logic state programming steps by adding a fixed series resistance in the resistive switching memory element found in the nonvolatile memory device. In one embodiment, the current limiting component comprises a tunnel oxide layer that is a current limiting material and an oxygen barrier layer that is an oxygen deficient material disposed within a resistive switching memory element in a nonvolatile resistive switching memory device.

摘要翻译： 本发明的实施例包括一种形成非易失性存储器件的方法，该非易失性存储器件包含由于添加限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。 在一个实施例中，限流部件包括被配置为改善电阻式开关存储器元件的开关性能和寿命的电阻材料。 电流限制层的电气特性被配置为在逻辑状态编程步骤期间通过在非易失性存储器件中存在的电阻式开关存储器元件中增加固定串联电阻来降低通过可变电阻层的电流。 在一个实施例中，限流部件包括作为限流材料的隧道氧化物层和作为设置在非易失性电阻式开关存储器件中的电阻式开关存储器元件内的缺氧材料的氧阻挡层。

公开(公告)号：US08741698B2

公开(公告)日：2014-06-03

申请号：US13306096

申请日：2011-11-29

申请人： Jinhong Tong ,  Vidyut Gopal ,  Imran Hashim ,  Randall Higuchi ,  Albert Lee

发明人： Jinhong Tong ,  Vidyut Gopal ,  Imran Hashim ,  Randall Higuchi ,  Albert Lee

IPC分类号： H01L21/332

CPC分类号： H01L45/08 ,  H01L27/2463 ,  H01L45/146 ,  H01L45/1616

摘要： Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium oxide for use in a variety of electronic devices. Forming the dielectric layer includes depositing zirconium oxide using atomic layer deposition. A method of atomic layer deposition to produce a metal-rich metal oxide comprises the steps of providing a silicon substrate in a reaction chamber, pulsing a zirconium precursor for a predetermined time to deposit a first layer, and oxidizing the first layer with water vapor to produce the metal-rich metal oxide. The metal-rich metal oxide has superior properties for non-volatile resistive-switching memories.

摘要翻译： 原子层沉积（ALD）可用于形成用于各种电子器件的氧化锆电介质层。 形成介电层包括使用原子层沉积沉积氧化锆。 原子层沉积法生产富金属的金属氧化物的方法包括以下步骤：在反应室中提供硅衬底，将锆前体脉冲预定的时间以沉积第一层，并用水蒸气氧化第一层 产生富金属的金属氧化物。 富金属的金属氧化物具有优异的非易失性电阻式开关存储器的性能。

公开(公告)号：US20140054531A1

公开(公告)日：2014-02-27

申请号：US13594395

申请日：2012-08-24

申请人： Nan Lu ,  Imran Hashim ,  Jinhong Tong ,  Ruey-Ven Wang

发明人： Nan Lu ,  Imran Hashim ,  Ronald Kuse ,  Jinhong Tong ,  Ruey-Ven Wang

IPC分类号： H01L47/00 ,  H01L21/02

CPC分类号： H01L45/1641 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616

摘要： Embodiments of the invention set forth a nonvolatile memory element with a novel variable resistance layer and methods of forming the same. The novel variable resistance layer includes a metal-rich host oxide that operates with a reduced switching voltage and current and requires significantly reduced forming voltage when manufactured. In some embodiments, the metal-rich host oxide is deposited using a modified atomic layer deposition (ALD) process. In other embodiments, the metal-rich host oxide is formed by depositing a metal-containing coupling layer on a host oxide and thermally processing both layers to create a metal-rich composite host oxide with a higher concentration of oxygen vacancies.

摘要翻译： 本发明的实施例提出了具有新颖的可变电阻层的非易失性存储元件及其形成方法。 新颖的可变电阻层包括富含金属的主体氧化物，其以降低的开关电压和电流工作，并且当制造时需要显着降低的成形电压。 在一些实施方案中，使用修改的原子层沉积（ALD）工艺沉积富金属的主体氧化物。 在其它实施方案中，通过在主体氧化物上沉积含金属的偶联层并热处理两层以形成具有较高浓度的氧空位的富金属的复合主体氧化物来形成富含金属的主体氧化物。

公开(公告)号：US08569104B2

公开(公告)日：2013-10-29

申请号：US13367927

申请日：2012-02-07

申请人： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

发明人： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

IPC分类号： H01L29/02

CPC分类号： H01L45/08 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

摘要： Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.

公开(公告)号：US08551851B2

公开(公告)日：2013-10-08

申请号：US13100538

申请日：2011-05-04

申请人： Hanhong Chen ,  Pragati Kumar ,  Sunil Shanker ,  Edward Haywood ,  Sandra Malhotra ,  Imran Hashim ,  Nobi Fuchigami ,  Prashant Phatak ,  Monica Mathur

发明人： Hanhong Chen ,  Pragati Kumar ,  Sunil Shanker ,  Edward Haywood ,  Sandra Malhotra ,  Imran Hashim ,  Nobi Fuchigami ,  Prashant Phatak ,  Monica Mathur

IPC分类号： H01L21/20

CPC分类号： H01G4/1218 ,  C23C16/405 ,  C23C16/45531 ,  C23C16/56 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02312 ,  H01L21/02337 ,  H01L21/3141 ,  H01L21/3142 ,  H01L28/40

摘要： This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle. The process provides high deposition rates, and the resulting MIM structure has substantially no x-ray diffraction peaks associated with anatase-phase titanium oxide.

摘要翻译： 本公开内容提供（a）制造基于氧化钛的氧化物层（例如电介质层）的方法，以抑制锐钛矿相氧化钛的形成和（b）相关的器件和结构。 使用底部电极（或其他基底）的臭氧预处理随后进行ALD工艺来形成金属 - 绝缘体 - 金属（“MIM”）堆叠，以形成根植于使用含酰胺的前体的TiO 2电介质。 在ALD工艺之后，氧化退火工艺的应用热度足以愈合TiO2电介质中的缺陷，并降低TiO2和电极之间的界面态; 选择退火温度以使其不那么热，以致破坏BEL表面粗糙度。 进一步的工艺变型可以包括在ALD工艺期间掺杂氧化钛，基座加热至275-300摄氏度，对于BEL使用铂或钌，对于每个ALD工艺循环使用多个试剂脉冲的臭氧。 该方法提供高沉积速率，并且所得MIM结构基本上没有与锐钛矿相氧化钛相关的x射线衍射峰。

公开(公告)号：US20130134376A1

公开(公告)日：2013-05-30

申请号：US13306096

申请日：2011-11-29

申请人： Jinhong Tong ,  Vidyut Gopal ,  Imran Hashim ,  Randall Higuchi ,  Albert Lee

发明人： Jinhong Tong ,  Vidyut Gopal ,  Imran Hashim ,  Randall Higuchi ,  Albert Lee

IPC分类号： H01L45/00 ,  H01L21/02

CPC分类号： H01L45/08 ,  H01L27/2463 ,  H01L45/146 ,  H01L45/1616

摘要： Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium oxide for use in a variety of electronic devices. Forming the dielectric layer includes depositing zirconium oxide using atomic layer deposition. A method of atomic layer deposition to produce a metal-rich metal oxide comprises the steps of providing a silicon substrate in a reaction chamber, pulsing a zirconium precursor for a predetermined time to deposit a first layer, and oxidizing the first layer with water vapor to produce the metal-rich metal oxide. The metal-rich metal oxide has superior properties for non-volatile resistive-switching memories.

摘要翻译： 原子层沉积（ALD）可用于形成用于各种电子器件的氧化锆电介质层。 形成介电层包括使用原子层沉积沉积氧化锆。 原子层沉积法生产富金属的金属氧化物的方法包括以下步骤：在反应室中提供硅衬底，将锆前体脉冲预定的时间以沉积第一层，并用水蒸气氧化第一层 产生富金属的金属氧化物。 富金属的金属氧化物具有优异的非易失性电阻式开关存储器的性能。

公开(公告)号：US20130065377A1

公开(公告)日：2013-03-14

申请号：US13228744

申请日：2011-09-09

申请人： Vidyut Gopal ,  Yun Wang ,  Imran Hashim

发明人： Vidyut Gopal ,  Yun Wang ,  Imran Hashim

IPC分类号： H01L47/00

CPC分类号： H01L27/2463 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1641

摘要： A resistive switching nonvolatile memory device having an interface layer disposed between a doped silicon electrode and a variable resistance layer fabricated in the nonvolatile memory device and methods of fabricating the same. In one embodiment, the interface layer is a high-k layer having a lower electrical EOT than native silicon oxide to act as a diffusion barrier between the variable resistance layer and the silicon electrode. Alternatively, the high-k interface layer may be formed by performing a nitrogen treatment on a fabricated silicon oxide layer. In another embodiment, the interface layer may be fabricated by performing a nitrogen or ozone treatment on the native oxide layer. In another embodiment, the interface layer is a fabricated silicon oxide layer resulting in an improved diffusion barrier between the variable resistance layer and the silicon electrode. In all embodiments, the interface layer also passivates the surface of the silicon electrode.

摘要翻译： 一种电阻式开关非易失性存储器件，其具有设置在非易失性存储器件中制造的掺杂硅电极和可变电阻层之间的界面层及其制造方法。 在一个实施例中，界面层是具有比天然氧化硅更低的电EOT的高k层，以在可变电阻层和硅电极之间充当扩散势垒。 或者，可以通过对制造的氧化硅层进行氮处理来形成高k界面层。 在另一个实施方案中，界面层可以通过在自然氧化物层上进行氮气或臭氧处理来制造。 在另一个实施例中，界面层是制造的氧化硅层，从而在可变电阻层和硅电极之间形成改善的扩散势垒。 在所有实施例中，界面层还钝化硅电极的表面。

公开(公告)号：US08288297B1

公开(公告)日：2012-10-16

申请号：US13224021

申请日：2011-09-01

申请人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiag

发明人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiag

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L45/145 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/0228 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

摘要： Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.

摘要翻译： 本发明的实施例一般涉及非易失性存储器件，例如ReRAM单元，以及用于制造这种存储器件的方法，其包括用于形成金属氧化物膜堆叠的优化的原子层沉积（ALD）工艺。 金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层，每个层具有不同的晶粒结构/尺寸。 设置在金属氧化物层之间的界面有助于氧空位移动。 在许多示例中，与垂直于电极界面延伸的体膜中的晶粒相反，界面是不对齐的晶粒界面，其包含平行于电极界面延伸的许多晶界。 因此，氧空缺在切换期间被捕获和释放，而空位明显损失。 因此，与以前的存储单元的传统的基于氧化铪的堆叠相比，金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。

公开(公告)号：US20120171839A1

公开(公告)日：2012-07-05

申请号：US13395071

申请日：2009-09-18

申请人： Hanhong Chen ,  Nobumichi Fuchigami ,  Imran Hashim ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

发明人： Hanhong Chen ,  Nobumichi Fuchigami ,  Imran Hashim ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC分类号： H01L21/02

CPC分类号： C23C16/45531 ,  C23C16/0272 ,  C23C16/0281 ,  C23C16/405 ,  H01L21/02186 ,  H01L21/02194 ,  H01L21/02197 ,  H01L21/0228 ,  H01L21/02304 ,  H01L27/10852 ,  H01L28/40 ,  H01L28/65 ,  H01L28/75

摘要： This disclosure provides a method of fabricating a semiconductor stack and associated device such as a capacitor and DRAM cell. In particular, a bottom electrode upon which a dielectric layer is to be grown may have a ruthenium-based surface. Lattice matching of the ruthenium surface with the dielectric layer (e.g., titanium oxide, strontium titanate or barium strontium titanate) helps promote the growth of rutile-phase titanium oxide, thereby leading to higher dielectric constant and lower effective oxide thickness. The ruthenium-based material also provides a high work function material, leading to lower leakage. To mitigate nucleation delay associated with the use of ruthenium, an adherence or glue layer based in titanium may be employed. A pretreatment process may be further employed so as to increase effective capacitor plate area, and thus promote even further improvements in dielectric constant and effective oxide thickness (“EOT”).

摘要翻译： 本公开提供了制造半导体堆叠和相关设备（诸如电容器和DRAM单元）的方法。 特别地，要生长电介质层的底部电极可以具有钌基表面。 钌表面与电介质层的晶格匹配（例如氧化钛，钛酸锶钛酸钡或钛酸钡锶）​​有助于促进金红石相二氧化钛的生长，从而导致更高的介电常数和更低的有效氧化物厚度。 钌基材料还提供高功函数材料，导致较低的泄漏。 为了减轻与使用钌有关的成核延迟，可以采用基于钛的粘附层或胶层。 可以进一步采用预处理工艺，以增加有效的电容器板面积，从而进一步提高介电常数和有效的氧化物厚度（“EOT”）。

公开(公告)号：US07968452B2

公开(公告)日：2011-06-28

申请号：US12494702

申请日：2009-06-30

申请人： Hanhong Chen ,  Pragati Kumar ,  Sunil Shanker ,  Edward Haywood ,  Sandra Malhotra ,  Imran Hashim ,  Nobi Fuchigami ,  Prashant Phatak ,  Monica Mathur

发明人： Hanhong Chen ,  Pragati Kumar ,  Sunil Shanker ,  Edward Haywood ,  Sandra Malhotra ,  Imran Hashim ,  Nobi Fuchigami ,  Prashant Phatak ,  Monica Mathur

IPC分类号： H01L21/4763

CPC分类号： H01G4/1218 ,  C23C16/405 ,  C23C16/45531 ,  C23C16/56 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02312 ,  H01L21/02337 ,  H01L21/3141 ,  H01L21/3142 ,  H01L28/40

摘要： This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle. The process provides high deposition rates, and the resulting MIM structure has substantially no x-ray diffraction peaks associated with anatase-phase titanium oxide.

摘要翻译： 本公开内容提供（a）制造基于氧化钛的氧化物层（例如电介质层）的方法，以抑制锐钛矿相氧化钛的形成和（b）相关的器件和结构。 使用底部电极（或其他基底）的臭氧预处理随后进行ALD工艺来形成金属 - 绝缘体 - 金属（“MIM”）堆叠，以形成根植于含酰胺前体的TiO 2电介质。 在ALD工艺之后，氧化退火工艺的应用热度足以愈合TiO2电介质中的缺陷，并降低TiO2和电极之间的界面态; 选择退火温度以使其不那么热，以致破坏BEL表面粗糙度。 进一步的工艺变型可以包括在ALD工艺期间掺杂氧化钛，基座加热至275-300摄氏度，对于BEL使用铂或钌，对于每个ALD工艺循环使用多个试剂脉冲的臭氧。 该方法提供高沉积速率，并且所得MIM结构基本上没有与锐钛矿相氧化钛相关的x射线衍射峰。