公开(公告)号：US20240065014A1

公开(公告)日：2024-02-22

申请号：US18382693

申请日：2023-10-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Takeyoshi WATABE ,  Tomohiro KUBOTA ,  Airi UEDA ,  Satoshi SEO ,  Nobuharu OHSAWA ,  Yuko KUBOTA

IPC: H10K50/115 ,  H10K50/16 ,  H10K50/17 ,  H10K85/60

CPC classification number: H10K50/115 ,  H10K50/16 ,  H10K50/17 ,  H10K85/626

Abstract: A light-emitting apparatus with low power consumption is provided. A light-emitting apparatus including a first light-emitting device and a first color conversion layer. The first light-emitting device includes an anode, a cathode, and an EL layer positioned between the anode and the cathode. The EL layer includes a layer including a material with a refractive index lower than or equal to 1.75 at 467 nm. The first color conversion layer includes a first substance capable of emission by absorbing light. Light emitted from the first light-emitting device enters the first color conversion layer.

公开(公告)号：US20240055299A1

公开(公告)日：2024-02-15

申请号：US18383086

申请日：2023-10-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Toshihiko TAKEUCHI ,  Tsutomu MURAKAWA ,  Hiroki KOMAGATA ,  Daisuke MATSUBAYASHI ,  Noritaka ISHIHARA ,  Yusuke NONAKA

IPC: H01L21/8234 ,  H01L27/06 ,  H01L27/088 ,  H01L29/786 ,  H10B12/00

CPC classification number: H01L21/8234 ,  H01L27/06 ,  H01L27/088 ,  H01L29/7869 ,  H10B12/00

Abstract: A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided.
The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.

公开(公告)号：US20240053961A1

公开(公告)日：2024-02-15

申请号：US18242603

申请日：2023-09-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Takahiro FUKUTOME

IPC: G06F7/499 ,  G06F7/501 ,  G06F7/57 ,  G06F9/30 ,  G06G7/16

CPC classification number: G06F7/49942 ,  G06F7/501 ,  G06F7/57 ,  G06F9/3001 ,  G06F7/4991 ,  G06G7/16

Abstract: An adder circuit inhibiting overflow is provided. A first memory, a second memory, a third memory, and a fourth memory are included. A step of supplying first data with a sign to the first memory and supplying the first data with a positive sign stored in the first memory, to the second memory; a step of supplying the first data with a negative sign stored in the second memory, to the third memory; a step of generating second data by adding the first data with a positive sign stored in the second memory and the first data with a negative sign stored in the third memory; and a step of storing the second data in the fourth memory are included. When the second data stored in the fourth memory are all second data with a positive sign or all second data with a negative sign, all the second data stored in the fourth memory are added.

公开(公告)号：US20240047468A1

公开(公告)日：2024-02-08

申请号：US18380814

申请日：2023-10-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI

IPC: H01L27/12 ,  H01L21/02 ,  H01L29/786 ,  G02F1/1333 ,  G02F1/1368 ,  G02F1/1362 ,  G09G3/36

CPC classification number: H01L27/1225 ,  H01L21/02483 ,  H01L29/7869 ,  H01L29/78609 ,  G02F1/13338 ,  G02F1/1368 ,  G02F1/136286 ,  G09G3/3677 ,  H01L27/1255 ,  G09G3/3648 ,  G09G2310/04 ,  G09G2320/0214 ,  G09G2320/103 ,  G06F3/0412

Abstract: To reduce power consumption and suppress display degradation of a liquid crystal display device. To suppress display degradation due to an external factor such as temperature. A transistor whose channel formation region is formed using an oxide semiconductor layer is used for a transistor provided in each pixel. Note that with the use of a high-purity oxide semiconductor layer, off-state current of the transistor at a room temperature can be 10 aA/μm or less and off-state current at 85° C. can be 100 aA/μm or less. Consequently, power consumption of a liquid crystal display device can be reduced and display degradation can be suppressed. Further, as described above, off-state current of the transistor at a temperature as high as 85° C. can be 100 aA/μm or less. Thus, display degradation of a liquid crystal display device due to an external factor such as temperature can be suppressed.

公开(公告)号：US20240046857A1

公开(公告)日：2024-02-08

申请号：US18380819

申请日：2023-10-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kei TAKAHASHI ,  Susumu KAWASHIMA ,  Koji KUSUNOKI ,  Kazunori WATANABE

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2330/028

Abstract: The power consumption of a display device is reduced. The power consumption of a driver circuit in a display device is reduced. A pixel included in the display device includes a display element. The pixel is configured to have a function of retaining a first voltage corresponding to a first input pulse signal and a function of driving the display element with a third voltage obtained by addition of a second voltage corresponding to a second input pulse signal to the first voltage.

公开(公告)号：US20240038529A1

公开(公告)日：2024-02-01

申请号：US18020288

申请日：2021-08-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yuji EGI ,  Yasuhiro JINBO ,  Hitoshi KUNITAKE

IPC: H01L21/02

CPC classification number: H01L21/0228 ,  H01L21/02178 ,  H01L21/02192 ,  H01L21/02205 ,  H01L21/0234

Abstract: A method for depositing a metal oxide is provided. The deposition method of a metal oxide includes a first step of introducing a first precursor into a first chamber, a second step of introducing a second precursor into the first chamber, a third step of introducing a third precursor into the first chamber, a fourth step of introducing an oxidizer in a plasma state into the first chamber after each of the first step, the second step, and the third step, and a fifth step of performing microwave treatment. Performing each of the first to fourth steps one or more times is regarded as one cycle, and the fifth step is performed in a second chamber after the one cycle is repeated a plurality of times. The first to third precursors are different kinds of precursors, the microwave treatment is performed using an oxygen gas and an argon gas, the metal oxide includes a crystal region, and a c-axis of the crystal region is substantially parallel to a normal vector of a surface where the metal oxide is formed or a normal vector of a surface of the metal oxide.

公开(公告)号：US20240030353A1

公开(公告)日：2024-01-25

申请号：US18376024

申请日：2023-10-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L2924/0002

Abstract: It is an object to provide a semiconductor device with less power consumption as a semiconductor device including a thin film transistor using an oxide semiconductor layer. It is an object to provide a semiconductor device with high reliability as a semiconductor device including a thin film transistor using an oxide semiconductor layer. In the semiconductor device, a gate electrode layer (a gate wiring layer) intersects with a wiring layer which is electrically connected to a source electrode layer or a drain electrode layer with an insulating layer which covers the oxide semiconductor layer of the thin film transistor and a gate insulating layer interposed therebetween. Accordingly, the parasitic capacitance formed by a stacked-layer structure of the gate electrode layer, the gate insulating layer, and the source or drain electrode layer can be reduced, so that low power consumption of the semiconductor device can be realized.

公开(公告)号：US20240029776A1

公开(公告)日：2024-01-25

申请号：US18226823

申请日：2023-07-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Atsushi MIYAGUCHI ,  Yoshiaki OIKAWA

IPC: G11C11/405 ,  G06N3/04 ,  G06N3/063 ,  G06N3/08 ,  H01L29/786 ,  H10B12/00

CPC classification number: G11C11/405 ,  G06N3/04 ,  G06N3/063 ,  G06N3/08 ,  H01L29/7869 ,  H10B12/00

Abstract: A semiconductor device that enables lower power consumption and data storage imitating a human brain is provided. The semiconductor device includes a control unit, a memory unit, and a sensor unit. The memory unit includes a memory circuit and a switching circuit. The memory circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer including a channel formation region with an oxide semiconductor, and a back gate electrode. The control unit has a function of switching a signal supplied to the back gate electrode, in accordance with a signal obtained at the sensor unit.

公开(公告)号：US20240027863A1

公开(公告)日：2024-01-25

申请号：US18231383

申请日：2023-08-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yukie SUZUKI ,  Hideaki KUWABARA ,  Hajime KIMURA

IPC: G02F1/1368 ,  H01L27/12 ,  H01L29/04 ,  H01L29/66 ,  H01L29/786 ,  G02F1/1362 ,  G02F1/1333 ,  G02F1/1339 ,  G02F1/1343

CPC classification number: G02F1/1368 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696 ,  H01L27/1288 ,  G02F1/136286 ,  G02F1/133345 ,  H01L27/1222 ,  H01L29/78678 ,  G02F1/1339 ,  G02F1/134309 ,  H01L29/458

Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

公开(公告)号：US20230420569A1

公开(公告)日：2023-12-28

申请号：US18243691

申请日：2023-09-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masahiro WATANABE ,  Mitsuo MASHIYAMA ,  Kenichi OKAZAKI ,  Motoki NAKASHIMA ,  Hideyuki KISHIDA

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L27/12 ,  H01L21/8234

CPC classification number: H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/66969 ,  H01L27/1229 ,  H01L27/1225 ,  H01L27/1233 ,  H01L21/823412 ,  H01L21/82345 ,  H01L21/823475 ,  H01L29/78672 ,  H01L21/02631

Abstract: The impurity concentration in the oxide semiconductor film is reduced, and a highly reliability can be obtained.