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71.
公开(公告)号:US20150041803A1
公开(公告)日:2015-02-12
申请号:US14451854
申请日:2014-08-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yuta Endo , Kosei Noda , Yuichi Sato
IPC: H01L29/786 , H01L29/10 , H01L21/467 , H01L29/06
CPC classification number: H01L21/02554 , H01L21/02565 , H01L21/02576 , H01L21/02579 , H01L21/31155 , H01L21/461 , H01L21/823437 , H01L21/823857 , H01L29/0653 , H01L29/4908 , H01L29/4933 , H01L29/6659 , H01L29/66969 , H01L29/78603 , H01L29/78606 , H01L29/7869 , H01L29/78696
Abstract: A transistor that is formed using an oxide semiconductor film is provided. A transistor that is formed using an oxide semiconductor film with reduced oxygen vacancies is provided. A transistor having excellent electrical characteristics is provided. A semiconductor device includes a first insulating film, a first oxide semiconductor film, a gate insulating film, and a gate electrode. The first insulating film includes a first region and a second region. The first region is a region that transmits less oxygen than the second region does. The first oxide semiconductor film is provided at least over the second region.
Abstract translation: 提供了使用氧化物半导体膜形成的晶体管。 提供了使用具有减少的氧空位的氧化物半导体膜形成的晶体管。 提供具有优异电特性的晶体管。 半导体器件包括第一绝缘膜,第一氧化物半导体膜,栅极绝缘膜和栅电极。 第一绝缘膜包括第一区域和第二区域。 第一区域是比第二区域透过少氧的区域。 第一氧化物半导体膜至少设置在第二区域上。
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72.
公开(公告)号:US08637348B2
公开(公告)日:2014-01-28
申请号:US13949329
申请日:2013-07-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yuta Endo , Kosei Noda , Toshinari Sasaki
IPC: H01L21/00
CPC classification number: H01L29/66969 , H01L21/02164 , H01L21/02367 , H01L21/02565 , H01L21/02631 , H01L29/66742 , H01L29/78603 , H01L29/78618 , H01L29/7869
Abstract: An insulating layer which releases a large amount of oxygen is used as an insulating layer in contact with a channel region of an oxide semiconductor layer, and an insulating layer which releases a small amount of oxygen is used as an insulating layer in contact with a source region and a drain region of the oxide semiconductor layer. By releasing oxygen from the insulating layer which releases a large amount of oxygen, oxygen deficiency in the channel region and an interface state density between the insulating layer and the channel region can be reduced, so that a highly reliable semiconductor device having small variation in electrical characteristics can be manufactured. The source region and the drain region are provided in contact with the insulating layer which releases a small amount of oxygen, thereby suppressing the increase of the resistance of the source region and the drain region.
Abstract translation: 使用释放大量氧的绝缘层作为与氧化物半导体层的沟道区域接触的绝缘层,并且使用释放少量氧的绝缘层作为与源极接触的绝缘层 区域和氧化物半导体层的漏极区域。 通过从释放大量氧的绝缘层释放氧气,可以减少沟道区域中的氧缺乏以及绝缘层和沟道区域之间的界面态密度,从而可以降低电子变化小的高度可靠的半导体器件 特性可以制造。 源极区域和漏极区域设置成与释放少量氧气的绝缘层接触,从而抑制源极区域和漏极区域的电阻的增加。
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73.
公开(公告)号:US20130240875A1
公开(公告)日:2013-09-19
申请号:US13793605
申请日:2013-03-11
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yuta Endo , Kosei Noda
IPC: H01L29/786 , H01L29/66
CPC classification number: H01L29/78606 , H01L29/66969 , H01L29/78621 , H01L29/7869
Abstract: A semiconductor device in which the parasitic resistance affected by a source and a drain is reduced and the parasitic capacitance is small is provided. The semiconductor device includes a pair of semiconductor layers; a semiconductor film in contact with each of the pair of semiconductor layers; a gate electrode overlapping with the semiconductor film and at least partly overlapping with the pair of semiconductor layers; and a gate insulating film between the semiconductor film and the gate electrode. A region which is in the pair of semiconductor layers and overlaps with the gate electrode and the semiconductor film has higher resistance than regions other than the region in the pair of semiconductor layers.
Abstract translation: 提供了由源极和漏极影响的寄生电阻减小并且寄生电容小的半导体器件。 半导体器件包括一对半导体层; 与所述一对半导体层中的每一个接触的半导体膜; 栅电极与所述半导体膜重叠并且与所述一对半导体层至少部分重叠; 以及在半导体膜和栅电极之间的栅极绝缘膜。 在该对半导体层中与栅电极和半导体膜重叠的区域具有比该对半导体层中的区域以外的区域更高的电阻。
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公开(公告)号:US11901460B2
公开(公告)日:2024-02-13
申请号:US17708084
申请日:2022-03-30
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yuta Endo , Hideomi Suzawa
IPC: H01L27/12 , H01L29/786 , H10B12/00
CPC classification number: H01L29/7869 , H01L27/1225 , H10B12/05 , H10B12/30
Abstract: A semiconductor device that can be highly integrated is provided.
The semiconductor device includes first and second transistors and first and second capacitors. Each of the first and second transistors includes a gate insulator and a gate electrode over an oxide. Each of the first and second capacitors includes a conductor, a dielectric over the conductor, and the oxide. The first and second transistors are provided between the first capacitor and the second capacitor. One of a source and a drain of the first transistor is also used as one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is also used as one electrode of the first capacitor. The other of the source and the drain of the second transistor is also used as one electrode of the second capacitor. The channel lengths of the first and second transistors are larger than the lengths in a direction parallel to short sides of fourth and fifth conductors.-
公开(公告)号:US11211467B2
公开(公告)日:2021-12-28
申请号:US16755208
申请日:2018-10-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Tomoki Hiramatsu , Yusuke Nonaka , Noritaka Ishihara , Shota Sambonsuge , Yasumasa Yamane , Yuta Endo
IPC: H01L29/51 , H01L21/8238
Abstract: A highly reliable semiconductor device is provided. The semiconductor device includes a first insulator; a first oxide provided over the first insulator; a second oxide provided over the first oxide; a first conductor and a second conductor provided apart from each other over the second oxide; a third oxide provided over the second oxide, the first conductor, and the second conductor; a second insulating film provided over the third oxide; and a third conductor provided over the second oxide with the third oxide and the second insulating film positioned therebetween. The third oxide contains a metal element and nitrogen, and the metal element is bonded to nitrogen.
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公开(公告)号:US11183516B2
公开(公告)日:2021-11-23
申请号:US16266263
申请日:2019-02-04
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hideomi Suzawa , Yuta Endo , Kazuya Hanaoka
IPC: H01L27/12 , H01L29/786 , H01L21/475 , H01L21/4757
Abstract: A semiconductor device with reduced parasitic capacitance is provided. The semiconductor device includes a first insulating layer; a first oxide layer over the first insulating layer; a semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer over the semiconductor layer; a second insulating layer over the first insulating layer; a third insulating layer over the second insulating layer, the source electrode layer, and the drain electrode layer; a second oxide layer over the semiconductor layer; a gate insulating layer over the second oxide layer; a gate electrode layer over the gate insulating layer; and a fourth insulating layer over the third insulating layer, the second oxide layer, the gate insulating layer, and the gate electrode layer.
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公开(公告)号:US10522691B2
公开(公告)日:2019-12-31
申请号:US16030928
申请日:2018-07-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Yuta Endo , Yoko Tsukamoto
IPC: H01L29/12 , H01L29/786 , H01L29/24 , H01L21/336 , H01L21/225 , H01L29/76 , H01L21/54 , H01L29/423
Abstract: To provide a miniaturized transistor having highly stable electrical characteristics. Furthermore, also in a semiconductor device including the transistor, high performance and high reliability are achieved. The transistor includes, over a substrate, a conductor, an oxide semiconductor, and an insulator. The oxide semiconductor includes a first region and a second region. The resistance of the second region is lower than that of the first region. The entire surface of the first region in the oxide semiconductor is surrounded in all directions by the conductor with the insulator interposed therebetween.
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公开(公告)号:US10522397B2
公开(公告)日:2019-12-31
申请号:US16354394
申请日:2019-03-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yuta Endo , Hideomi Suzawa , Sachiaki Tezuka , Tetsuhiro Tanaka , Toshiya Endo , Mitsuhiro Ichijo
IPC: H01L21/768 , H01L29/786 , H01L29/66 , H01L21/8234 , H01L21/02 , H01L21/8258 , H01L29/423 , H01L29/49 , H01L27/06 , H01L27/092 , H01L27/12
Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.
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公开(公告)号:US10367096B2
公开(公告)日:2019-07-30
申请号:US15814925
申请日:2017-11-16
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Shinya Sasagawa , Satoru Okamoto , Motomu Kurata , Yuta Endo
IPC: H01L29/10 , H01L29/12 , H01L29/786 , H01L29/66 , H01L29/423 , H01L27/12 , H01L21/8258 , H01L27/06 , H01L21/66
Abstract: A semiconductor device which includes a transistor having a miniaturized structure is provided. A first insulator is provided over a stack in which a semiconductor, a first conductor, and a second conductor are stacked in this order. Over the first insulator, an etching mask is formed. Using the etching mask, the first insulator and the second conductor are etched until the first conductor is exposed. After etching the first conductor until the semiconductor is exposed so as to form a groove having a smaller width than the second conductor, a second insulator and a third conductor are formed sequentially.
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公开(公告)号:US10141344B2
公开(公告)日:2018-11-27
申请号:US15811879
申请日:2017-11-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kiyoshi Kato , Yuta Endo , Ryo Tokumaru
IPC: H01L27/12 , H01L21/02 , H01L21/443 , H01L21/4757 , H01L27/108 , H01L29/10 , H01L29/786 , H01L29/423
Abstract: A semiconductor device having favorable electric characteristics is provided. The semiconductor device includes a first transistor and second transistor. The first transistor includes a first conductor over a substrate; a first insulator thereover; a first oxide thereover; a second insulator over thereover; a second conductor including a side surface substantially aligned with a side surface of the second insulator and being over the second insulator; a third insulator including a side surface substantially aligned with a side surface of the second conductor and being over the second conductor; a fourth insulator in contact with a side surface of the second insulator, a side surface of the second conductor, and a side surface of the third insulator; and a fifth insulator in contact with the first oxide and the fourth insulator. The second transistor includes a third conductor; a fourth conductor at least part of which overlaps with the third conductor; and a second oxide between the third conductor and the fourth conductor. The third conductor and the fourth conductor are electrically connected to the first conductor.
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