公开(公告)号：US20090189238A1

公开(公告)日：2009-07-30

申请号：US12364342

申请日：2009-02-02

申请人： Kyle K. Kirby ,  Salman Akram ,  William M. Hiatt

发明人： Kyle K. Kirby ,  Salman Akram ,  William M. Hiatt

IPC分类号： H01L31/02 ,  H01L21/50 ,  H01L31/0232

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L27/14618 ,  H01L27/14625 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H04N5/2257 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends partially through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending partially through the substrate to the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, a conductive layer deposited onto at least a portion of the dielectric liner, a wetting agent deposited onto at least a portion of the conductive layer, and a conductive fill material deposited into the passage and electrically coupled to the bond-pad.

摘要翻译： 本文公开了微电子成像器，用于封装微电子成像器的方法，以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中，微电子成像管芯可以包括微电子衬底，集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连部分地穿过衬底延伸并与焊盘接触。 互连可以包括部分地延伸穿过衬底到接合焊盘的通道，沉积到通道中并与衬底接触的介电衬垫，沉积在电介质衬垫的至少一部分上的导电层，沉积在电介质衬垫上的润湿剂 所述导电层的至少一部分以及沉积到所述通道中并电耦合到所述接合焊盘的导电填充材料。

公开(公告)号：US07294897B2

公开(公告)日：2007-11-13

申请号：US10879398

申请日：2004-06-29

申请人： Salman Akram ,  Charles M. Watkins ,  Kyle K. Kirby ,  Alan G. Wood ,  William M. Hiatt

发明人： Salman Akram ,  Charles M. Watkins ,  Kyle K. Kirby ,  Alan G. Wood ,  William M. Hiatt

IPC分类号： H01L31/203

CPC分类号： H01L27/146 ,  H01L21/76898 ,  H01L27/14618 ,  H01L27/148 ,  H01L31/02016 ,  H01L2224/48227 ,  H01L2924/01046 ,  H01L2924/01066 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/00

摘要： Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

摘要翻译： 本文公开了微电子成像器，用于封装微电子成像器的方法，以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中，微电子成像管芯可以包括微电子衬底，集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道，沉积到通道中并与衬底接触的电介质衬垫，沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。

公开(公告)号：US08748311B2

公开(公告)日：2014-06-10

申请号：US13337943

申请日：2011-12-27

申请人： William M. Hiatt ,  Kyle K. Kirby

发明人： William M. Hiatt ,  Kyle K. Kirby

IPC分类号： H01L21/44

CPC分类号： H01L24/14 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49816 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2225/06506 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： Microelectronic devices and methods for filling vias and forming conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece having a plurality of dies and at least one passage extending through the microfeature workpiece from a first side of the microfeature workpiece to an opposite second side of the microfeature workpiece. The method can further include forming a conductive plug in the passage adjacent to the first side of the microelectronic workpiece, and depositing conductive material in the passage to at least generally fill the passage from the conductive plug to the second side of the microelectronic workpiece.

摘要翻译： 本文公开了用于在微特征工件和模具中填充通孔并形成导电互连的微电子器件和方法。 在一个实施例中，一种方法包括提供具有多个模具的微特征工件和从微特征工件的第一侧延伸穿过微特征工件的至少一个通道到微特征工件的相对的第二侧。 该方法还可以包括在邻近微电子工件的第一侧的通道中形成导电插塞，以及在通道中沉积导电材料，以至少大体上填充从导电插头到微电子工件的第二侧的通道。

公开(公告)号：US08703518B2

公开(公告)日：2014-04-22

申请号：US13236907

申请日：2011-09-20

申请人： Kyle K. Kirby ,  Salman Akram ,  William M. Hiatt

发明人： Kyle K. Kirby ,  Salman Akram ,  William M. Hiatt

IPC分类号： H01L21/60 ,  H01L31/18 ,  H01L31/0224

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L27/14618 ,  H01L27/14625 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H04N5/2257 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends partially through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending partially through the substrate to the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, a conductive layer deposited onto at least a portion of the dielectric liner, a wetting agent deposited onto at least a portion of the conductive layer, and a conductive fill material deposited into the passage and electrically coupled to the bond-pad.

摘要翻译： 本文公开了微电子成像器，用于封装微电子成像器的方法，以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中，微电子成像管芯可以包括微电子衬底，集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连部分地穿过衬底延伸并与焊盘接触。 互连可以包括部分地延伸穿过衬底到接合焊盘的通道，沉积到通道中并与衬底接触的介电衬垫，沉积在电介质衬垫的至少一部分上的导电层，沉积在电介质衬垫上的润湿剂 所述导电层的至少一部分以及沉积到所述通道中并电耦合到所述接合焊盘的导电填充材料。

公开(公告)号：US08253230B2

公开(公告)日：2012-08-28

申请号：US12121654

申请日：2008-05-15

申请人： Jeffery W. Janzen ,  Russell D. Slifer, legal representative ,  Michael Chaine ,  Kyle K. Kirby ,  William M. Hiatt

发明人： Jeffery W. Janzen ,  Michael Chaine ,  Kyle K. Kirby ,  William M. Hiatt

IPC分类号： H01L21/70 ,  H01L23/02 ,  H01L23/52

CPC分类号： H01L23/481 ,  H01L21/50 ,  H01L21/76898 ,  H01L21/82 ,  H01L23/52 ,  H01L23/525 ,  H01L23/60 ,  H01L23/62 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0248 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06593 ,  H01L2924/13034 ,  H01L2924/00014

摘要： Pass-through 3D interconnects and microelectronic dies and systems of stacked dies that include such interconnects to disable electrical connections are disclosed herein. In one embodiment, a system of stacked dies includes a first microelectronic die having a backside, an interconnect extending through the first die to the backside, an integrated circuit electrically coupled to the interconnect, and a first electrostatic discharge (ESD) device electrically isolated from the interconnect. A second microelectronic die has a front side coupled to the backside of the first die, a metal contact at the front side electrically coupled to the interconnect, and a second ESD device electrically coupled to the metal contact. In another embodiment, the first die further includes a substrate carrying the integrated circuit and the first ESD device, and the interconnect is positioned in the substrate to disable an electrical connection between the first ESD device and the interconnect.

摘要翻译： 本文公开了直通3D互连和微电子管芯以及包括这种互连以禁用电连接的堆叠管芯的系统。 在一个实施例中，堆叠管芯的系统包括具有背面的第一微电子管芯，经由第一管芯延伸到背面的互连件，电耦合到互连的集成电路，以及与第一静电放电（ESD）器件电隔离的第一静电放电 互连。 第二微电子管芯具有耦合到第一管芯的背侧的前侧，电连接到互连的前侧的金属接触件和电耦合到金属接触件的第二ESD器件。 在另一实施例中，第一管芯还包括承载集成电路和第一ESD器件的衬底，并且互连件位于衬底中，以禁止第一ESD器件和互连件之间的电连接。

公开(公告)号：US20120009717A1

公开(公告)日：2012-01-12

申请号：US13236907

申请日：2011-09-20

申请人： Kyle K. Kirby ,  Salman Akram ,  William M. Hiatt

发明人： Kyle K. Kirby ,  Salman Akram ,  William M. Hiatt

IPC分类号： H01L31/0224

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L27/14618 ,  H01L27/14625 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H04N5/2257 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends partially through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending partially through the substrate to the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, a conductive layer deposited onto at least a portion of the dielectric liner, a wetting agent deposited onto at least a portion of the conductive layer, and a conductive fill material deposited into the passage and electrically coupled to the bond-pad.

摘要翻译： 本文公开了微电子成像器，用于封装微电子成像器的方法，以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中，微电子成像管芯可以包括微电子衬底，集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连部分地穿过衬底延伸并与焊盘接触。 互连可以包括部分地延伸穿过衬底到接合焊盘的通道，沉积到通道中并与衬底接触的介电衬垫，沉积在电介质衬垫的至少一部分上的导电层，沉积在电介质衬垫上的润湿剂 所述导电层的至少一部分以及沉积到所述通道中并电耦合到所述接合焊盘的导电填充材料。

公开(公告)号：US07858429B2

公开(公告)日：2010-12-28

申请号：US11863087

申请日：2007-09-27

申请人： Salman Akram ,  Charles M. Watkins ,  Kyle K. Kirby ,  Alan G. Wood ,  William M. Hiatt

发明人： Salman Akram ,  Charles M. Watkins ,  Kyle K. Kirby ,  Alan G. Wood ,  William M. Hiatt

IPC分类号： H01L21/00 ,  G02F1/13

CPC分类号： H01L27/146 ,  H01L21/76898 ,  H01L27/14618 ,  H01L27/148 ,  H01L31/02016 ,  H01L2224/48227 ,  H01L2924/01046 ,  H01L2924/01066 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/00

摘要： Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

摘要翻译： 本文公开了微电子成像器，用于封装微电子成像器的方法，以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中，微电子成像管芯可以包括微电子衬底，集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道，沉积到通道中并与衬底接触的电介质衬垫，沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。

公开(公告)号：US20090283898A1

公开(公告)日：2009-11-19

申请号：US12121654

申请日：2008-05-15

申请人： Jeffery W. Janzen ,  Michael Chaine ,  Kyle K. Kirby ,  William M. Hiatt ,  Russell D. Slifer

发明人： Jeffery W. Janzen ,  Michael Chaine ,  Kyle K. Kirby ,  William M. Hiatt ,  Russell D. Slifer

IPC分类号： H01L23/52 ,  H01L23/538 ,  H01L21/50 ,  H01L21/768

CPC分类号： H01L23/481 ,  H01L21/50 ,  H01L21/76898 ,  H01L21/82 ,  H01L23/52 ,  H01L23/525 ,  H01L23/60 ,  H01L23/62 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0248 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06593 ,  H01L2924/13034 ,  H01L2924/00014

摘要： Pass-through 3D interconnects and microelectronic dies and systems of stacked dies that include such interconnects to disable electrical connections are disclosed herein. In one embodiment, a system of stacked dies includes a first microelectronic die having a backside, an interconnect extending through the first die to the backside, an integrated circuit electrically coupled to the interconnect, and a first electrostatic discharge (ESD) device electrically isolated from the interconnect. A second microelectronic die has a front side coupled to the backside of the first die, a metal contact at the front side electrically coupled to the interconnect, and a second ESD device electrically coupled to the metal contact. In another embodiment, the first die further includes a substrate carrying the integrated circuit and the first ESD device, and the interconnect is positioned in the substrate to disable an electrical connection between the first ESD device and the interconnect.

摘要翻译： 本文公开了直通3D互连和微电子管芯以及包括这种互连以禁用电连接的堆叠管芯的系统。 在一个实施例中，堆叠管芯的系统包括具有背面的第一微电子管芯，经由第一管芯延伸到背面的互连件，电耦合到互连的集成电路，以及与第一静电放电（ESD）器件电隔离的第一静电放电 互连。 第二微电子管芯具有耦合到第一管芯的背侧的前侧，电连接到互连的前侧的金属接触件和电耦合到金属接触件的第二ESD器件。 在另一实施例中，第一管芯还包括承载集成电路和第一ESD器件的衬底，并且互连件位于衬底中，以禁止第一ESD器件和互连件之间的电连接。

公开(公告)号：US07425499B2

公开(公告)日：2008-09-16

申请号：US10925501

申请日：2004-08-24

申请人： Steven D. Oliver ,  Kyle K. Kirby ,  William M. Hiatt

发明人： Steven D. Oliver ,  Kyle K. Kirby ,  William M. Hiatt

IPC分类号： H01L21/44

CPC分类号： H01L21/76898

摘要： Methods for forming interconnects in blind vias or other types of holes, and microelectronic workpieces having such interconnects. The blind vias can be formed by first removing the bulk of the material from portions of the back side of the workpiece without thinning the entire workpiece. The bulk removal process, for example, can form a first opening that extends to an intermediate depth within the workpiece, but does not extend to the contact surface of the electrically conductive element. After forming the first opening, a second opening is formed from the intermediate depth in the first opening to the contact surface of the conductive element. The second opening has a second width less than the first width of the first opening. This method further includes filling the blind vias with a conductive material and subsequently thinning the workpiece from the exterior side until the cavity is eliminated.

摘要翻译： 用于在盲孔或其它类型的孔中形成互连的方法，以及具有这种互连的微电子工件。 盲孔可以通过首先从工件的后侧的部分去除大部分材料而不使整个工件变薄来形成。 散装移除过程例如可以形成延伸到工件内的中间深度但不延伸到导电元件的接触表面的第一开口。 在形成第一开口之后，从第一开口的中间深度到导电元件的接触表面形成第二开口。 第二开口具有小于第一开口的第一宽度的第二宽度。 该方法还包括用导电材料填充盲孔，随后从外侧使工件变薄直到空腔被消除。

公开(公告)号：US07262134B2

公开(公告)日：2007-08-28

申请号：US11218243

申请日：2005-09-01

申请人： Kyle K. Kirby ,  William M. Hiatt ,  Richard L. Stocks

发明人： Kyle K. Kirby ,  William M. Hiatt ,  Richard L. Stocks

IPC分类号： H01L21/44

CPC分类号： H01L21/76898 ,  H01L21/76868 ,  H01L21/76873 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

摘要： Methods for forming interconnects in microfeature workpieces, and microfeature workpieces having such interconnects are disclosed herein. In one embodiment, a method of forming an interconnect in a microfeature workpiece includes forming a hole extending through a terminal and a dielectric layer to at least an intermediate depth in a substrate of a workpiece. The hole has a first lateral dimension in the dielectric layer and a second lateral dimension in the substrate proximate to an interface between the dielectric layer and the substrate. The second lateral dimension is greater than the first lateral dimension. The method further includes constructing an electrically conductive interconnect in at least a portion of the hole and in electrical contact with the terminal.