Systems and methods for testing microfeature devices
    3.
    发明授权
    Systems and methods for testing microfeature devices 有权
    用于测试微功能设备的系统和方法

    公开(公告)号:US07385412B2

    公开(公告)日:2008-06-10

    申请号:US11409060

    申请日:2006-04-24

    IPC分类号: G01R31/02 G01R31/26 H01L27/00

    CPC分类号: G01R31/2635 G01R31/2831

    摘要: Systems and methods for testing microelectronic imagers and microfeature devices are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece including a substrate having a front side, a backside, and a plurality of microelectronic dies. The individual dies include an integrated circuit and a plurality of contact pads at the backside of the substrate operatively coupled to the integrated circuit. The method includes contacting individual contact pads with corresponding pins of a probe card. The method further includes testing the dies. In another embodiment, the individual dies can further comprise an image sensor at the front side of the substrate and operatively coupled to the integrated circuit. The image sensors are illuminated while the dies are tested.

    摘要翻译: 本文公开了用于测试微电子成像器和微特征器件的系统和方法。 在一个实施例中,一种方法包括提供微功能工件,其包括具有正面,背面和多个微电子管芯的衬底。 各个管芯包括集成电路和在衬底的背面可操作地耦合到集成电路的多个接触焊盘。 该方法包括使各个接触垫与探针卡的相应引脚接触。 该方法还包括测试模具。 在另一个实施例中,各个管芯还可以包括在衬底的前侧的图像传感器,并可操作地耦合到集成电路。 在测试模具时,图像传感器被照亮。

    Packaged microelectronic imagers and methods of packaging microelectronic imagers
    5.
    发明授权
    Packaged microelectronic imagers and methods of packaging microelectronic imagers 有权
    封装的微电子成像器和包装微电子成像器的方法

    公开(公告)号:US08035179B2

    公开(公告)日:2011-10-11

    申请号:US12364342

    申请日:2009-02-02

    IPC分类号: H01L21/00

    摘要: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends partially through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending partially through the substrate to the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, a conductive layer deposited onto at least a portion of the dielectric liner, a wetting agent deposited onto at least a portion of the conductive layer, and a conductive fill material deposited into the passage and electrically coupled to the bond-pad.

    摘要翻译: 本文公开了微电子成像器,用于封装微电子成像器的方法,以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中,微电子成像管芯可以包括微电子衬底,集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连部分地穿过衬底延伸并与焊盘接触。 互连可以包括部分地延伸穿过衬底到接合焊盘的通道,沉积到通道中并与衬底接触的介电衬垫,沉积在电介质衬垫的至少一部分上的导电层,沉积在电介质衬垫上的润湿剂 所述导电层的至少一部分以及沉积到所述通道中并电耦合到所述接合焊盘的导电填充材料。

    PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS
    6.
    发明申请
    PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS 有权
    包装微电子图像和包装微电子图像的方法

    公开(公告)号:US20110089539A1

    公开(公告)日:2011-04-21

    申请号:US12977686

    申请日:2010-12-23

    IPC分类号: H01L23/544 H01L23/48

    摘要: Methods for forming electrically conductive through-wafer interconnects in microelectronic devices and microelectronic devices are disclosed herein. In one embodiment, a microelectronic device can include a monolithic microelectronic substrate with an integrated circuit has a front side with integrated circuit interconnects thereon. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

    摘要翻译: 本文公开了在微电子器件和微电子器件中形成导电晶片间互连的方法。 在一个实施例中,微电子器件可以包括具有集成电路的单片微电子衬底,其前侧具有集成电路互连。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道,沉积到通道中并与衬底接触的电介质衬垫,沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。

    Methods for thinning semiconductor substrates that employ support structures formed on the substrates
    7.
    发明授权
    Methods for thinning semiconductor substrates that employ support structures formed on the substrates 有权
    减薄采用在基板上形成的支撑结构的半导体衬底的方法

    公开(公告)号:US07713841B2

    公开(公告)日:2010-05-11

    申请号:US10666742

    申请日:2003-09-19

    IPC分类号: H01L21/46

    摘要: A support structure for use with a semiconductor substrate in thinning, or backgrinding, thereof, as well as during post-thinning processing of the semiconductor substrate includes a portion which extends substantially along and around an outer periphery of the semiconductor substrate to impart the thinned semiconductor substrate with rigidity. The support structure may be configured as a ring or as a member which substantially covers an active surface of the semiconductor substrate and forms a protective structure over each semiconductor device carried by the active surface. Assemblies that include the support structure and a semiconductor substrate are also within the scope of the present invention, as are methods for forming the support structures and thinning and post-thinning processes that include use of the support structures.

    摘要翻译: 在半导体衬底的薄化或后研磨以及后稀化处理期间与半导体衬底一起使用的支撑结构包括基本上沿半导体衬底的外周延伸并且围绕半导体衬底的外周延伸的部分,以使薄化半导体 基板具有刚性。 支撑结构可以被配置为环或作为基本上覆盖半导体衬底的有源表面并且在由有源表面承载的每个半导体器件上形成保护结构的构件。 包括支撑结构和半导体衬底的组件也在本发明的范围内,形成支撑结构的方法和包括使用支撑结构的减薄和后变薄工艺也是如此。

    PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS
    10.
    发明申请
    PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS 有权
    包装微电子图像和包装微电子图像的方法

    公开(公告)号:US20090189238A1

    公开(公告)日:2009-07-30

    申请号:US12364342

    申请日:2009-02-02

    摘要: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends partially through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending partially through the substrate to the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, a conductive layer deposited onto at least a portion of the dielectric liner, a wetting agent deposited onto at least a portion of the conductive layer, and a conductive fill material deposited into the passage and electrically coupled to the bond-pad.

    摘要翻译: 本文公开了微电子成像器,用于封装微电子成像器的方法,以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中,微电子成像管芯可以包括微电子衬底,集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连部分地穿过衬底延伸并与焊盘接触。 互连可以包括部分地延伸穿过衬底到接合焊盘的通道,沉积到通道中并与衬底接触的介电衬垫,沉积在电介质衬垫的至少一部分上的导电层,沉积在电介质衬垫上的润湿剂 所述导电层的至少一部分以及沉积到所述通道中并电耦合到所述接合焊盘的导电填充材料。