公开(公告)号：US20150274516A1

公开(公告)日：2015-10-01

申请号：US14182659

申请日：2014-02-18

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Inventor： Eric OLLIER

IPC: B81C1/00

CPC classification number: B81C1/00515 ,  B81C1/00206 ,  B81C1/00412 ,  B81C1/00626 ,  B81C2201/0114 ,  B81C2201/0115 ,  B81C2201/038

Abstract: Process for fabrication of a micromechanical and/or nanomechanical structure comprising the following steps, starting from an element comprising a support substrate and a sacrificial layer: a) formation of a first layer, at least part of which is porous, b) formation on the first layer of a layer made of one (or several) materials providing the mechanical properties of the structure, called the intermediate layer, c) formation on the intermediate layer of a second layer, at least part of which is porous, d) formation of said structure in the stack composed of the first layer, the intermediate layer and the second layer, e) release of said structure by at least partial removal of the sacrificial layer.

Abstract translation: 制造微机械和/或纳米机械结构的方法，包括以下步骤：从包括支撑基底和牺牲层的元件开始：a）形成第一层，其中至少一部分是多孔的，b）在 第一层由一种（或多种）材料制成，提供称为中间层的结构的机械性能，c）在第二层的中间层上形成，其中至少一部分是多孔的，d）形成 由第一层，中间层和第二层构成的堆叠中的所述结构，e）通过至少部分去除牺牲层来释放所述结构。

公开(公告)号：US20150115453A1

公开(公告)日：2015-04-30

申请号：US14591896

申请日：2015-01-07

Applicant: GLOBALFOUNDRIES Singapore Pte.Ltd.

Inventor： Rama Krishna KOTLANKA ,  Rakesh KUMAR ,  Premachandran CHIRAYARIKATHUVEEDU SANKARAPILLAI ,  Huamao LIN ,  Pradeep YELEHANKA

IPC: B81B7/00 ,  H01L23/522 ,  H01L23/48

CPC classification number: B81B7/0006 ,  B81C1/00269 ,  B81C3/001 ,  B81C2201/0115 ,  H01L21/50 ,  H01L23/481 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A bonded device having at least one porosified surface is disclosed. The porosification process introduces nanoporous holes into the microstructure of the bonding surfaces of the devices. The material property of a porosified material is softer as compared to a non-porosified material. For the same bonding conditions, the use of the porosified bonding surfaces enhances the bond strength of the bonded interface as compared to the non-porosified material.

Abstract translation: 公开了具有至少一个孔隙化表面的粘合装置。 孔化过程将纳米多孔孔引入装置的结合表面的微结构中。 与非孔隙化材料相比，孔化材料的材料性质更软。 对于相同的接合条件，与非孔隙化材料相比，使用孔隙化粘合表面增强了粘结界面的粘合强度。

公开(公告)号：USRE44995E1

公开(公告)日：2014-07-08

申请号：US13855925

申请日：2013-04-03

Applicant: Robert Bosch GmbH

Inventor： Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Frank Schaefer

IPC: H01L21/302 ,  B81C1/00

CPC classification number: G01L9/0042 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C1/00047 ,  B81C1/00595 ,  B81C2201/0115 ,  G01L9/0045 ,  H01L21/3063

Abstract: A method for producing a semiconductor component includes forming an n-doped layer in a p-doped layer of the semiconductor component, wherein the n-doped layer comprises at least one of: a sieve-like layer or a network-like layer. The method also includes porously etching the p-doped layer between the material of the n-doped layer to form a top electrode, and forming a cavity below the n-doped layer.

Abstract translation: 一种制造半导体部件的方法包括在所述半导体部件的p掺杂层中形成n掺杂层，其中所述n掺杂层包括以下中的至少一种：筛状层或网状层。 该方法还包括在n掺杂层的材料之间对p-掺杂层进行腐蚀蚀刻以形成顶部电极，以及在n-掺杂层下方形成空腔。

公开(公告)号：US08470689B2

公开(公告)日：2013-06-25

申请号：US13293652

申请日：2011-11-10

Applicant: Sébastien Desplobain ,  Frederic-Xavier Gaillard ,  Yves Morand ,  Fabrice Nemouchi

Inventor： Sébastien Desplobain ,  Frederic-Xavier Gaillard ,  Yves Morand ,  Fabrice Nemouchi

IPC: H01L21/30

CPC classification number: H01L21/306 ,  B81C1/0038 ,  B81C2201/0109 ,  B81C2201/0115

Abstract: The method for forming a multilayer structure on a substrate comprises providing a stack successively comprising an electron hole blocking layer, a first layer made from N-doped semiconductor material having a dopant concentration greater than or equal to 1018 atoms/cm3 or P-doped semiconductor material, and a second layer made from semiconductor material of different nature. A lateral electric contact pad is made between the first layer and the substrate, and the material of the first layer is subjected to anodic treatment in an electrolyte.

Abstract translation: 在衬底上形成多层结构的方法包括提供连续包含电子空穴阻挡层的叠层，由掺杂浓度大于或等于1018原子/ cm3的N掺杂半导体材料制成的第一层或P掺杂半导体 材料和由不同性质的半导体材料制成的第二层。 在第一层和衬底之间形成横向电接触垫，并且在电解质中对第一层的材料进行阳极处理。

公开(公告)号：US20130137245A1

公开(公告)日：2013-05-30

申请号：US13688746

申请日：2012-11-29

Applicant: Commissariat a L'energie atomique et aux energies alternatives

Inventor： Philippe ROBERT

IPC: H01L21/20

CPC classification number: H01L21/20 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81C1/00626 ,  B81C2201/0115 ,  B81C2201/019 ,  G01P15/0802

Abstract: A method for making a structure comprising an active part comprising at least two layers from a first single crystal silicon substrate, said method comprising the steps of: a) making at least one porous silicon zone in the first substrate, b) making an epitaxial growth deposition of a single crystal silicon layer on the entire surface of the first substrate and the surface of the porous silicon zone, c) machining the epitaxially grown single crystal layer at the porous silicon zone to make a first suspended zone, d) removing or oxidizing the porous silicon, e) depositing a sacrificial layer being selective towards silicon, f) machining the first substrate, g) releasing the suspended zones by withdrawing the sacrificial layer.

Abstract translation: 一种用于制造包括由第一单晶硅衬底至少包含两层的有源部分的结构的方法，所述方法包括以下步骤：a）在所述第一衬底中制备至少一个多孔硅区，b）制备外延生长 在第一基板的整个表面和多孔硅区域的表面上沉积单晶硅层，c）在多孔硅区域加工外延生长的单晶层以制成第一悬浮区，d）去除或氧化 多孔硅，e）沉积对硅有选择性的牺牲层，f）加工第一衬底，g）通过抽出牺牲层来释放悬浮区。

公开(公告)号：US20110001200A1

公开(公告)日：2011-01-06

申请号：US12817937

申请日：2010-06-17

Applicant: Karl-Heinz Kraft ,  Simon Armbruster ,  Arnim Hoechst

Inventor： Karl-Heinz Kraft ,  Simon Armbruster ,  Arnim Hoechst

IPC: H01L29/84 ,  H01L21/02

CPC classification number: B81C1/00158 ,  B81C2201/0115 ,  B81C2201/0191

Abstract: A method for manufacturing a micromechanical component and the micromechanical component produced thereby. This component is preferably a diaphragm or a diaphragm layer which is independently produced for the purpose of subsequent assembly with other components.

Abstract translation: 一种制造微机械部件的方法和由此制造的微机械部件。 该部件优选是隔膜或隔膜层，其独立地用于随后与其它部件组装的目的。

公开(公告)号：US07843025B2

公开(公告)日：2010-11-30

申请号：US12359904

申请日：2009-01-26

Applicant: Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

Inventor： Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

IPC: H01L21/00

CPC classification number: B81B3/007 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C1/00658 ,  B81C2201/0115 ,  B81C2201/0116 ,  B81C2201/0136

Abstract: A manufacturing method for a micromechanical semiconductor element includes providing on a semiconductor substrate a patterned stabilizing element having at least one opening. The opening is arranged such that it allows access to a first region in the semiconductor substrate, the first region having a first doping. Furthermore, a selective removal of at least a portion of the semiconductor material having the first doping out of the first region of the semiconductor substrate is provided. In addition, a membrane is produced above the first region using a first epitaxy layer applied on the stabilizing element. In a further method step, at least a portion of the first region is used to produce a cavity underneath the stabilizing element. In this manner, the present invention provides for the production of the patterned stabilizing element by means of a second epitaxy layer, which is applied on the semiconductor substrate.

Abstract translation: 微机电半导体元件的制造方法包括在半导体衬底上提供具有至少一个开口的图案化稳定元件。 开口被布置成使得其允许接近半导体衬底中的第一区域，第一区域具有第一掺杂。 此外，提供了选择性地去除半导体衬底的第一区域中具有第一掺杂的半导体材料的至少一部分。 此外，使用施加在稳定元件上的第一外延层，在第一区域上方产生膜。 在另一方法步骤中，第一区域的至少一部分用于在稳定元件下方产生空腔。 以这种方式，本发明提供了通过施加在半导体衬底上的第二外延层来生产图案化的稳定元件。

公开(公告)号：US20100294710A1

公开(公告)日：2010-11-25

申请号：US12308522

申请日：2007-05-04

Applicant: Tino Fuchs ,  Christina Leinenbach

Inventor： Tino Fuchs ,  Christina Leinenbach

IPC: B32B5/16 ,  C23F1/00 ,  C23C16/50 ,  B01D69/00 ,  B01D63/08 ,  G01N33/00

CPC classification number: B81C1/0069 ,  B01D61/243 ,  B01D67/003 ,  B01D67/0058 ,  B01D71/02 ,  B01D2323/35 ,  B01D2325/028 ,  B01D2325/08 ,  B01D2325/26 ,  B81B2201/10 ,  B81C2201/0115 ,  Y10T428/24893

Abstract: A method for producing a component, and a component, in particular a micromechanical and/or microfluidic and/or microelectronic component, is provided, the component including at least one patterned material region, and in a first step the patterned material region is produced in that microparticles of a first material are embedded in a matrix of a second material, and in a second step the patterned material region is rendered porous by etching using a dry etching method or a gas-phase etching method.

Abstract translation: 提供了一种用于制造组件和组件，特别是微机械和/或微流体和/或微电子部件的方法，所述部件包括至少一个图案化材料区域，并且在第一步骤中，图案化材料区域 将第一材料的微粒嵌入第二材料的基体中，在第二步骤中，通过使用干蚀刻法或气相蚀刻法蚀刻图案化材料区域而使多孔化。

公开(公告)号：US07803646B2

公开(公告)日：2010-09-28

申请号：US10544821

申请日：2003-11-06

Applicant: Frank Fischer ,  Thorsten Pannek ,  Lars Metzger

Inventor： Frank Fischer ,  Thorsten Pannek ,  Lars Metzger

IPC: H01L21/00

CPC classification number: B81C1/0069 ,  B81C2201/0115

Abstract: A method for producing a component having a semiconductor substrate, in which porous semiconductor material is generated for the purpose of developing at least one thermally decoupled pattern. In the material that has been rendered porous, a recess or a plurality of recesses is/are etched to produce at least one region that is defined by the one recess or the plurality of recesses and is thermally decoupled. On the at least one region, the pattern to be thermally decoupled is then formed.

Abstract translation: 一种用于制造具有半导体衬底的部件的方法，其中产生多孔半导体材料用于形成至少一个热解耦图形。 在已经被多孔化的材料中，凹陷或多个凹陷被蚀刻以产生由一个凹部或多个凹部限定并且被热解耦的至少一个区域。 在至少一个区域上，形成待热解耦的图案。

公开(公告)号：US07755152B2

公开(公告)日：2010-07-13

申请号：US12490762

申请日：2009-06-24

Applicant: Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

Inventor： Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

IPC: H01L29/84

CPC classification number: B81C1/00182 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115

Abstract: A method for producing a micromechanical diaphragm sensor includes providing a semiconductor substrate having a first region, a diaphragm, and a cavity that is located at least partially below the diaphragm. Above at least one part of the first region, a second region is generated in or on the surface of the semiconductor substrate, with at least one part of the second region being provided as crosspieces. The diaphragm is formed by a deposited sealing layer, and includes at least a part of the crosspieces.

Abstract translation: 微机械振动膜传感器的制造方法包括提供具有至少部分地位于隔膜下方的第一区域，隔膜和空腔的半导体基板。 在第一区域的至少一部分上方，在半导体衬底的表面中或表面上产生第二区域，第二区域的至少一部分被设置为十字形。 隔膜由沉积的密封层形成，并且包括至少一部分挡条。