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公开(公告)号:US20240096619A1
公开(公告)日:2024-03-21
申请号:US18307489
申请日:2023-04-26
Applicant: ASM IP Holding, B.V.
Inventor: Brendan Timothy Padraig Marozas , Rami Khazaka
IPC: H01L21/02 , H01L21/3065
CPC classification number: H01L21/02579 , H01L21/02381 , H01L21/02433 , H01L21/0262 , H01L21/02636 , H01L21/3065
Abstract: Methods and systems for selectively forming phosphorus-doped epitaxial material. The methods can be used to selectively form the phosphorus-doped epitaxial material within a gap from the bottom upward. Exemplary methods can be used to, for example, form source and/or drain regions in field effect transistor devices, such as in gate-all-around field effect transistor devices.
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公开(公告)号:US20240087944A1
公开(公告)日:2024-03-14
申请号:US18243173
申请日:2023-09-07
Applicant: ASM IP Holding B.V.
Inventor: George Brad Jackson , Rohan Rajeev Puranik , Todd Robert Dunn , Yingzong Bu , Ruchik Jayeskumar Bhatt
IPC: H01L21/687
CPC classification number: H01L21/68742
Abstract: A lift pin assembly includes a holder to engage and secure the lift pin and a bellow to actuate the lift pin and the holder linearly and vertically. The holder includes three pieces that connect together to secure the lift pin within the holder. The holder includes a first piece having a recessed area, a second piece that nests within the recessed area, and a third piece adjacent the first and second pieces. The second piece contains a threaded hole to receive and secure the lift pin and the third piece contains a through-hole that aligns with the threaded hole of the second piece.
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公开(公告)号:US20240087893A1
公开(公告)日:2024-03-14
申请号:US18463433
申请日:2023-09-08
Applicant: ASM IP Holding, B.V.
Inventor: Daniele Piumi , Ivo Raaijmakers
IPC: H01L21/033 , H01L21/67
CPC classification number: H01L21/0337 , H01L21/0338 , H01L21/67069 , H01L21/67207 , H01L21/0332
Abstract: Methods for patterning and forming structures, as well as related structures and systems are disclosed. The methods comprise forming a mandrel on a substrate. Forming the mandrel comprises executing a plurality of etching cycles to thin a structure.
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公开(公告)号:US11923190B2
公开(公告)日:2024-03-05
申请号:US16988374
申请日:2020-08-07
Applicant: ASM IP Holding B.V.
Inventor: Timothee Julien Vincent Blanquart
IPC: C23C16/26 , C23C16/455 , C23C16/50 , H01L21/02 , H01L21/762
CPC classification number: H01L21/0228 , C23C16/26 , C23C16/45542 , C23C16/50 , H01L21/02115 , H01L21/02205 , H01L21/02274 , H01L21/0234 , H01L21/76224 , H01L21/76229
Abstract: A Si-free C-containing film having filling capability is deposited by forming a viscous polymer in a gas phase by striking an Ar, He, or N2 plasma in a chamber filled with a volatile hydrocarbon precursor that can be polymerized within certain parameter ranges which define mainly partial pressure of precursor during a plasma strike, and wafer temperature.
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公开(公告)号:US20240071747A1
公开(公告)日:2024-02-29
申请号:US18238020
申请日:2023-08-25
Applicant: ASM IP Holding B.V.
Inventor: SungHa Choi , Hongsuk Kim , KiHun Kim , SangHeon Yong , JuHyuk Park
IPC: H01L21/02
CPC classification number: H01L21/02274 , H01L21/02164 , H01L21/0217 , H01L21/0228 , C23C16/045
Abstract: A method of processing a substrate having a gap includes loading the substrate onto a substrate support unit, supplying an oligomeric silicon precursor and a nitrogen-containing gas to the substrate through a gas supply unit on the substrate support unit, and generating a direct plasma in a reaction space by applying a voltage to at least one of the substrate support unit and the gas supply unit, wherein a plurality of sub-steps are performed during the supplying of the oligomeric silicon precursor and the nitrogen-containing gas and the generating a direct plasma, and different plasma duty ratios are applied during the plurality of sub-steps.
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公开(公告)号:US11915929B2
公开(公告)日:2024-02-27
申请号:US17873369
申请日:2022-07-26
Applicant: ASM IP Holding B.V.
Inventor: Delphine Longrie , Shaoren Deng , Jan Willem Maes
IPC: H01L21/02 , H01L21/027 , H01L21/3213
CPC classification number: H01L21/02636 , H01L21/0262 , H01L21/0273 , H01L21/32136 , H01L21/32139
Abstract: Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface are disclosed. The methods may include: contacting the substrate with a plasma generated from a hydrogen containing gas, selectively forming a passivation film from vapor phase reactants on the first dielectric surface while leaving the second metallic surface free from the passivation film, and selectively depositing the target film from vapor phase reactants on the second metallic surface relative to the passivation film.
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公开(公告)号:US20240063053A1
公开(公告)日:2024-02-22
申请号:US18235013
申请日:2023-08-17
Applicant: ASM IP Holding B.V.
Inventor: SangHeon Yong , HongSuk Kim , SungHa Choi , JuHyuk Park , KiHun Kim
IPC: H01L21/764 , H01J37/32 , H01L21/762 , H01L21/02 , C23C16/34 , C23C16/505 , C23C16/04
CPC classification number: H01L21/764 , H01J37/32137 , H01L21/76224 , H01L21/02274 , C23C16/345 , C23C16/505 , C23C16/045 , H01J2237/332
Abstract: A method of processing a substrate is disclosed, the method including: providing the substrate where a gap is formed on a surface thereof to a reaction space, performing a deposition step of depositing a flowable film in the gap of the substrate while supplying a precursor and a reactant gas to the reaction space, performing a plasma treatment step to the flowable film so that the flowability of the flowable film in an upper region of the gap decreases compared to a lower region of the gap, and repeating the deposition step of depositing the flowable film and the plasma treatment step to the flowable film, to form an air-gap within the gap.
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公开(公告)号:US20240063014A1
公开(公告)日:2024-02-22
申请号:US18232990
申请日:2023-08-11
Applicant: ASM IP Holding B.V.
Inventor: SangHeon Yong , HongSuk Kim , JuHyuk Park , SungHa Choi , KiHun Kim
IPC: H01L21/02
CPC classification number: H01L21/02252 , H01L21/0217 , H01L21/02164 , H01L21/02219 , H01L21/02211 , H01L21/0223 , H01L21/02274 , H01L21/0234 , H01L21/02326
Abstract: Provided is a method of efficiently forming a dense and solid silicon oxide film on a substrate and a method of manufacturing a semiconductor device by using the same. The formation method comprises: providing a substrate to a reaction chamber; forming a flowable silicon nitride film on the substrate; converting the flowable silicon nitride film into a flowable silicon oxide film; densifying the flowable silicon oxide film; and post-treating the densified silicon oxide film with an inert gas plasma to increase a density of the silicon oxide film.
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公开(公告)号:US20240060174A1
公开(公告)日:2024-02-22
申请号:US18234549
申请日:2023-08-16
Applicant: ASM IP Holding B.V.
Inventor: Makoto Igarashi , Shinya Yoshimoto , Jhoelle Roche Guhit , Ling Chi Hwang
IPC: C23C16/04
CPC classification number: C23C16/045
Abstract: Methods and systems of forming material within a recess are disclosed. Exemplary methods include forming a flowable material at a first temperature (T1) within a reaction chamber, the flowable material forming deposited material within the recess, treating the deposited material to form treated material, and heating the substrate including the treated material at a second temperature (T2) to remove a portion of the deposited material.
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公开(公告)号:US20240055279A1
公开(公告)日:2024-02-15
申请号:US18496081
申请日:2023-10-27
Applicant: ASM IP Holding B.V.
Inventor: Shiva K.T. Rajavelu Muralidhar , Sam Kim
CPC classification number: H01L21/67115 , H01L21/324 , H01K1/14 , H05B3/0047 , F27B17/0025 , H01K7/00 , F27D5/0037
Abstract: An arrangement of linear heat lamps is provided which allows for localized control of temperature nonuniformities in a substrate during semiconductor processing. A reactor includes a substrate holder positioned between a top array and a bottom array of linear heat lamps. At least one lamp of the arrays includes a filament having a varying density and power output along the length of the lamp. In particular, at least one lamp of the arrays includes a filament having a higher filament winding density within a central portion of the lamp relative to peripheral portions of the lamp. In some embodiments, the at least one lamp is a central lamp extending across a central portion of the substrate heated by the lamp. Furthermore, at least one lamp of the arrays has a higher power output within a central portion of the lamp than at peripheral portions of the lamp.
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