利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

137 条记录 (耗时 0.024 秒)

    Bicycle Mount
    82.
    发明申请
    Bicycle Mount 审中-公开
    自行车架

    公开(公告)号：US20160131166A1

    公开(公告)日：2016-05-12

    申请号：US14936799

    申请日：2015-11-10

    申请人： Brian Cox

    发明人： Brian Cox

    IPC分类号： F16B2/06 ,  F16M13/02 ,  B60R9/10

    CPC分类号： F16B2/065 ,  B60R9/10 ,  E05B71/00 ,  F16M11/08 ,  F16M13/022

    摘要： A mount includes an upper portion having a means for releasably securing a device thereto. A lower portion has an upper half and a lower half. The upper half has a first semicircular channel and is releasably connectable to the upper portion and rotatable relative to the upper portion about a first axis. The lower half has a second semicircular channel and is releasably connectable to the upper half such that the first semicircular channel mates with the second semicircular channel forming a passage extending along a second axis perpendicular to the first axis.

    摘要翻译： 安装件包括具有用于将装置可释放地固定到其上的装置的上部。 下部具有上半部和下半部。 上半部具有第一半圆形通道，并且可释放地连接到上部并且可围绕第一轴线相对于上部部分旋转。 下半部具有第二半圆形通道并且可释放地连接到上半部，使得第一半圆形通道与第二半圆形通道配合形成沿着垂直于第一轴线的第二轴线延伸的通道。

    Chipset support for non-uniform memory access among heterogeneous processing units
    83.
    发明授权
    Chipset support for non-uniform memory access among heterogeneous processing units 有权
    芯片组支持异构处理单元之间的非均匀内存访问

    公开(公告)号：US09015446B2

    公开(公告)日：2015-04-21

    申请号：US12332016

    申请日：2008-12-10

    申请人： Michael Brian Cox ,  Brad W. Simeral

    发明人： Michael Brian Cox ,  Brad W. Simeral

    IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F12/10

    CPC分类号： G06F12/0284 ,  G06F12/1081

    摘要： A method for providing a first processor access to a memory associated with a second processor. The method includes receiving a first address map from the first processor that includes an MMIO aperture for a NUMA device, receiving a second address map from a second processor that includes MMIO apertures for hardware devices that the second processor is configured to access, and generating a global address map by combining the first and second address maps. The method further includes receiving an access request transmitted from the first processor to the NUMA device, generating a memory access request based on the first access request and a translation table that maps a first address associated with the first access request into a second address associated with the memory associated with the second processor, and routing the memory access request to the memory based on the global address map.

    摘要翻译： 一种用于提供对与第二处理器相关联的存储器的第一处理器访问的方法。 该方法包括从第一处理器接收包括用于NUMA设备的MMIO孔径的第一地址映射，从包括第二处理器被配置为访问的硬件设备的MMIO孔径的第二处理器接收第二地址映射，并且生成 通过组合第一和第二地址映射的全局地址映射。 该方法还包括接收从第一处理器发送到NUMA设备的接入请求，基于第一接入请求生成存储器访问请求，以及将与第一接入请求相关联的第一地址映射到与第一接入请求相关联的第二地址的转换表 与第二处理器相关联的存储器，以及基于全局地址映射将存储器访问请求路由到存储器。

    Audio speaker having a tweeter capable of continuous rotation
    85.
    发明授权
    Audio speaker having a tweeter capable of continuous rotation 有权
    具有能够连续旋转的高音单元的音频扬声器

    公开(公告)号：US08325965B2

    公开(公告)日：2012-12-04

    申请号：US11649716

    申请日：2007-01-04

    申请人： Leif Blackmon ,  Brian Cox ,  Tim Higgins

    发明人： Leif Blackmon ,  Brian Cox ,  Tim Higgins

    IPC分类号： H04R1/02

    CPC分类号： H04R1/345 ,  H04R1/24 ,  H04R9/06 ,  H04R2201/021 ,  H04R2201/025 ,  H04R2499/13

    摘要： An audio speaker contains a tweeter capable of continuous rotation, where the audio speaker contains the tweeter and an axis mount assembly. The tweeter is removably connected to the axis mount assembly. The audio speaker also contains a first connection member capable of maintaining electrical communication with the axis mount assembly throughout continuous rotation of the axis mount assembly. The axis mount assembly contains a terminal plate connected to a bottom portion of the tweeter, where the terminal plate maintains electrical communication with the tweeter. The axis mount assembly also contains an axis mount faceplate capable of receiving the terminal plate and tweeter within an indented portion of a top portion of the axis mount faceplate. The axis mount assembly further contains an axis mount spacer and a second connection member that maintains electrical communication with the first connection member throughout continuous rotation of the axis mount assembly.

    摘要翻译： 音频扬声器包含能够连续旋转的高音单元，音频扬声器包含高音单元和轴安装组件。 高音单元可拆卸地连接到轴安装组件。 音频扬声器还包括第一连接构件，其能够在轴安装组件的连续旋转期间保持与轴安装组件的电连通。 轴安装组件包括连接到高音单元的底部的端子板，其中端子板保持与高音单元的电连通。 轴安装组件还包含能够在轴安装面板的顶部的凹进部分内接收端子板和高音单元的轴线安装面板。 轴安装组件还包括轴安装间隔件和第二连接构件，其在轴安装组件的连续旋转期间保持与第一连接构件的电连通。

    CENTRALIZED DEVICE VIRTUALIZATION LAYER FOR HETEROGENEOUS PROCESSING UNITS
    86.
    发明申请
    CENTRALIZED DEVICE VIRTUALIZATION LAYER FOR HETEROGENEOUS PROCESSING UNITS 有权
    用于异构加工单元的集中设备虚拟化层

    公开(公告)号：US20120304285A1

    公开(公告)日：2012-11-29

    申请号：US13568023

    申请日：2012-08-06

    申请人： Brad W. Simeral ,  Michael Brian Cox

    发明人： Brad W. Simeral ,  Michael Brian Cox

    IPC分类号： G06F21/00

    CPC分类号： G06F9/45537

    摘要： A method for providing an operating system access to devices, including enumerating hardware devices and virtualized devices, where resources associated with a first hardware device are divided into guest physical resources creating a software virtualized device, and multiple instances of resources associated with a second hardware device are advertised thereby creating a hardware virtualized device. First and second permission lists are generated that specify which operating systems are permitted to access the software virtualized device and the hardware virtualized device, respectively. First and second sets of virtual address maps are generated, where each set maps an address space associated with either the software virtualized device or the hardware virtualized device into an address space associated with each operating system included in the corresponding permission list. The method further includes arbitrating access requests from each of the plurality of operating systems based on the permission lists and the virtual address maps.

    摘要翻译： 一种用于提供对包括枚举硬件设备和虚拟化设备的枚举的设备的操作系统访问的方法，其中与第一硬件设备相关联的资源被划分为创建软件虚拟化设备的客户物理资源以及与第二硬件设备相关联的资源的多个实例 由此创建一个硬件虚拟化设备。 生成第一和第二权限列表，其指定哪些操作系统被允许访问软件虚拟化设备和硬件虚拟化设备。 生成第一和第二组虚拟地址映射，其中每个集合将与软件虚拟化设备或硬件虚拟化设备相关联的地址空间映射到与包括在相应的许可列表中的每个操作系统相关联的地址空间中。 该方法还包括基于许可列表和虚拟地址映射来仲裁来自多个操作系统中的每一个的访问请求。

    System and method for maintaining cache coherency across a serial interface bus using a snoop request and complete message
    87.
    发明授权
    System and method for maintaining cache coherency across a serial interface bus using a snoop request and complete message 有权
    使用窥探请求和完整消息在串行接口总线上维护高速缓存一致性的系统和方法

    公开(公告)号：US08234458B2

    公开(公告)日：2012-07-31

    申请号：US12331302

    申请日：2008-12-09

    申请人： Brian Keith Langendorf ,  David B. Glasco ,  Michael Brian Cox ,  Jonah M. Alben

    发明人： Brian Keith Langendorf ,  David B. Glasco ,  Michael Brian Cox ,  Jonah M. Alben

    IPC分类号： G06F13/00 ,  G06F13/42

    CPC分类号： G06F12/0831

    摘要： A method and system for maintaining cache coherency across a serial interface bus such as a Peripheral Component Interconnect Express (PCIe) bus. The method includes generating a snoop request (SNP) to determine whether first data stored in a local memory is coherent relative to second data stored in a data cache, the snoop request including destination information that identifies the data cache on the serial interface bus, and causing the snoop request to be transmitted over the serial interface bus to a second processor. The method further includes extracting a cache line address from the snoop request, determining whether the second data is coherent, generating a complete message (CPL) indicating that the first data is coherent with the second data, and causing the complete message to be transmitted over the bus to the first processor. The snoop request and complete messages may be vendor defined messages.

    摘要翻译： 一种用于在串行接口总线（例如外围组件互连Express（PCIe）总线）上维持高速缓存一致性的方法和系统。 该方法包括产生窥探请求（SNP）以确定存储在本地存储器中的第一数据是否相对于存储在数据高速缓冲存储器中的第二数据是相干的，该侦听请求包括识别串行接口总线上的数据高速缓存的目的地信息，以及 导致窥探请求通过串行接口总线传输到第二处理器。 该方法还包括从窥探请求中提取高速缓存线地址，确定第二数据是否相干，生成指示第一数据与第二数据相干的完整消息（CPL），以及使完整消息传输 总线到第一个处理器。 窥探请求和完成消息可以是供应商定义的消息。