Abstract:
A linear modulation voltage transformer circuitry includes a power stage unit, a voltage division unit, a linear modulation unit, an error amplifier, and a recursive controller. The power stage unit adapts an input voltage and outputs a first voltage to the voltage division unit, which outputs a divided voltage. The linear modulation unit receives the divided voltage, compares it with a control voltage, and outputs an error voltage signal to the error amplifier, which amplifies the error voltage signal as an error gain control signal. The recursive controller receives and modulates the error gain control signal and outputs the modulation error gain control signal to the power stage unit as a reference signal so as for the power stage unit to modulate the first voltage. Thus, the first voltage can be varied in real time via the linear modulation unit to meet load demands.
Abstract:
In a method for checking layout of a printed circuit board (PCB) using an electronic device, a power line is selected from a layout diagram of the PCB. The method searches for one or more signal lines which are overlapping with the selected power line from the layout diagram of the PCB. The method further locates attribute data of the searched signal lines and the selected power line in the layout diagram of the PCB, and displays the attribute data of the searched signal lines and the selected power line on a display device of the electronic device.
Abstract:
A method for controlling a terminal display device is disclosed and includes the following steps. An electronic device couples to a web server of the terminal display device via a network. The electronic device displays a web page transmitted from the web server. A user selects a function option of the web page shown on the electronic device. The web server of the terminal display device generates a command according to the selected function option. A control system of the terminal display device controls an operation of the terminal display device according to the command.
Abstract:
A liquid crystal display (LCD) panel and a fabricating method thereof are described. First, a first substrate and a second substrate are provided. A liquid crystal monomer layer is then formed on the surface of at least one of the first and second substrates. Next, a curing step is performed to the liquid crystal monomer layer to induce a polymerization reaction, so as to form a liquid crystal polymer layer. Thereafter, the first and second substrates are assembled and a liquid crystal layer is filled between the first and second substrates.
Abstract:
The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a patternable layer over a substrate. The method includes forming a first layer over the patternable layer. The method includes forming a second layer over the first layer. The second layer is substantially thinner than the first layer. The method includes patterning the second layer with a photoresist material through a first etching process to form a patterned second layer. The method includes patterning the first layer with the patterned second layer through a second etching process to form a patterned first layer. The first and second layers have substantially different etching rates during the second etching process. The method includes patterning the patternable layer with the patterned first layer through a third etching process.
Abstract:
A mask substrate, photomask and method for forming the same are provided. The photomask includes a substantially light transparent substrate and a circuitry pattern disposed over the light transparent substrate. The circuitry pattern includes a phase shifting layer disposed over the substantially light transparent substrate. A substantially light shielding layer is disposed over the phase shifting layer. At least one barrier layer is disposed over the substantially light shielding layer. An uppermost portion of the substantially light shielding layer does not comprise anti-reflective properties and the at least one barrier layer comprises an uppermost hardmask layer and an underlying anti-reflective layer.
Abstract:
A lamp includes a housing, a heat sink, a cooling fan and a light-emitting module. The housing has an assembling opening and an electrical connection member on two ends thereof, wherein the housing further comprises an inner wall and a portion of the inner wall adjacent to the assembling opening is an air-guiding wall. The heat sink has a base plate disposed at the assembling opening of the housing, wherein the base plate has at least one partitioning board defining an air channel of the heat sink. A first air-guiding opening is formed between the air-guiding wall and the at least one partitioning board, and a second air-guiding opening is formed between the air channel and the air-guiding wall. The cooling fan is coupled with the heat sink and has an impeller. The light-emitting module is coupled with the base plate of the heat sink.
Abstract:
The mechanisms for forming metal bumps to connect to a cooling device (or a heat sink) described herein enable substrates with devices to dissipate heat generated more efficiently. In addition, the metal bumps allow customization of bump designs to meet the needs of different chips. Further, the usage of metal bumps between the semiconductor chip and cooling device enables advanced cooling by passing a cooling fluid between the bumps.
Abstract:
A system and method for inspecting layout of a printed circuit board (PCB) provides a graphical user interface (GUI). The GUI displays a layout of the PCB. High side pins of a pulse width modulation (PWM) controller and a component connected to a high side pin are found. If the component is a metallic oxide semiconductor field effect transistor (MOSFET), the system calculate absolute a linear distance and a trace distance between a source pin of the MOSFET and a capacitor pin of a coupling capacitor connected to the source pin. If the linear distance, the trace distance and a capacitance of the coupling capacitor accord with a layout standard, the layout of the PCB is determined to be up to standard.
Abstract:
In a flame identification method and device for identifying any flame image in a plurality of frames captured consecutively from a monitored area, for each image frame, intensity foreground pixels are obtained based on intensity values of pixels, a fire-like image region containing the intensity foreground pixels is defined when an intensity foreground area corresponding to the intensity foreground pixels is greater than a predetermined intensity foreground area threshold, and saturation foreground pixels are obtained from all pixels in the fire-like image region based on saturation values thereof to obtain a saturation foreground area corresponding to the saturation foreground pixels. Linear regression analyses are performed on two-dimensional coordinates each formed by the intensity and saturation pixel areas associated with a corresponding image frame to generate a determination coefficient. Whether a flame image exists in the image frames is determined based on the determination coefficient and a predetermined identification threshold.