公开(公告)号：US08063449B2

公开(公告)日：2011-11-22

申请号：US12626496

申请日：2009-11-25

Applicant: Jin-Ping Han ,  Thomas W. Dyer ,  Henry Utomo ,  Rajendran Krishnasamy

Inventor： Jin-Ping Han ,  Thomas W. Dyer ,  Henry Utomo ,  Rajendran Krishnasamy

IPC: H01L29/78

CPC classification number: H01L29/6656 ,  H01L21/76232 ,  H01L21/823481 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/41775 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833

Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes providing a semiconductor wafer, forming at least one isolation structure within the semiconductor wafer, and forming at least one feature over the semiconductor wafer. A top portion of the at least one isolation structure is removed, and a liner is formed over the semiconductor wafer, the at least one feature, and the at least one isolation structure. A fill material is formed over the liner. The fill material and the liner are removed from over at least a portion of a top surface of the semiconductor wafer.

Abstract translation: 公开了半导体器件及其制造方法。 在优选实施例中，制造半导体器件的方法包括提供半导体晶片，在半导体晶片内形成至少一个隔离结构，并在半导体晶片上形成至少一个特征。 移除所述至少一个隔离结构的顶部，并且在所述半导体晶片，所述至少一个特征以及所述至少一个隔离结构之上形成衬垫。 在衬套上形成填充材料。 填充材料和衬垫从半导体晶片的顶表面的至少一部分上方被去除。

公开(公告)号：US20110237011A1

公开(公告)日：2011-09-29

申请号：US12748462

申请日：2010-03-29

Applicant: RONG ZHANG ,  ZILI XIE ,  BIN LIU ,  MING LI ,  XIANGQIAN XIU ,  DEYI FU ,  XUEMEI HUA ,  HONG ZHAO ,  PENG CHEN ,  PING HAN ,  YOUDOU ZHENG

Inventor： RONG ZHANG ,  ZILI XIE ,  BIN LIU ,  MING LI ,  XIANGQIAN XIU ,  DEYI FU ,  XUEMEI HUA ,  HONG ZHAO ,  PENG CHEN ,  PING HAN ,  YOUDOU ZHENG

IPC: H01L21/20

CPC classification number: H01L21/0262 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L33/007

Abstract: This invention presents a growth method for GaN based quantum wells red light LED structure by MOCVD epitaxy growth system, GaN based GaN/InGaN quantum wells red light LED structure material is obtained. The In mole fraction (x) for quantum well material InGaN is controlled between 0.1 and 0.5. This invention realizes the lumiscience of long wave length red light in group III nitrides. Aiming at the problem of difficulty in growing high In composition InGaN material, this invention solves this problem by controlling and adjusting the flux of organic Ga source and In source, growth temperature, time, and the flux of ammonia, and the mole ratio of N to Ga. By strictly controlling the conditions such as temperature and the flux ratio of reactant in the whole process, this invention determines the radiation wave length of quantum well, realizes the lumiscience of long wave length, and obtained GaN based GaN/InGaN quantum well red light LED structure.

Abstract translation: 本发明提出了通过MOCVD外延生长系统，GaN基GaN / InGaN量子阱红光LED结构材料的GaN基量子阱红光LED结构的生长方法。 量子阱材料InGaN的In摩尔分数（x）控制在0.1和0.5之间。 本发明实现了III类氮化物中长波长红光的光学。 针对难以生长高In组成InGaN材料的问题，本发明通过控制和调节有机Ga源的流量和源，生长温度，时间和氨流量来解决这个问题，并且N 通过严格控制整个过程中反应物的温度和通量比等条件，本发明确定了量子阱的辐射波长，实现了长波长的光学，并获得了GaN基GaN / InGaN量子阱 红光LED结构。

公开(公告)号：US07947606B2

公开(公告)日：2011-05-24

申请号：US12129479

申请日：2008-05-29

Applicant: Jiang Yan ,  Roland Hampp ,  Jin-Ping Han ,  Manfred Eller ,  Alois Gutmann

Inventor： Jiang Yan ,  Roland Hampp ,  Jin-Ping Han ,  Manfred Eller ,  Alois Gutmann

IPC: H01L21/311

CPC classification number: H01L21/76804 ,  H01L21/823807 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming features and structures thereof are disclosed. In one embodiment, a method of forming a feature includes forming a first material over a workpiece, forming a first pattern for a lower portion of the feature in the first material, and filling the first pattern with a sacrificial material. A second material is formed over the first material and the sacrificial material, and a second pattern for an upper portion of the feature is formed in the second material. The sacrificial material is removed. The first pattern and the second pattern are filled with a third material.

Abstract translation: 公开了形成特征及其结构的方法。 在一个实施例中，形成特征的方法包括在工件上形成第一材料，形成用于第一材料中特征的下部的第一图案，以及用牺牲材料填充第一图案。 在第一材料和牺牲材料上形成第二材料，并且在第二材料中形成用于特征的上部的第二图案。 牺牲材料被去除。 第一图案和第二图案填充有第三材料。

公开(公告)号：US07935593B2

公开(公告)日：2011-05-03

申请号：US12366356

申请日：2009-02-05

Applicant: Jong Ho Yang ,  Jin-Ping Han ,  Chung Woh Lai ,  Henry Utomo

Inventor： Jong Ho Yang ,  Jin-Ping Han ,  Chung Woh Lai ,  Henry Utomo

IPC: H01L21/8238

CPC classification number: H01L21/823807 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7848

Abstract: Embodiments of the present disclosure provide stress optimization during manufacturing of dual embedded epitaxially grown (EPI) semiconductor structures using just two masks, such as nFET and pFET open for embedded epitaxial using SiC and SiGe, and separated halo implantation masks for both horizontal and vertical PC

Abstract translation: 本公开的实施例在仅使用两个掩模的双嵌入式外延生长（EPI）半导体结构的制造期间提供应力优化，例如用于使用SiC和SiGe的嵌入式外延的nFET和pFET，以及用于水平和垂直PC的分离的晕圈注入掩模

公开(公告)号：US20100303343A1

公开(公告)日：2010-12-02

申请号：US12624915

申请日：2009-11-24

Applicant: Ping-Han LEE ,  Yi-Ping HUNG

Inventor： Ping-Han LEE ,  Yi-Ping HUNG

IPC: G06K9/62 ,  G06K9/68 ,  G06K9/36 ,  G06K9/46 ,  G06F17/30

CPC classification number: G06K9/00268 ,  G06F17/30247

Abstract: A method of recognizing an object in an image is provided, the method comprises the following steps. The image having the object is provided, and principal traits of the object are encoded in order to generate a first trait code. The first trait code is compared with data stored in a database so as to obtain a plurality of differences. A minimum of the plurality of differences is found. This method can be applied to synthesize human faces.

Abstract translation: 提供了识别图像中的对象的方法，该方法包括以下步骤。 提供具有对象的图像，并且编码对象的主要特征以便生成第一特征码。 将第一特征码与存储在数据库中的数据进行比较，以获得多个差异。 找到多个差异的最小值。 这种方法可以用于合成人脸。

公开(公告)号：US07838372B2

公开(公告)日：2010-11-23

申请号：US12125238

申请日：2008-05-22

Applicant: Jin-Ping Han ,  Jong Ho Yang ,  Chung Woh Lai ,  Henry Utomo

Inventor： Jin-Ping Han ,  Jong Ho Yang ,  Chung Woh Lai ,  Henry Utomo

IPC: H01L21/336

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66636

Abstract: Methods of manufacturing semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming recesses in a first region and a second region of a workpiece. The first region of the workpiece is masked, and the recesses in the second region of the workpiece are filled with a first semiconductive material. The second region of the workpiece is masked, and the recesses in the first region of the workpiece are filled with a second semiconductive material.

Abstract translation: 公开了制造半导体器件的方法及其结构。 在一个实施例中，制造半导体器件的方法包括在工件的第一区域和第二区域中形成凹陷。 工件的第一区域被掩蔽，并且工件的第二区域中的凹部填充有第一半导体材料。 工件的第二区域被掩蔽，并且工件的第一区域中的凹部填充有第二半导体材料。

公开(公告)号：US20100155854A1

公开(公告)日：2010-06-24

申请号：US12341542

申请日：2008-12-22

Applicant: Knut Stahrenberg ,  Jin-Ping Han

Inventor： Knut Stahrenberg ,  Jin-Ping Han

IPC: H01L21/28 ,  H01L27/088

CPC classification number: H01L21/28088 ,  H01L21/2822 ,  H01L21/28229 ,  H01L21/82345 ,  H01L21/823462 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/0922 ,  H01L29/401 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/518 ,  H01L29/78

Abstract: Methods of fabricating semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a gate material stack over a workpiece having a first region and a second region. A composition or a thickness of at least one of a plurality of material layers of the gate material stack is altered in at least the second region. The gate material stack is patterned, forming a first transistor in the first region and forming a second transistor in the second region. Altering the composition or the thickness of the at least one of the plurality of material layers of the gate material stack in at least the second region results in a first transistor having a first threshold voltage and a second transistor having a second threshold voltage, the second threshold voltage having a different magnitude than the first threshold voltage.

Abstract translation: 公开了制造半导体器件的方法及其结构。 在一个实施例中，制造半导体器件的方法包括在具有第一区域和第二区域的工件上形成栅极材料堆叠。 至少在第二区域中改变栅极材料层叠的多个材料层中的至少一个的组成或厚度。 图案化栅极材料堆叠，在第一区域中形成第一晶体管，并在第二区域中形成第二晶体管。 在至少第二区域中改变栅极材料堆叠的多个材料层中的至少一个材料层的组成或厚度导致具有第一阈值电压的第一晶体管和具有第二阈值电压的第二晶体管，第二晶体管具有第二阈值电压 阈值电压具有与第一阈值电压不同的幅度。

公开(公告)号：US20100136761A1

公开(公告)日：2010-06-03

申请号：US12702443

申请日：2010-02-09

Applicant: Jin-Ping Han

Inventor： Jin-Ping Han

IPC: H01L21/336 ,  H01L21/20

CPC classification number: H01L29/7834 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7848

Abstract: Semiconductor devices and methods of manufacturing thereof are disclosed. A preferred embodiment includes a semiconductor device comprising a workpiece, the workpiece including a first region and a second region proximate the first region. A first material is disposed in the first region, and at least one region of a second material is disposed within the first material in the first region, the second material comprising a different material than the first material. The at least one region of the second material increases a first stress of the first region.

Abstract translation: 公开了半导体器件及其制造方法。 优选实施例包括包括工件的半导体器件，所述工件包括第一区域和靠近第一区域的第二区域。 第一材料设置在第一区域中，并且第二材料的至少一个区域设置在第一区域内的第一材料内，第二材料包括与第一材料不同的材料。 第二材料的至少一个区域增加第一区域的第一应力。

公开(公告)号：US20090324538A1

公开(公告)日：2009-12-31

申请号：US12151980

申请日：2008-05-09

Applicant: Hing C. Wong ,  Peter Rhode ,  Xiaoyun Zhu ,  Kai-ping Han

Inventor： Hing C. Wong ,  Peter Rhode ,  Xiaoyun Zhu ,  Kai-ping Han

IPC: A61K38/20 ,  C07K14/54 ,  C07K14/715 ,  C07H21/00 ,  C12P21/02 ,  G01N33/567

CPC classification number: C07K14/5443 ,  A61K38/00 ,  A61K38/1774 ,  A61K38/1793 ,  A61K38/2086 ,  C07K14/7051 ,  C07K14/7155 ,  C07K16/18 ,  C07K16/28 ,  C07K2319/00 ,  C07K2319/31 ,  C07K2319/33 ,  C07K2319/74 ,  C07K2319/75 ,  C12N15/09 ,  C12N15/62 ,  C12P21/00 ,  G01N33/56977

Abstract: The instant invention provides soluble fusion protein complexes and IL-15 variants that have therapeutic and diagnostic use, and methods for making thesuch proteins. The instant invention additionally provides methods of stimulating or suppressing immune responses in a mammal using the fusion protein complexes and IL-15 variants of the invention.

Abstract translation: 本发明提供了具有治疗和诊断用途的可溶性融合蛋白复合物和IL-15变体，以及制备该蛋白质的方法。 本发明另外提供使用本发明的融合蛋白复合物和IL-15变体刺激或抑制哺乳动物中免疫应答的方法。

公开(公告)号：US20090294986A1

公开(公告)日：2009-12-03

申请号：US12129479

申请日：2008-05-29

Applicant: Jiang Yan ,  Roland Hampp ,  Jin-Ping Han ,  Manfred Eller ,  Alois Gutmann

Inventor： Jiang Yan ,  Roland Hampp ,  Jin-Ping Han ,  Manfred Eller ,  Alois Gutmann

IPC: H01L23/52 ,  H01L21/4763 ,  H01L21/8238

CPC classification number: H01L21/76804 ,  H01L21/823807 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming features and structures thereof are disclosed. In one embodiment, a method of forming a feature includes forming a first material over a workpiece, forming a first pattern for a lower portion of the feature in the first material, and filling the first pattern with a sacrificial material. A second material is formed over the first material and the sacrificial material, and a second pattern for an upper portion of the feature is formed in the second material. The sacrificial material is removed. The first pattern and the second pattern are filled with a third material.

Abstract translation: 公开了形成特征及其结构的方法。 在一个实施例中，形成特征的方法包括在工件上形成第一材料，形成用于第一材料中特征的下部的第一图案，以及用牺牲材料填充第一图案。 在第一材料和牺牲材料上形成第二材料，并且在第二材料中形成用于特征的上部的第二图案。 牺牲材料被去除。 第一图案和第二图案填充有第三材料。