Chamber configurations and processes for particle control

    公开(公告)号:US11670492B2

    公开(公告)日:2023-06-06

    申请号:US17071506

    申请日:2020-10-15

    CPC classification number: H01J37/32871 H01J37/32862 H01J2237/335

    Abstract: Exemplary processing methods may include forming a plasma of a cleaning precursor in a remote region of a semiconductor processing chamber. The methods may include flowing plasma effluents of the cleaning precursor into a processing region of the semiconductor processing chamber. The methods may include contacting a substrate support with the plasma effluents for a first period of time. The methods may include lowering the substrate support from a first position to a second position while continuing to flow plasma effluents of the cleaning precursor. The methods may include cleaning the processing region of the semiconductor processing chamber for a second period of time.

    WAFER DE-CHUCKING DETECTION AND ARCING PREVENTION

    公开(公告)号:US20220415695A1

    公开(公告)日:2022-12-29

    申请号:US17929144

    申请日:2022-09-01

    Abstract: Methods and systems of detection of wafer de-chucking in a semiconductor processing chamber are disclosed. Methods and systems of interdiction are also disclosed to prevent hardware and wafer damage during semiconductor fabrication if and when de-chucking is detected. In one embodiment, a de-chucking detection method is based on measuring change in imaginary impedance of a plasma circuit, along with measuring one or both of reflected RF power and arc count. In another embodiment, a possibility of imminent de-chucking is detected even before complete de-chucking occurs by analyzing the signature change in imaginary impedance.

    Plasma density control on substrate edge

    公开(公告)号:US11495440B2

    公开(公告)日:2022-11-08

    申请号:US16996004

    申请日:2020-08-18

    Abstract: Embodiments of the present disclosure generally relate to apparatuses for reducing particle contamination on substrates in a plasma processing chamber. In one or more embodiments, an edge ring is provided and includes a top surface, a bottom surface opposite the top surface and extending radially outward, an outer vertical wall extending between and connected to the top surface and the bottom surface, an inner vertical wall opposite the outer vertical wall, an inner lip extending radially inward from the inner vertical wall, and an inner step disposed between and connected to the inner wall and the bottom surface. During processing, the edge ring shifts the high plasma density zone away from the edge area of the substrate to avoid depositing particles on the substrate when the plasma is de-energized.

    Methods of minimizing wafer backside damage in semiconductor wafer processing

    公开(公告)号:US10971390B2

    公开(公告)日:2021-04-06

    申请号:US16437048

    申请日:2019-06-11

    Abstract: The present disclosure generally relates to substrate supports for semiconductor processing. In one embodiment, a substrate support is provided. The substrate support includes a body comprising a substrate chucking surface, an electrode disposed within the body, a plurality of substrate supporting features formed on the substrate chucking surface, wherein the number of substrate supporting features increases radially from a center of the substrate chucking surface to an edge of the substrate chucking surface, and a seasoning layer formed on the plurality of the substrate supporting features, the seasoning layer comprising a silicon nitride.

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