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公开(公告)号:US11670492B2
公开(公告)日:2023-06-06
申请号:US17071506
申请日:2020-10-15
Applicant: Applied Materials, Inc.
Inventor: Fei Wu , Abdul Aziz Khaja , Sungwon Ha , Ganesh Balasubramanian , Vinay Prabhakar
IPC: H01J37/32
CPC classification number: H01J37/32871 , H01J37/32862 , H01J2237/335
Abstract: Exemplary processing methods may include forming a plasma of a cleaning precursor in a remote region of a semiconductor processing chamber. The methods may include flowing plasma effluents of the cleaning precursor into a processing region of the semiconductor processing chamber. The methods may include contacting a substrate support with the plasma effluents for a first period of time. The methods may include lowering the substrate support from a first position to a second position while continuing to flow plasma effluents of the cleaning precursor. The methods may include cleaning the processing region of the semiconductor processing chamber for a second period of time.
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公开(公告)号:US20220415695A1
公开(公告)日:2022-12-29
申请号:US17929144
申请日:2022-09-01
Applicant: APPLIED MATERIALS, INC.
Inventor: Ganesh Balasubramanian , Byung Chul Yoon , Hemant Mungekar
IPC: H01L21/683 , H01L21/66 , H01L21/67 , H01J37/32
Abstract: Methods and systems of detection of wafer de-chucking in a semiconductor processing chamber are disclosed. Methods and systems of interdiction are also disclosed to prevent hardware and wafer damage during semiconductor fabrication if and when de-chucking is detected. In one embodiment, a de-chucking detection method is based on measuring change in imaginary impedance of a plasma circuit, along with measuring one or both of reflected RF power and arc count. In another embodiment, a possibility of imminent de-chucking is detected even before complete de-chucking occurs by analyzing the signature change in imaginary impedance.
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公开(公告)号:US11495440B2
公开(公告)日:2022-11-08
申请号:US16996004
申请日:2020-08-18
Applicant: Applied Materials, Inc.
Inventor: Bhaskar Kumar , Prashanth Kothnur , Sidharth Bhatia , Anup Kumar Singh , Vivek Bharat Shah , Ganesh Balasubramanian , Changgong Wang
IPC: H01J37/32
Abstract: Embodiments of the present disclosure generally relate to apparatuses for reducing particle contamination on substrates in a plasma processing chamber. In one or more embodiments, an edge ring is provided and includes a top surface, a bottom surface opposite the top surface and extending radially outward, an outer vertical wall extending between and connected to the top surface and the bottom surface, an inner vertical wall opposite the outer vertical wall, an inner lip extending radially inward from the inner vertical wall, and an inner step disposed between and connected to the inner wall and the bottom surface. During processing, the edge ring shifts the high plasma density zone away from the edge area of the substrate to avoid depositing particles on the substrate when the plasma is de-energized.
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公开(公告)号:US20220336216A1
公开(公告)日:2022-10-20
申请号:US17235222
申请日:2021-04-20
Applicant: Applied Materials, Inc.
Inventor: Zeqiong Zhao , Allison Yau , Sang-Jin Kim , Akhil Singhal , Zhijun Jiang , Deenesh Padhi , Ganesh Balasubramanian
Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and an inert gas to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the inert gas. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The processing region may be maintained free of helium delivery during the deposition method.
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公开(公告)号:US11276562B2
公开(公告)日:2022-03-15
申请号:US16807156
申请日:2020-03-02
Applicant: Applied Materials, Inc.
Inventor: Zheng John Ye , Ganesh Balasubramanian , Thuy Britcher , Jay D. Pinson, II , Hiroji Hanawa , Juan Carlos Rocha-Alvarez , Kwangduk Douglas Lee , Martin Jay Seamons , Bok Hoen Kim , Sungwon Ha
IPC: H01L21/00 , C23C16/00 , H01J37/32 , C23C16/509
Abstract: A system for modifying the uniformity pattern of a thin film deposited in a plasma processing chamber includes a single radio-frequency (RF) power source that is coupled to multiple points on the discharge electrode of the plasma processing chamber. Positioning of the multiple coupling points, a power distribution between the multiple coupling points, or a combination of both are selected to at least partially compensate for a consistent non-uniformity pattern of thin films produced by the chamber. The power distribution between the multiple coupling points may be produced by an appropriate RF phase difference between the RF power applied at each of the multiple coupling points.
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公开(公告)号:US20220037126A1
公开(公告)日:2022-02-03
申请号:US16983164
申请日:2020-08-03
Applicant: Applied Materials, Inc.
Inventor: Jennifer Y. Sun , Ren-Guan Duan , Gayatri Natu , Tae Won Kim , Jiyong Huang , Nitin Deepak , Paul Brillhart , Lin Zhang , Yikai Chen , Sanni Sinikka Seppälä , Ganesh Balasubramanian , JuanCarlos Rocha , Shankar Venkataraman , Katherine Elizabeth Woo
IPC: H01J37/32 , C23C16/30 , C23C16/455 , C23C16/44
Abstract: Embodiments of the disclosure relate to articles, coated chamber components and methods of coating chamber components with a protective coating that includes at least one metal fluoride having a formula selected from the group consisting of M1xFw, M1xM2yFw and M1xM2yM3zFw, where at least one of M1, M2, or M3 is magnesium or lanthanum. The protective coating can be deposited by atomic layer deposition, chemical vapor deposition, electron beam ion assisted deposition, or physical vapor deposition.
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公开(公告)号:US20220020570A1
公开(公告)日:2022-01-20
申请号:US16932794
申请日:2020-07-19
Applicant: Applied Materials, Inc.
Inventor: Sai Susmita Addepalli , Yue Chen , Abhigyan Keshri , Qiang Ma , Zhijun Jiang , Shailendra Srivastava , Daemian Raj Benjamin Raj , Ganesh Balasubramanian
Abstract: Exemplary semiconductor processing systems may include a processing chamber including a lid stack having an output manifold. The systems may include a gas panel. The systems may include an input manifold. The input manifold may fluidly couple the gas panel with the output manifold of the processing chamber. A delivery line may extend from the input manifold to the output manifold. The systems may include a first transmission line extending from a first set of precursor sources of the gas panel to the delivery line. The systems may include a second transmission line extending from a second set of precursor sources of the gas panel to the delivery line. The second transmission line may be switchably coupled between the delivery line and an exhaust of the semiconductor processing system.
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公开(公告)号:US11031262B2
公开(公告)日:2021-06-08
申请号:US16838128
申请日:2020-04-02
Applicant: Applied Materials, Inc.
Inventor: Saptarshi Basu , Jeongmin Lee , Paul Connors , Dale R. Du Bois , Prashant Kumar Kulshreshtha , Karthik Thimmavajjula Narasimha , Brett Berens , Kalyanjit Ghosh , Jianhua Zhou , Ganesh Balasubramanian , Kwangduk Douglas Lee , Juan Carlos Rocha-Alvarez , Hiroyuki Ogiso , Liliya Krivulina , Rick Gilbert , Mohsin Waqar , Venkatanarayana Shankaramurthy , Hari K. Ponnekanti
IPC: C23C16/40 , H01L21/67 , H01J37/32 , H01L21/687
Abstract: Implementations disclosed herein describe a bevel etch apparatus within a loadlock bevel etch chamber and methods of using the same. The bevel etch apparatus has a mask assembly within the loadlock bevel etch chamber. During an etch process, the mask assembly delivers a gas flow to control bevel etch without the use of a shadow frame. As such, the edge exclusion at the bevel edge can be reduced, thus increasing product yield.
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公开(公告)号:US10971390B2
公开(公告)日:2021-04-06
申请号:US16437048
申请日:2019-06-11
Applicant: Applied Materials, Inc.
Inventor: Abdul Aziz Khaja , Liangfa Hu , Sudha S. Rathi , Ganesh Balasubramanian
IPC: H01L21/687 , H01L21/67
Abstract: The present disclosure generally relates to substrate supports for semiconductor processing. In one embodiment, a substrate support is provided. The substrate support includes a body comprising a substrate chucking surface, an electrode disposed within the body, a plurality of substrate supporting features formed on the substrate chucking surface, wherein the number of substrate supporting features increases radially from a center of the substrate chucking surface to an edge of the substrate chucking surface, and a seasoning layer formed on the plurality of the substrate supporting features, the seasoning layer comprising a silicon nitride.
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公开(公告)号:US10403515B2
公开(公告)日:2019-09-03
申请号:US15013547
申请日:2016-02-02
Applicant: Applied Materials, Inc.
Inventor: Saptarshi Basu , Jeongmin Lee , Paul Connors , Dale R. Du Bois , Prashant Kumar Kulshreshtha , Karthik Thimmavajjula Narasimha , Brett Berens , Kalyanjit Ghosh , Jianhua Zhou , Ganesh Balasubramanian , Kwangduk Douglas Lee , Juan Carlos Rocha-Alvarez , Hiroyuki Ogiso , Liliya Krivulina , Rick Gilbert , Mohsin Waqar , Venkatanarayana Shankaramurthy , Hari K. Ponnekanti
IPC: C23C16/40 , H01L21/67 , H01J37/32 , H01L21/687
Abstract: Implementations disclosed herein describe a bevel etch apparatus within a loadlock bevel etch chamber and methods of using the same. The bevel etch apparatus has a mask assembly within the loadlock bevel etch chamber. During an etch process, the mask assembly delivers a gas flow to control bevel etch without the use of a shadow frame. As such, the edge exclusion at the bevel edge can be reduced, thus increasing product yield.
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