公开(公告)号：US09246097B2

公开(公告)日：2016-01-26

申请号：US14644382

申请日：2015-03-11

Applicant: Intermolecular Inc.

Inventor： Yun Wang ,  Imran Hashim

IPC: H01L29/02 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/146 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

Abstract: Provided are resistive random access memory (ReRAM) cells having diffusion barrier layers formed from various materials, such as beryllium oxide or titanium silicon nitrides. Resistive switching layers used in ReRAM cells often need to have at least one inert interface such that substantially no materials pass through this interface. The other (reactive) interface may be used to introduce and remove defects from the resistive switching layers causing the switching. While some electrode materials, such as platinum and doped polysilicon, may form inert interfaces, these materials are often difficult to integrate. To expand electrode material options, a diffusion barrier layer is disposed between an electrode and a resistive switching layer and forms the inert interface with the resistive switching layer. In some embodiments, tantalum nitride and titanium nitride may be used for electrodes separated by such diffusion barrier layers.

公开(公告)号：US09224950B2

公开(公告)日：2015-12-29

申请号：US14141627

申请日：2013-12-27

Applicant: Intermolecular Inc.

Inventor： Yun Wang

IPC: H01L47/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/145 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/16

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The ReRAM cells may include a first layer operable as a bottom electrode. The ReRAM cells may also include a second layer operable as a variable resistance layer configured to switch between at least a first resistive state and a second resistive state. The ReRAM cells may further include a third layer formed over the second layer. The third layer may have a substantially constant electrical resistivity. Moreover, the third layer may include a ternary metal-silicon nitride having a ratio of metal to silicon that is between about 1:1 and 1:4. Furthermore, the ternary metal-silicon nitride may include a metal that has an atomic weight that is greater than 90. The ReRAM cells may further include a fourth layer operable as a top electrode.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 ReRAM单元可以包括可操作为底部电极的第一层。 ReRAM单元还可以包括可操作为可配置为在至少第一电阻状态和第二电阻状态之间切换的可变电阻层的第二层。 ReRAM单元还可以包括形成在第二层上的第三层。 第三层可以具有基本上恒定的电阻率。 此外，第三层可以包括金属与硅的比例在约1:1至1:4之间的三元金属 - 氮化硅。 此外，三元金属 - 氮化硅可以包括具有大于90的原子量的金属.RRRAM单元还可以包括可操作为顶部电极的第四层。

公开(公告)号：US20150325788A1

公开(公告)日：2015-11-12

申请号：US14806263

申请日：2015-07-22

Applicant: Intermolecular Inc.

Inventor： Imran Hashim ,  Tony P. Chiang ,  Vidyut Gopal ,  Yun Wang

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2213/32 ,  G11C2213/51 ,  G11C2213/52 ,  G11C2213/74 ,  G11C2213/79 ,  H01L27/2436 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146

Abstract: Provided are nonvolatile memory assemblies each including a resistive switching layer and current steering element. The steering element may be a transistor connected in series with the switching layer. Resistance control provided by the steering element allows using switching layers requiring low switching voltages and currents. Memory assemblies including such switching layers are easier to embed into integrated circuit chips having other low voltage components, such as logic and digital signal processing components, than, for example, flash memory requiring much higher switching voltages. In some embodiments, provided nonvolatile memory assemblies operate at switching voltages less than about 3.0V and corresponding currents less than 50 microamperes. A memory element may include a metal rich hafnium oxide disposed between a titanium nitride electrode and doped polysilicon electrode. One electrode may be connected to a drain or source of the transistor, while another electrode is connected to a signal line.

Abstract translation: 提供了各自包括电阻式开关层和电流控制元件的非易失性存储器组件。 转向元件可以是与开关层串联连接的晶体管。 由转向元件提供的电阻控制允许使用需要低开关电压和电流的开关层。 包括这种开关层的存储器组件比例如需要高得多的开关电压的闪速存储器更容易嵌入到具有其它低电压组件（例如逻辑和数字信号处理组件）的集成电路芯片中。 在一些实施例中，所提供的非易失性存储器组件在小于约3.0V的开关电压和小于50微安的相应电流下工作。 存储元件可以包括设置在氮化钛电极和掺杂多晶硅电极之间的富含金属的氧化铪。 一个电极可以连接到晶体管的漏极或源极，而另一个电极连接到信号线。

公开(公告)号：US09178152B2

公开(公告)日：2015-11-03

申请号：US14139186

申请日：2013-12-23

Applicant: Intermolecular Inc.

Inventor： Chien-Lan Hsueh ,  Yun Wang

IPC: H01L21/20 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1616 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating them using metal organic chemical vapor deposition (MOCVD). Specifically, MOCVD is used to form an embedded resistor that includes two different nitrides. The first nitride may be more conductive than the second nitride. The concentrations of these nitrides may vary throughout the thickness of the embedded resistor. This variability may be achieved by changing flow rates of MOCVD precursors during formation of the embedded resistor. The second nitride may be concentrated in the middle of the embedded resistor, while the first nitride may be present at interface surfaces of the embedded resistor. As such, the first nitride protects the second nitride from exposure to other components and/or environments and prevents oxidation of the second nitride. Controlling the distribution of the two nitrides within the embedded resistor allows using new materials and achieving consistent performance of the embedded resistor.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其使用金属有机化学气相沉积（MOCVD）制造它们的方法。 具体来说，MOCVD用于形成包括两个不同氮化物的嵌入式电阻器。 第一氮化物可以比第二氮化物更具导电性。 这些氮化物的浓度可以在嵌入式电阻器的整个厚度上变化。 这种变化可以通过在形成嵌入式电阻器期间改变MOCVD前体的流速来实现。 第二氮化物可以集中在嵌入式电阻器的中间，而第一氮化物可以存在于嵌入式电阻器的界面处。 因此，第一氮化物保护第二氮化物免于暴露于其它部件和/或环境并且防止第二氮化物的氧化。 控制嵌入式电阻中的两个氮化物的分布允许使用新材料并实现嵌入式电阻器的一致性能。

公开(公告)号：US09178151B2

公开(公告)日：2015-11-03

申请号：US14078838

申请日：2013-11-13

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/065 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1633 ,  H01L45/1641

Abstract: Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.

Abstract translation: 本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。 通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。 在电阻式开关非易失性存储器件的一种结构中，界面层结构包括钝化区域，界面耦合区域和/或可变电阻层接口区域，其被配置为调整非易失性存储器件的性能，例如降低形成 器件的开关电流并降低器件的成型电压，并降低从一个成形器件到另一个器件的性能变化。

公开(公告)号：US20150188045A1

公开(公告)日：2015-07-02

申请号：US14140683

申请日：2013-12-26

Applicant: Intermolecular Inc.

Inventor： Yun Wang ,  Federico Nardi ,  Milind Weling

IPC: H01L45/00

CPC classification number: H01L45/1266 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1625 ,  H01L45/1633

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The resistive switching nonvolatile memory cells may include a first layer disposed. The first layer may be operable as a bottom electrode. The resistive switching nonvolatile memory cells may also include a second layer disposed over the first layer. The second layer may be operable as a resistive switching layer that is configured to switch between a first resistive state and a second resistive state. The resistive switching nonvolatile memory cells may include a third layer disposed over the second layer. The third layer may be operable as a resistive layer that is configured to determine, at least in part, an electrical resistivity of the resistive switching nonvolatile memory element. The third layer may include a semi-metallic material. The resistive switching nonvolatile memory cells may include a fourth layer that may be operable as a top electrode.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 电阻式开关非易失性存储单元可以包括设置的第一层。 第一层可以用作底部电极。 电阻式开关非易失性存储单元还可以包括设置在第一层上的第二层。 第二层可以用作电阻性开关层，其被配置为在第一电阻状态和第二电阻状态之间切换。 电阻式开关非易失性存储单元可以包括设置在第二层上的第三层。 第三层可以用作电阻层，其被配置为至少部分地确定电阻式开关非易失性存储元件的电阻率。 第三层可以包括半金属材料。 电阻式开关非易失性存储单元可以包括可以用作顶部电极的第四层。

公开(公告)号：US09054634B1

公开(公告)日：2015-06-09

申请号：US14140821

申请日：2013-12-26

Applicant: Intermolecular Inc.

Inventor： Federico Nardi ,  Yun Wang

IPC: H03K3/26 ,  H03B7/06 ,  H03K3/0231 ,  G11C11/16

CPC classification number: H03B7/06 ,  G11C11/16 ,  G11C13/0002 ,  G11C13/0038 ,  G11C13/0061 ,  H03K3/0231

Abstract: Provided are voltage controlling assemblies that may be operable as clocks and/or oscillators. A voltage controlling assembly may include a comparator and a variable resistance device connected to one differential signal node of the comparator. The other node may be connected to a capacitor. Alternatively, no capacitors may be used in the assembly. During operation of the voltage controlling assembly, the variable resistance device changes its resistance between two different resistive states. The change from a low to a high resistive state may be associated with a voltage spike at the differential signal node of the comparator and trigger a response from the comparator. This resistance change may have a delay determining an operating frequency of the voltage controlling assembly. Specifically, the variable resistance device in the low resistive state may be kept for a period of time at a certain voltage before it switches into the high resistive state.

Abstract translation: 提供了可以用作时钟和/或振荡器的电压控制组件。 电压控制组件可以包括连接到比较器的一个差分信号节点的比较器和可变电阻器件。 另一个节点可以连接到电容器。 或者，组件中不能使用电容器。 在电压控制组件的操作期间，可变电阻器件改变其在两个不同电阻状态之间的电阻。 从低电阻状态到高电阻状态的变化可能与比较器的差分信号节点处的电压尖峰相关联，并且触发来自比较器的响应。 该电阻变化可以具有确定电压控制组件的工作频率的延迟。 具体地说，低电阻状态的可变电阻器件在切换到高电阻状态之前，可以将其保持一定时间。

公开(公告)号：US09054307B2

公开(公告)日：2015-06-09

申请号：US14317155

申请日：2014-06-27

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Tim Minvielle ,  Dipankar Pramanik ,  Takeshi Yamaguchi

IPC: G11C13/00 ,  G11C7/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/56 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16

Abstract: Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from alloys of transition metals. Some examples of such alloys include chromium containing alloys that may also include nickel, aluminum, and/or silicon. Other examples include tantalum and/or titanium containing alloys that may also include a combination of silicon and carbon or a combination of aluminum and nitrogen. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature processing. In some embodiments, the breakdown voltage of a current limiting layer is at least about 8V. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layers while maintaining their performance.

Abstract translation: 提供了诸如电阻随机存取存储器（ReRAM）单元的半导体器件，其包括由过渡金属的合金形成的限流层。 这种合金的一些实例包括还可以包括镍，铝和/或硅的含铬合金。 其它实例包括也可以包括硅和碳的组合或铝和氮的组合的含钽和/或钛的合金。 这些限流层可具有至少约1欧姆 - 厘米的电阻率。 即使当这些层受到强电场和/或高温处理时，也保持该电阻率水平。 在一些实施例中，限流层的击穿电压为至少约8V。 层的高电阻率允许在保持其性能的同时缩小包括这些层的半导体器件的尺寸。

公开(公告)号：US20150129826A1

公开(公告)日：2015-05-14

申请号：US14079500

申请日：2013-11-13

Applicant: Intermolecular Inc.

Inventor： Yun Wang

IPC: H01L45/00

CPC classification number: H01L45/16 ,  G11C13/0002 ,  G11C2213/71 ,  G11C2213/77 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1675

Abstract: A flexible and/or transparent nonvolatile memory device can be fabricated on flexible substrates, together with ductile materials or transparent conductive oxide materials, and layers with thicknesses that allow flexibility and transparency. The ductile materials can include Ti, Ni, Nb, or Zr. The transparent conductive materials can include indium tin oxide, zinc oxide or aluminum doped zinc oxide. The nonvolatile memory devices can include resistive switching memory, phase change memory, magnetoresistive random access memory, or spin-transfer torque random access memory.

Abstract translation: 柔性和/或透明的非易失性存储器件可以在柔性衬底上加上延性材料或透明导电氧化物材料以及具有允许柔性和透明度的厚度的层制造。 延展性材料可以包括Ti，Ni，Nb或Zr。 透明导电材料可以包括氧化铟锡，氧化锌或掺杂氧化铝的铝。 非易失性存储器件可以包括电阻式开关存储器，相变存储器，磁阻随机存取存储器或自旋转移转矩随机存取存储器。

公开(公告)号：US09018037B1

公开(公告)日：2015-04-28

申请号：US14098263

申请日：2013-12-05

Applicant: Intermolecular, Inc.

Inventor： Federico Nardi ,  Randall J. Higuchi ,  Robert A. Huertas ,  Yun Wang

IPC: H01L29/02 ,  H01L45/00

CPC classification number: H01L45/08 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1666

Abstract: Forming a resistive switching layer having a vertical interface can generate defects confined along the interface between two electrodes. The confined defects can form a pre-determined region for filament formation and dissolution, leading to low power resistive switching and low program voltage or current variability. In addition, the filament forming process of the resistive memory device can be omitted due to the existence of the confined defects.

Abstract translation: 形成具有垂直接口的电阻式开关层可以产生沿着两个电极之间的界面限制的缺陷。 限制缺陷可以形成用于灯丝形成和溶解的预定区域，导致低功率电阻切换和低编程电压或电流变化。 此外，由于限制缺陷的存在，可以省略电阻式存储器件的灯丝形成工艺。