公开(公告)号：US07112839B2

公开(公告)日：2006-09-26

申请号：US10845153

申请日：2004-05-14

申请人： Jun Lin ,  Toshiya Suzuki ,  Katsuhiko Hieda

发明人： Jun Lin ,  Toshiya Suzuki ,  Katsuhiko Hieda

IPC分类号： H01L27/108

CPC分类号： H01L27/10852 ,  H01L21/31604 ,  H01L27/10894 ,  H01L28/40 ,  H01L28/55 ,  H01L28/90

摘要： On a semiconductor substrate, a transistor and a capacitor electrically connected to the transistor are formed, the capacitor having two electrodes made of metal and a capacitor dielectric layer between the two electrodes made of oxide dielectric material. A temporary protective film is formed over the capacitor, the temporary protective film covering the capacitor. The semiconductor substrate with the temporary protective film is subjected to a heat treatment in a reducing atmosphere. The temporary protective film is removed. The semiconductor substrate with the temporary protective film removed is subjected to a heat treatment in an inert gas atmosphere or in a vacuum state. A protective film is formed over the capacitor, the protective film covering the capacitor. With these processes, leak current of the capacitor can be reduced.

摘要翻译： 在半导体衬底上，形成与晶体管电连接的晶体管和电容器，该电容器具有由金属制成的两个电极和由氧化物介电材料制成的两个电极之间的电容器电介质层。 在电容器上形成临时保护膜，临时保护膜覆盖电容器。 具有临时保护膜的半导体衬底在还原气氛中进行热处理。 移除临时保护膜。 将除去了临时保护膜的半导体基板在惰性气体气氛或真空状态下进行热处理。 在电容器上形成保护膜，保护膜覆盖电容器。 通过这些处理，可以减小电容器的漏电流。

公开(公告)号：US06867451B2

公开(公告)日：2005-03-15

申请号：US09469190

申请日：1999-12-21

申请人： Katsuhiko Hieda ,  Kazuhiro Eguchi

发明人： Katsuhiko Hieda ,  Kazuhiro Eguchi

IPC分类号： H01L27/10 ,  H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L28/55 ,  H01L27/10814 ,  H01L28/60

摘要： A semiconductor device comprises a lower electrode shaped as a convex formed on a semiconductor substrate having crystals, a grain boundary between adjacent crystals being perpendicular to a side of the lower electrode, a capacitor insulating film covering the lower electrode, and an upper electrode formed on the capacitor insulating film.

摘要翻译： 半导体器件包括形成在具有晶体的半导体衬底上形成的凸起的下电极，相邻晶体之间的晶界垂直于下电极的侧面，覆盖下电极的电容器绝缘膜和形成在 电容绝缘膜。

公开(公告)号：US06777776B2

公开(公告)日：2004-08-17

申请号：US10368642

申请日：2003-02-20

申请人： Katsuhiko Hieda

发明人： Katsuhiko Hieda

IPC分类号： H01L2900

CPC分类号： H01L27/0805 ,  H01L27/0203 ,  H01L27/0733 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75

摘要： A semiconductor device has a plurality of capacitors. The semiconductor device includes a first capacitor arranged on a substrate and including first upper and lower electrode layers between which a first capacitor insulation film is interposed, and a second capacitor arranged on the substrate and including second upper and lower electrode layers between which a second capacitor insulation film is interposed, the second upper and lower electrode layers having a same structure as that of the first upper and lower electrode layers, and the second capacitor having a per-unit-area capacity different from that of the first capacitor.

摘要翻译： 半导体器件具有多个电容器。 半导体器件包括布置在衬底上的第一电容器，并且包括插入有第一电容器绝缘膜的第一上电极层和下电极层以及布置在衬底上的第二电容器，并且包括第二上下电极层，第二电容器 插入绝缘膜，第二上下电极层具有与第一上下电极层相同的结构，第二电容器的单位面积容量与第一电容器的单位面积容量不同。

公开(公告)号：US06696721B2

公开(公告)日：2004-02-24

申请号：US10376260

申请日：2003-03-03

申请人： Katsuhiko Hieda

发明人： Katsuhiko Hieda

IPC分类号： H01L2708

CPC分类号： H01L27/11502 ,  H01L27/10855 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/90 ,  H01L28/91

摘要： A plurality of storage node electrodes are formed on a semiconductor substrate. A capacitor insulating film is formed on the storage node electrodes. A plate electrode, facing the storage node electrodes, is formed on the capacitor insulating film. A cavity is formed in the plate electrode.

摘要翻译： 多个存储节点电极形成在半导体衬底上。 在存储节点电极上形成电容绝缘膜。 在电容器绝缘膜上形成面向存储节点电极的平板电极。 在平板电极中形成空腔。

公开(公告)号：US06495054B1

公开(公告)日：2002-12-17

申请号：US09429074

申请日：1999-10-29

申请人： Kazuhiro Eguchi ,  Katsuya Okumura ,  Masahiro Kiyotoshi ,  Katsuhiko Hieda ,  Soichi Yamazaki

发明人： Kazuhiro Eguchi ,  Katsuya Okumura ,  Masahiro Kiyotoshi ,  Katsuhiko Hieda ,  Soichi Yamazaki

IPC分类号： C03C1500

CPC分类号： C23C16/4405

摘要： Presented is an etching method capable of easily etching an oxide containing an alkaline-earth metal. One method is to etch the oxide by using an etching gas containing a halogen gas except for fluorine, an interhalogen compound consisting of only a halogen element except for fluorine, or a halogen hydride consisting of a halogen element except for fluorine and hydrogen. Particularly chlorides, bromides, and iodides of alkaline-earth metals have relatively high vapor pressures, so a thin film containing an alkaline-earth metal can be etched by using chlorine gas, bromine gas, or iodine gas. When a halogen gas containing fluorine is used, damages to SiO2 portions used in a film formation apparatus are prevented by coating these SiO2 portions with a fluoride of an alkaline-earth metal.

公开(公告)号：US06482714B1

公开(公告)日：2002-11-19

申请号：US09512320

申请日：2000-02-24

申请人： Katsuhiko Hieda ,  Kyoichi Suguro

发明人： Katsuhiko Hieda ,  Kyoichi Suguro

IPC分类号： H01C2176

CPC分类号： H01L29/517 ,  H01L21/28061 ,  H01L21/28079 ,  H01L21/28211 ,  H01L21/28238 ,  H01L21/324 ,  H01L29/495 ,  H01L29/51 ,  H01L29/513 ,  H01L29/518 ,  H01L29/665

摘要： Disclosed is a semiconductor device comprising a transistor structure including an epitaxial silicon layer formed on a main surface of an n-type semiconductor substrate, source-drain diffusion layers formed on at least the epitaxial silicon layer, a channel region formed between the source and drain regions, and a gate electrode formed on the channel region with a gate insulating film interposed therebetween, an element isolation region being sandwiched between adjacent transistor structures, wherein a punch-through stopper layer formed in a lower portion of the channel region has an impurity concentration higher than that of the channel region, and the source-drain diffusion layers do not extend to overlap with edge portion of insulating films for the element isolation.

摘要翻译： 公开了一种半导体器件，包括晶体管结构，其包括在n型半导体衬底的主表面上形成的外延硅层，至少形成在外延硅层上的源极 - 漏极扩散层，形成在源极和漏极之间的沟道区 区域，以及形成在沟道区上的栅电极，隔着栅绝缘膜的元件隔离区域夹在相邻的晶体管结构之间，其中形成在沟道区的下部的穿通阻挡层具有杂质浓度 高于沟道区域，并且源极 - 漏极扩散层不延伸以与用于元件隔离的绝缘膜的边缘部分重叠。

公开(公告)号：US06403997B1

公开(公告)日：2002-06-11

申请号：US09621450

申请日：2000-07-21

申请人： Seiji Inumiya ,  Katsuhiko Hieda ,  Tetsuo Matsuda ,  Yoshio Ozawa

发明人： Seiji Inumiya ,  Katsuhiko Hieda ,  Tetsuo Matsuda ,  Yoshio Ozawa

IPC分类号： H01L2976

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/42368 ,  H01L29/4983 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66537 ,  H01L29/66545 ,  H01L29/6659

摘要： A method of manufacturing a semiconductor device comprising the steps of forming a dummy film and a dummy gate pattern at a predetermined gate-forming region on a semiconductor substrate, forming a first side wall insulating film on a side wall of the dummy gate pattern, forming an interlayer insulating film on a portion of the semiconductor substrate around the dummy gate pattern bearing the first side wall insulating film, forming a groove by removing the dummy gate pattern, removing a portion of dummy film exposed through the groove while leaving a portion of the first side wall insulating film as well as a portion of the dummy film disposed below the portion of the first side wall insulating film, forming a gate insulating film at least on a bottom surface of the groove, and forming a gate electrode on the gate insulating film formed in the groove.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在半导体衬底上的预定栅极形成区域形成虚设膜和伪栅极图案，在虚拟栅极图案的侧壁上形成第一侧壁绝缘膜，形成 在半导体衬底的围绕着具有第一侧壁绝缘膜的伪栅极图案的部分上的层间绝缘膜，通过去除伪栅极图案形成沟槽，去除通过沟槽暴露的一部分虚拟膜，同时留下一部分 第一侧壁绝缘膜以及设置在第一侧壁绝缘膜的部分下方的虚设膜的一部分，至少在槽的底面上形成栅极绝缘膜，并且在栅极绝缘上形成栅极电极 胶片形成在凹槽中。

公开(公告)号：US06388282B1

公开(公告)日：2002-05-14

申请号：US09718389

申请日：2000-11-24

申请人： Katsuhiko Hieda

发明人： Katsuhiko Hieda

IPC分类号： H01L27108

CPC分类号： H01L27/10855 ,  H01L27/10885 ,  H01L27/10888

摘要： A semiconductor memory device includes a transistor having a gate electrode formed above a semiconductor substrate and source and drain regions formed in the semiconductor substrate, a bit line contact formed in an interlayer insulating film formed to cover the transistor and connected to one of the source and drain regions, a storage node electrode contact formed in the interlayer insulating film and connected to the other of the source and drain regions, a bit line contact plug formed on the bit line contact, a storage node electrode contact plug formed on the storage node electrode contact, a bit line formed to connect to the bit line contact plug, and a capacitor storage node electrode formed to connect to the storage node electrode contact plug.

摘要翻译： 半导体存储器件包括晶体管，其具有形成在半导体衬底上的栅电极和形成在半导体衬底中的源区和漏区，形成在层间绝缘膜中的位线接触，形成为覆盖晶体管并连接到源和 漏极区域，形成在层间绝缘膜中并连接到源极和漏极区域中的另一个的存储节点电极接触，形成在位线接触件上的位线接触插塞，形成在存储节点电极上的存储节点电极接触插塞 接触，形成为连接到位线接触插塞的位线，以及形成为连接到存储节点电极接触插塞的电容器存储节点电极。

公开(公告)号：US06335241B1

公开(公告)日：2002-01-01

申请号：US09369174

申请日：1999-08-05

申请人： Katsuhiko Hieda ,  Soichi Yamazaki ,  Kazuhiro Eguchi ,  Kyoichi Suguro

发明人： Katsuhiko Hieda ,  Soichi Yamazaki ,  Kazuhiro Eguchi ,  Kyoichi Suguro

IPC分类号： H01L218242

CPC分类号： H01L27/10855 ,  H01L27/10888 ,  H01L27/10894 ,  H01L28/91

摘要： A semiconductor device with a charge holding capacitor comprises a lower electrode connected via a plug to one of the source and drain of an MIS transistor, a capacitor insulating film formed the lower electrode, an upper electrode formed on the capacitor insulating film. The lower electrode includes a first constituting portion that is embedded in a hole in which the plug has been embedded and so formed that it self-aligns with the plug and a second constituting portion which is formed on the first constituting portion and on regions outside the fist constituting portion and whose cross section is larger than that of the first constituting portion. The first constituting portion and the second constituting portion are formed integrally by a continues film.

摘要翻译： 具有电荷保持电容器的半导体器件包括通过插头连接到MIS晶体管的源极和漏极之一的下电极，形成下电极的电容器绝缘膜，形成在电容器绝缘膜上的上电极。 下部电极包括第一构成部，该第一构成部嵌入在插入孔内并形成为与插头自对准的孔和形成在第一构成部上的第二构成部和第二构成部 第一构成部分的横截面大于第一构成部分的截面。 第一构成部分和第二构成部分由连续膜一体地形成。

公开(公告)号：US06331734B1

公开(公告)日：2001-12-18

申请号：US09383961

申请日：1999-08-27

申请人： Katsuhiko Hieda

发明人： Katsuhiko Hieda

IPC分类号： H01L23485

CPC分类号： H01L23/5283 ,  H01L21/76807 ,  H01L21/76816 ,  H01L23/5222 ,  H01L23/5228 ,  H01L27/10882 ,  H01L27/10894 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor substrate on which an element is formed, a lower wiring formed on the semiconductor substrate, and an upper wiring formed on and connected to the lower wiring. The upper wiring includes a plurality of regions having different thicknesses in a continuous wiring region excluding a connection region for connecting the upper and lower wirings.

摘要翻译： 半导体器件包括其上形成有元件的半导体衬底，形成在半导体衬底上的下布线，以及形成在下布线上并连接到下布线的上布线。 上部布线包括除了用于连接上部和下部布线的连接区域之外的连续布线区域中具有不同厚度的多个区域。