公开(公告)号：US07161264B2

公开(公告)日：2007-01-09

申请号：US10642594

申请日：2003-08-19

申请人： Nobuyasu Kanekawa ,  Kohei Sakurai ,  Shoji Sasaki ,  Kenji Tabuchi ,  Mittsuru Watabe

发明人： Nobuyasu Kanekawa ,  Kohei Sakurai ,  Shoji Sasaki ,  Kenji Tabuchi ,  Mittsuru Watabe

IPC分类号： H01L27/12

CPC分类号： H01L27/12 ,  H01L21/76229 ,  H01L21/84 ,  Y10T307/747

摘要： A semiconductor device comprises an embedded insulation layer 101 formed on a semiconductor substrate 100, plural power semiconductor elements 2, 3 formed on a semiconductor substrate 100 on the embedded insulation layer, a trench 4 formed on the semiconductor substrate and isolating between the power semiconductor elements, and an isolator 5 insulating and driving control electrodes of the power semiconductor elements, and the power semiconductor elements 2, 3 such as transistors can be used, being connected each other in series.

摘要翻译： 半导体器件包括形成在半导体衬底100上的嵌入绝缘层101，形成在嵌入绝缘层上的半导体衬底100上的多个功率半导体元件2,3，形成在半导体衬底上的沟槽4，并且在功率半导体元件 隔离器5可以使用功率半导体元件的绝缘和驱动控制电极以及诸如晶体管的功率半导体元件2,3串联连接。

公开(公告)号：US20060069523A1

公开(公告)日：2006-03-30

申请号：US11196298

申请日：2005-08-04

申请人： Nobuyasu Kanekawa ,  Masatoshi Hoshino ,  Kazuhiro Komatsuzaki ,  Masayoshi Kaneyasu

发明人： Nobuyasu Kanekawa ,  Masatoshi Hoshino ,  Kazuhiro Komatsuzaki ,  Masayoshi Kaneyasu

IPC分类号： G06F19/00

CPC分类号： B60T8/1725 ,  G01P3/489

摘要： A system for directly measuring tire grip conditions is provided which can measure a skidding condition with no need of applying a vibration. A tire rotation speed sensor comprising a detection gear and a magnet sensor is mounted to a rotating shaft of a tire. An output of the tire rotation speed sensor is analyzed in time-frequency domain to detect vibrations caused by slips, thereby determining tire grip conditions, such as a slip ratio and a slip angle. By detecting fluctuations in rotation based on the cause-effect relation between the occurrence of tire slips and the occurrence of fluctuations in rotation, the tire slips can be directly detected. Therefore, the tire grip conditions can be confirmed with high accuracy.

摘要翻译： 提供一种用于直接测量轮胎抓地条件的系统，其可以在不需要施加振动的情况下测量打滑条件。 包括检测齿轮和磁体传感器的轮胎转速传感器安装在轮胎的旋转轴上。 在时频域分析轮胎转速传感器的输出，以检测由滑移引起的振动，从而确定轮滑状态，例如滑移率和滑移角。 通过基于轮胎滑动的发生与旋转发生之间的因果关系来检测旋转的波动，可以直接检测轮胎滑移。 因此，可以高精度地确认轮胎抓地条件。

公开(公告)号：US06999855B2

公开(公告)日：2006-02-14

申请号：US10428802

申请日：2003-05-05

申请人： Kohei Sakurai ,  Nobuyasu Kanekawa ,  Fumio Murabayashi ,  Mitsuru Watabe ,  Toshio Hayashibara

发明人： Kohei Sakurai ,  Nobuyasu Kanekawa ,  Fumio Murabayashi ,  Mitsuru Watabe ,  Toshio Hayashibara

IPC分类号： G06F7/00

CPC分类号： B60W50/00 ,  B60T8/885 ,  B60T2270/406 ,  B60W50/0205 ,  B60W2050/0006 ,  F02D41/22 ,  F02D41/266 ,  F02D41/3005 ,  F02D2400/18

摘要： A low-cost vehicle control system and a car using the system controls radiation of an actuator driver and thereby reduces the radiation component cost and allows downsizing of an electronic control unit to improve the versatility. The vehicle control system has an electronic control unit, a plurality of actuators and actuator drivers for driving the actuators at the actuator side. The actuator drivers, respectively, have a independent self-diagnosis section, a self-protection section, and a communication control section and are dispersed correspondingly to the actuators.

摘要翻译： 低成本车辆控制系统和使用该系统的汽车控制致动器驱动器的辐射，从而降低辐射部件成本，并允许电子控制单元的小型化以提高通用性。 车辆控制系统具有电子控制单元，用于在致动器侧驱动致动器的多个致动器和致动器驱动器。 致动器驱动器分别具有独立的自诊断部分，自保护部分和通信控制部分，并且相应地分散到致动器。

公开(公告)号：US20060009886A1

公开(公告)日：2006-01-12

申请号：US11227075

申请日：2005-09-16

申请人： Kohei Sakurai ,  Nobuyasu Kanekawa ,  Fumio Murabayashi ,  Mitsuru Watabe ,  Toshio Hayashibara

发明人： Kohei Sakurai ,  Nobuyasu Kanekawa ,  Fumio Murabayashi ,  Mitsuru Watabe ,  Toshio Hayashibara

IPC分类号： G06F19/00

CPC分类号： B60W50/00 ,  B60T8/885 ,  B60T2270/406 ,  B60W50/0205 ,  B60W2050/0006 ,  F02D41/22 ,  F02D41/266 ,  F02D41/3005 ,  F02D2400/18

摘要： A low-cost vehicle control system and a car using the system controls radiation of an actuator driver and thereby reduces the radiation component cost and allows downsizing of an electronic control unit to improve the versatility. The vehicle control system has an electronic control unit, a plurality of actuators and actuator drivers for driving the actuators at the actuator side. The actuator drivers, respectively, have an independent self-diagnosis section, a self-protection section, and a communication control section and are dispersed correspondingly to the actuators.

公开(公告)号：US06976936B2

公开(公告)日：2005-12-20

申请号：US10829375

申请日：2004-04-22

申请人： Shiro Yamaoka ,  Toshiharu Nogi ,  Atsushi Shimada ,  Nobuyasu Kanekawa ,  Youichi Iihoshi

发明人： Shiro Yamaoka ,  Toshiharu Nogi ,  Atsushi Shimada ,  Nobuyasu Kanekawa ,  Youichi Iihoshi

IPC分类号： F02B11/00 ,  B60K6/20 ,  F02B1/12 ,  F02B13/06 ,  F02D13/02 ,  F02D21/08 ,  F02D29/00 ,  F02D35/02 ,  F02D41/00 ,  F02D41/02 ,  F02D41/04 ,  F02D41/30 ,  F02D41/34 ,  F02D43/00 ,  F02D45/00 ,  F02P5/00 ,  B60K41/04 ,  F02D41/14

CPC分类号： F02D13/0265 ,  B60W10/04 ,  B60W10/10 ,  B60W30/1819 ,  B60W2710/0616 ,  F02B1/12 ,  F02D13/0207 ,  F02D35/023 ,  F02D35/028 ,  F02D41/006 ,  F02D41/008 ,  F02D41/3035 ,  F02D41/3076 ,  F02D2041/001 ,  F02D2041/288 ,  Y02T10/128 ,  Y02T10/18 ,  Y02T10/47 ,  Y02T10/52 ,  Y02T10/84 ,  Y10T477/675 ,  Y10T477/68 ,  Y10T477/688

摘要： In a multi-cylinder engine having a compression ignition combustion mode, a vibration detecting sensor that is preferably mounted in a cylinder block or a cylinder head is used to detect a frequency and the detected frequency is appropriately analyzed to detect or estimate a cylinder pressure peak value and peak timing for each cylinder. An amount of internal EGR, a fuel injection condition, an engine speed and the like are then controlled so as to bring each of these parameters into an appropriate range thereof. The control apparatus suppresses variations in combustion states among different cylinders and different cycles arising from unit-to-unit variations or deterioration in the engine or part-to-part variations or deterioration in a component thereof.

摘要翻译： 在具有压缩点火燃烧模式的多气缸发动机中，优选安装在气缸体或气缸盖中的振动检测传感器用于检测频率，并适当地分析检测到的频率以检测或估计气缸压力峰值 每个气缸的值和峰值定时。 然后控制内部EGR的量，燃料喷射状态，发动机转速等，以使这些参数中的每一个参与其适当的范围。 控制装置抑制由单位变化引起的不同气缸和不同循环之间的燃烧状态的变化，或者发动机的劣化或部件间变化或其部件的劣化。

公开(公告)号：US06904793B2

公开(公告)日：2005-06-14

申请号：US10270497

申请日：2002-10-16

申请人： Atsushi Kanke ,  Kohei Sakurai ,  Masatoshi Hoshino ,  Nobuyasu Kanekawa

发明人： Atsushi Kanke ,  Kohei Sakurai ,  Masatoshi Hoshino ,  Nobuyasu Kanekawa

IPC分类号： F02M35/10 ,  F02D9/02 ,  F02D35/00 ,  F02D41/22 ,  F02D45/00 ,  G01F1/684 ,  G01F1/698 ,  G01F15/04 ,  G01P5/00

CPC分类号： F02D9/1035 ,  G01F1/6842 ,  G01F1/698 ,  G01F15/04

摘要： An air flow meter which can decrease the error due to the backflow. Throttle valve 17 which opens and shuts the air intake passage is installed in the air intake passage of the internal combustion engine. The first sensor part 161 is installed in the air intake passage in the upstream of throttle valve 17. Further, the second sensor part 141 is installed in the air intake passage in the downstream of throttle valve 17. Pulsation compensating means 671 corrects the pulsation of the air flow rate signal detected by the first sensor part by using the output signals of the first and the second sensor parts 161, 141 based on each cylinder of the internal combustion engine.

摘要翻译： 一种可以减少由于回流引起的误差的空气流量计。 在内燃机的进气通道中安装有打开和关闭进气通道的节气门17。 第一传感器部分161安装在节流阀17上游的进气通道中。此外，第二传感器部分141安装在节流阀17下游的进气通道中。脉冲补偿装置671校正脉动 通过使用第一和第二传感器部分161,141的输出信号，基于内燃机的每个气缸，由第一传感器部分检测的空气流量信号。

公开(公告)号：US20050040978A1

公开(公告)日：2005-02-24

申请号：US10912542

申请日：2004-08-06

申请人： Yuichiro Morita ,  Kohei Sakurai ,  Nobuyasu Kanekawa ,  Masatoshi Hoshino ,  Hiromichi Yamada ,  Kotaro Shimamura ,  Satoshi Tanaka ,  Naoki Yada

发明人： Yuichiro Morita ,  Kohei Sakurai ,  Nobuyasu Kanekawa ,  Masatoshi Hoshino ,  Hiromichi Yamada ,  Kotaro Shimamura ,  Satoshi Tanaka ,  Naoki Yada

IPC分类号： H03M1/00 ,  H03M1/12

CPC分类号： H03M1/1225

摘要： In an A/D converter and a microcontroller including the same, the number of selection patterns of analog input channels is increased for each A/D conversion and the A/D conversion is conducted using an A/D converter having only fundamental functions without imposing load onto a CPU. The A/D converter or a DMA transfer device includes an A/D conversion table including one or more entries. Each entry includes enable bits for setting whether or not an A/D conversion is executed for the respective analog input channels and a plurality of count number bits for setting a number of executions of the A/D conversion.

摘要翻译： 在A / D转换器和包含该A / D转换器的微控制器中，对于每个A / D转换，模拟输入通道的选择模式的数量增加，并且使用仅具有基本功能的A / D转换器进行A / D转换，而不施加 加载到CPU上 A / D转换器或DMA传输装置包括包括一个或多个条目的A / D转换表。 每个条目包括用于设置是否对各个模拟输入通道执行A / D转换的使能位以及用于设置A / D转换执行次数的多个计数号位。

公开(公告)号：US06344809B1

公开(公告)日：2002-02-05

申请号：US09704687

申请日：2000-11-03

申请人： Nobuyasu Kanekawa ,  Yasuyuki Kojima ,  Seigou Yukutake ,  Minehiro Nemoto ,  Kazuhisa Takami ,  Takayuki Iwasaki ,  Yusuke Takeuchi ,  Yasuo Shima

发明人： Nobuyasu Kanekawa ,  Yasuyuki Kojima ,  Seigou Yukutake ,  Minehiro Nemoto ,  Kazuhisa Takami ,  Takayuki Iwasaki ,  Yusuke Takeuchi ,  Yasuo Shima

IPC分类号： H03M900

CPC分类号： H04L12/10 ,  H04M1/573 ,  H04M3/005

摘要： In order to reduce the consumption of power of an isolator interface and an ADC, it is proposed to operate a calling signal reception or Caller ID signal reception function only with power supplied from the system switch while maintaining the on-hook condition of a telephone. At the time of normal operation, the output of the analogue digital converter is input to an isolator through the isolator interface, and at the time of the calling signal reception or the caller identification information reception, the output of the analogue digital converter is input directly to the isolator.

摘要翻译： 为了减少隔离器接口和ADC的功率消耗，建议仅在保持电话机的挂机状态的同时从系统交换机提供的电源来操作呼叫信号接收或来电显示信号接收功能。 在正常运行时，模拟数字转换器的输出通过隔离器接口输入到隔离器，在呼叫信号接收或来电识别信息接收时，模拟数字转换器的输出直接输入 到隔离器。

公开(公告)号：US06216236B1

公开(公告)日：2001-04-10

申请号：US09188903

申请日：1998-11-10

申请人： Takeshi Miyao ,  Manabu Araoka ,  Tomoaki Nakamura ,  Masayuki Tanji ,  Shigenori Kaneko ,  Koji Masui ,  Saburou Iijima ,  Nobuyasu Kanekawa ,  Shinichiro Kanekawa ,  Yoshiki Kobayashi ,  Hiroaki Fukumaru ,  Katsunori Tagiri

发明人： Takeshi Miyao ,  Manabu Araoka ,  Tomoaki Nakamura ,  Masayuki Tanji ,  Shigenori Kaneko ,  Koji Masui ,  Saburou Iijima ,  Nobuyasu Kanekawa ,  Shinichiro Kanekawa ,  Yoshiki Kobayashi ,  Hiroaki Fukumaru ,  Katsunori Tagiri

IPC分类号： G06F1134

CPC分类号： G06F11/187 ,  G06F11/1064 ,  G06F11/141 ,  G06F11/1604 ,  G06F11/1641 ,  G06F11/1666 ,  G06F11/1679 ,  G06F11/18 ,  G06F11/181 ,  G06F11/184 ,  G06F11/185 ,  G06F11/20 ,  G06F11/2007 ,  G06F11/2028 ,  G06F11/203 ,  G06F11/2035 ,  G06F11/2043 ,  G06F12/0833 ,  G11C29/74

摘要： A computer system has a plurality of processing units (2-1,2-2,2-n) connected via one or more system buses (1-1,1-2). Each processing unit (2-1,2-2,2-n) has three or more processors (20-1,20-2,20-3) on a common support board (PL) and controlled by a common clock unit (1000). The three processors (20-1,20-2,20-3) perform the same operation and a fault in a processor (20-1,20-2, 20-3) is detected by comparison of the operations of the three processors (20-1,20-2,20-3). If one processor (20-1,20-2,20-3) fails, the operation can continue in the other two processors (20-1,20-2,20-3) of the processing unit (2-1,2-2,2-n), at least temporarily, before replacement of the entire processing unit (2-1,2-2, 2-n). Furthermore, the processing unit (2-1,2-2,2-n) may have a plurality of clocks (A,B) within the clock unit (1000), with a switching arrangement so that the processors (20-1,20-2,20-n) normally receive clock pulses from a main clock (A), but receive pulses from an auxiliary clock (B) if the main clock (A) fails. Switching between the main and auxiliary clock (A,B) involves comparison of the pulse duration from the clocks (A,B). Additionally, a plurality of cache memories (220,221) may be connected in common to the processors (20-1,20-2,20-3), so that failure of one cache memory (220,221) permits the processing unit (2-1,2-2,2-n) to continue to operate using the other cache memory (220,221). Coherence of the contents of the cache memories (220,221) may be achieved by direct comparison, and a comparison method can also be used to invalidate data in an internal cache memory (2020-1,2020-2,2020-3) of a processor (20-1,20-2,20-3) which differs from that in the external cache memory (220,221). Coherence of protocols may also ensure that data in caches (220,221) of the different processor units (2-1,2-2,2-n) are always correct.

摘要翻译： 计算机系统具有经由一个或多个系统总线（1-1,1-2）连接的多个处理单元（2-1,2-2,2-n）。 每个处理单元（2-1,2-2,2-n）在公共支撑板（PL）上具有三个或更多个处理器（20-1,20-2,20-3），并由公共时钟单元 1000）。 三个处理器（20-1,20-2,20-3）执行相同的操作，并且通过比较三个处理器（20-1,20-2,20-3）的操作来检测处理器（20-1,20-2,20-3）中的故障 （20-1,20-2,20-3）。 如果一个处理器（20-1,20-2,20-3）失败，则可以在处理单元的其他两个处理器（20-1,20-2,20-3）中继续操作（2-1,2 -2,2-n），至少暂时在更换整个处理单元（2-1,2-2,2-n）之前。 此外，处理单元（2-1,2-2,2-n）可以在时钟单元（1000）内具有多个时钟（A，B），具有切换装置，使得处理器（20-1， 20-2,20-n）通常从主时钟（A）接收时钟脉冲，但是如果主时钟（A）发生故障，则从辅助时钟（B）接收脉冲。 在主时钟和辅助时钟（A，B）之间切换涉及从时钟（A，B）的脉冲持续时间的比较。 另外，多个高速缓冲存储器（220,221）可以共同地连接到处理器（20-1,20-2,20-3），使得一个高速缓冲存储器（220,221）的故障允许处理单元（2-1 ，2

公开(公告)号：US5901281A

公开(公告)日：1999-05-04

申请号：US434288

申请日：1995-05-03

申请人： Takeshi Miyao ,  Manabu Araoka ,  Tomoaki Nakamura ,  Masayuki Tanji ,  Shigenori Kaneko ,  Koji Masui ,  Saburou Iijima ,  Nobuyasu Kanekawa ,  Shinichiro Kanekawa ,  Yoshiki Kobayashi ,  Hiroaki Fukumaru ,  Katsunori Tagiri

发明人： Takeshi Miyao ,  Manabu Araoka ,  Tomoaki Nakamura ,  Masayuki Tanji ,  Shigenori Kaneko ,  Koji Masui ,  Saburou Iijima ,  Nobuyasu Kanekawa ,  Shinichiro Kanekawa ,  Yoshiki Kobayashi ,  Hiroaki Fukumaru ,  Katsunori Tagiri

IPC分类号： G06F11/00 ,  G06F11/14 ,  G06F11/16 ,  G06F11/18 ,  G06F11/20 ,  G11C29/00 ,  G06F11/34

CPC分类号： G06F11/187 ,  G06F11/1064 ,  G06F11/141 ,  G06F11/1604 ,  G06F11/1666 ,  G06F11/1679 ,  G06F11/181 ,  G06F11/184 ,  G06F11/2007 ,  G06F11/2028 ,  G06F11/203 ,  G06F11/2035 ,  G06F11/2043 ,  G06F12/0833 ,  G06F11/1641 ,  G06F11/18 ,  G06F11/185 ,  G06F11/20 ,  G11C29/74

摘要： A computer system has a plurality of processing units connected via one or more system buses. Each processing unit has three or more processors on a common support board (PL) and controlled by a common clock unit. The three processors perform the same operation and a fault in a processor is detected by comparison of the operations of the three processors. If one processor fails, the operation can continue in the other two processors of the processing unit, at least temporarily, before replacement of the entire processing unit. Furthermore, the processing unit may have a plurality of clocks (A,B) within the clock unit, with a switching arrangement so that the processors normally receive clock pulses from a main clock (A), but receive pulses from an auxiliary clock (B) if the main clock (A) fails. Switching between the main and auxiliary clock (A,B) involves comparison of the pulse duration from the clocks (A,B). Additionally, a plurality of cache memories may be connected in common to the processors, so that failure of one cache memory permits the processing unit to continue to operate using the other cache memory. Coherence of the contents of the cache memories may be achieved by direct comparison, and a comparison method can also be used to invalidate data in an internal cache memory of a processor which differs from that in the external cache memory. Coherence of protocols may also ensure that data in caches of the different processor units are always correct.

摘要翻译： 计算机系统具有经由一个或多个系统总线连接的多个处理单元。 每个处理单元在公共支撑板（PL）上具有三个或更多个处理器，并由公共时钟单元控制。 三个处理器执行相同的操作，并且通过比较三个处理器的操作来检测处理器中的故障。 如果一个处理器发生故障，则在更换整个处理单元之前，至少暂时在处理单元的其他两个处理器中继续操作。 此外，处理单元可以在时钟单元内具有多个时钟（A，B），具有切换装置，使得处理器通常从主时钟（A）接收时钟脉冲，但是从辅助时钟（B ）如果主时钟（A）失败。 在主时钟和辅助时钟（A，B）之间切换涉及从时钟（A，B）的脉冲持续时间的比较。 此外，多个高速缓冲存储器可以共同地连接到处理器，使得一个高速缓冲存储器的故障允许处理单元使用另一高速缓冲存储器继续操作。 可以通过直接比较来实现高速缓冲存储器的内容的一致性，并且还可以使用比较方法来使处理器的内部高速缓冲存储器中的数据与外部高速缓冲存储器中的数据不同。 协议的一致性还可以确保不同处理器单元的高速缓存中的数据总是正确的。