公开(公告)号：US09496314B1

公开(公告)日：2016-11-15

申请号：US14853116

申请日：2015-09-14

Applicant: QUALCOMM Incorporated

Inventor： Yu Lu ,  Xiaochun Zhu ,  Xia Li ,  Seung Hyuk Kang

IPC: H01L29/66 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12 ,  H01L21/8234

CPC classification number: H01L27/228 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  H01L21/823475 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: Shared source line magnetic tunnel junction (MTJ) bit cells employing uniform MTJ connection patterns for reduced area are disclosed. In one aspect, a two (2) transistor, two (2) MTJ (2T2MTJ) bit cell includes a shared source line system having first and second source lines. A uniform MTJ connection pattern results in the first source line disposed in an upper metal layer and electrically coupled to a free layer of a first MTJ, and the second source line disposed in a lower metal layer and electrically coupled to a second access transistor. Middle segments are disposed in middle metal layers to reserve the middle metal layers for strap segments of a strap cell that may be used to electrically couple the first and second source lines. Electrically coupling the first and second source lines using the strap cell allows each MTJ to logically share a single source line.

Abstract translation: 公开了采用均匀MTJ连接图案的共享源极线磁隧道结（MTJ）位单元，以减小面积。 一方面，两（2）晶体管，两（2）MTJ（2T2MTJ）位单元包括具有第一和第二源极线的共享源极线系统。 均匀的MTJ连接图案使得第一源极线设置在上金属层中并电耦合到第一MTJ的自由层，并且第二源极线设置在下金属层中并电耦合到第二存取晶体管。 中间部分设置在中间金属层中，以保留可用于电耦合第一和第二源极线的带状电池的带段的中间金属层。 使用带单元电连接第一和第二源极线允许每个MTJ在逻辑上共享单个源极线。

公开(公告)号：US09461094B2

公开(公告)日：2016-10-04

申请号：US14334554

申请日：2014-07-17

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Wei-Chuan Chen ,  Yu Lu ,  Kangho Lee ,  Seung Hyuk Kang

IPC: G11C11/00 ,  H01L27/22 ,  H01L43/08 ,  G11C11/16

CPC classification number: H01L27/224 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C2213/73 ,  H01L27/228 ,  H01L43/08

Abstract: An MRAM cell may include a magnetic tunneling junction (MTJ). The MTJ includes a pin layer, a barrier layer, a free layer, and a capping layer. The MRAM cell further includes a bidirectional diode selector, directly coupled to an electrode of the MTJ, to enable access to the MTJ.

Abstract translation: MRAM单元可以包括磁隧道结（MTJ）。 MTJ包括针层，阻挡层，自由层和覆盖层。 MRAM单元还包括直接耦合到MTJ的电极的双向二极管选择器，以使得能够访问MTJ。

公开(公告)号：US20160172456A1

公开(公告)日：2016-06-16

申请号：US14567925

申请日：2014-12-11

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  John Jianhong Zhu ,  Jeffrey Junhao Xu ,  Bin Yang ,  Jun Yuan ,  Yu Lu

IPC: H01L29/417 ,  H01L21/283

CPC classification number: H01L29/41775 ,  H01L21/76841 ,  H01L21/76895 ,  H01L21/76897 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device includes a transistor having a metal gate, a source, and a drain. The semiconductor device also includes a high resistance metal etch-stop layer positioned above the metal gate of the transistor. The semiconductor device also includes a metal layer formed on the high resistance metal etch-stop layer. The metal layer is positioned above at least one of the source of the transistor or the drain of the transistor.

Abstract translation: 半导体器件包括具有金属栅极，源极和漏极的晶体管。 半导体器件还包括位于晶体管的金属栅极上方的高电阻金属蚀刻停止层。 半导体器件还包括形成在高电阻金属蚀刻停止层上的金属层。 金属层位于晶体管的源极或晶体管的漏极中的至少一个的上方。

公开(公告)号：US09368718B2

公开(公告)日：2016-06-14

申请号：US14294205

申请日：2014-06-03

Applicant: QUALCOMM Incorporated

Inventor： Xia Li

IPC: H01L21/00 ,  H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/16 ,  G11C11/56 ,  H01F41/30 ,  H01L43/08 ,  H01F10/32 ,  H01L27/22

CPC classification number: H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/5607 ,  G11C2211/5615 ,  H01F10/3254 ,  H01F41/308 ,  H01L27/222 ,  H01L43/08

Abstract: A method of forming a magnetic tunnel junction device is disclosed that includes forming a trench in a substrate, the trench including a plurality of sidewalls and a bottom wall. The method includes depositing a first conductive material within the trench proximate to one of the sidewalls and depositing a second conductive material within the trench. The method further includes depositing a material to form a magnetic tunnel junction (MTJ) structure within the trench. The MTJ structure includes a fixed magnetic layer having a magnetic field with a fixed magnetic orientation, a tunnel junction layer, and a free magnetic layer having a magnetic field with a configurable magnetic orientation. The method further includes selectively removing a portion of the MTJ structure to create an opening in the MTJ structure.

Abstract translation: 公开了一种形成磁性隧道结装置的方法，其包括在衬底中形成沟槽，沟槽包括多个侧壁和底壁。 所述方法包括在所述沟槽内靠近所述侧壁之一沉积第一导电材料，并在所述沟槽内沉积第二导电材料。 该方法还包括沉积材料以在沟槽内形成磁隧道结（MTJ）结构。 MTJ结构包括具有固定磁性取向的磁场的固定磁性层，隧道结层和具有可配置磁性取向的磁场的自由磁性层。 该方法还包括选择性地移除MTJ结构的一部分以在MTJ结构中形成开口。

公开(公告)号：US09349656B2

公开(公告)日：2016-05-24

申请号：US14496225

申请日：2014-09-25

Applicant: QUALCOMM Incorporated

Inventor： Bin Yang ,  Xia Li ,  Jun Yuan

IPC: H01L21/00 ,  H01L21/8238 ,  H01L27/12 ,  H01L21/84 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L29/10 ,  H01L29/47 ,  H01L21/28

CPC classification number: H01L21/823814 ,  H01L21/28026 ,  H01L21/823828 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/42376 ,  H01L29/47 ,  H01L29/66545 ,  H01L29/66621 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834

Abstract: A complementary metal-oxide-semiconductor (CMOS) device and methods of formation thereof are disclosed. In a particular example, a method of forming a CMOS device includes forming a first layer on an extension layer of a wafer, forming a first gate on a portion of the first layer, and forming an expansion region proximate to the extension layer. The method also includes removing a portion of the first gate to create a cavity and removing a portion of the first layer to extend the cavity to the extension layer.

Abstract translation: 公开了一种互补金属氧化物半导体（CMOS）器件及其形成方法。 在具体示例中，形成CMOS器件的方法包括在晶片的延伸层上形成第一层，在第一层的一部分上形成第一栅极，以及形成靠近延伸层的扩张区域。 该方法还包括去除第一栅极的一部分以产生空腔并去除第一层的一部分以将空腔延伸到延伸层。

公开(公告)号：US20160125953A1

公开(公告)日：2016-05-05

申请号：US14994231

申请日：2016-01-13

Applicant: QUALCOMM Incorporated

Inventor： Jung Pill Kim ,  Taehyun Kim ,  Kangho Lee ,  Seung H. Kang ,  Xia Li ,  Wah Nam Hsu

IPC: G11C17/18 ,  G11C17/16

CPC classification number: G11C17/18 ,  G11C11/16 ,  G11C11/1673 ,  G11C11/1675 ,  G11C17/02 ,  G11C17/16 ,  G11C17/165

Abstract: A one time programming (OTP) apparatus unit cell includes magnetic tunnel junctions (MTJs) with reversed connections for placing the MTJ in an anti-parallel resistance state during programming. Increased MTJ resistance in its anti-parallel resistance state causes a higher programming voltage which reduces programming time and programming current.

Abstract translation: 一次性编程（OTP）装置单元包括具有反向连接的磁隧道结（MTJ），用于在编程期间将MTJ置于反并联电阻状态。 在其反并联电阻状态下增加的MTJ电阻会导致更高的编程电压，从而减少编程时间和编程电流。

公开(公告)号：US20160005959A1

公开(公告)日：2016-01-07

申请号：US14851800

申请日：2015-09-11

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Seung Kang ,  Xiaochun Zhu

IPC: H01L43/12 ,  H01L43/08 ,  H01L43/02

CPC classification number: H01L43/12 ,  H01L43/02 ,  H01L43/08

Abstract: In a particular embodiment, an apparatus is disclosed that includes a first electrode and a magnetic tunnel junction (MTJ) structure coupled to the first electrode. A second electrode is coupled to the MTJ structure, the second electrode having a first sidewall. A spacer layer is coupled to the first electrode, the first sidewall of the second electrode, and a sidewall of the MTJ structure. A third electrode is coupled to the second electrode, where the first sidewall of the second electrode contacts a bottom surface of the third electrode at a right angle.

Abstract translation: 在一个具体实施例中，公开了一种包括耦合到第一电极的第一电极和磁隧道结（MTJ）结构的装置。 第二电极耦合到MTJ结构，第二电极具有第一侧壁。 间隔层耦合到第一电极，第二电极的第一侧壁和MTJ结构的侧壁。 第三电极耦合到第二电极，其中第二电极的第一侧壁以直角接触第三电极的底表面。

公开(公告)号：US09142762B1

公开(公告)日：2015-09-22

申请号：US14229427

申请日：2014-03-28

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Kangho Lee ,  Wei-Chuan Chen ,  Yu Lu ,  Chando Park ,  Seung Hyuk Kang

IPC: H01L21/00 ,  H01L43/12 ,  H01L43/08 ,  H01L27/22

CPC classification number: H01L43/02 ,  G11C11/161 ,  H01L27/222 ,  H01L27/224 ,  H01L43/08 ,  H01L43/12

Abstract: An improved magnetic tunnel junction device and methods for fabricating the improved magnetic tunnel junction device are provided. The provided two-etch process reduces etching damage and ablated material redeposition. In an example, provided is a method for fabricating a magnetic tunnel junction (MTJ). The method includes forming a buffer layer on a substrate, forming a bottom electrode on the substrate, forming a pin layer on the bottom electrode, forming a barrier layer on the pin layer, and forming a free layer on the barrier layer. A first etching includes etching the free layer, without etching the barrier layer, the pin layer, and the bottom electrode. The method also includes forming a top electrode on the free layer, as well as forming a hardmask layer on the top electrode. A second etching includes etching the hardmask layer; the top electrode layer, the barrier layer, the pin layer, and the bottom electrode.

Abstract translation: 提供了一种改进的磁性隧道结装置和用于制造改进的磁性隧道结装置的方法。 所提供的双蚀刻工艺减少蚀刻损伤和烧蚀材料再沉积。 在一个实例中，提供了一种制造磁性隧道结（MTJ）的方法。 该方法包括在衬底上形成缓冲层，在衬底上形成底电极，在底电极上形成引脚层，在引脚层上形成阻挡层，并在阻挡层上形成自由层。 第一蚀刻包括蚀刻自由层，而不蚀刻阻挡层，引脚层和底部电极。 该方法还包括在自由层上形成顶部电极，以及在顶部电极上形成硬掩模层。 第二蚀刻包括蚀刻硬掩模层; 顶部电极层，阻挡层，针层和底部电极。

公开(公告)号：US09105670B2

公开(公告)日：2015-08-11

申请号：US14023899

申请日：2013-09-11

Applicant: QUALCOMM Incorporated

Inventor： Xia Li

IPC: H01L29/04 ,  H01L21/67 ,  G11C11/16 ,  H01L43/08 ,  H01L43/12 ,  H01L29/66 ,  H01L29/82 ,  H01L27/22

CPC classification number: H01L21/67011 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  H01L27/228 ,  H01L29/66007 ,  H01L29/82 ,  H01L43/08 ,  H01L43/12 ,  Y10T29/53165

Abstract: A method comprises forming a trench in a substrate. The method also comprises depositing a magnetic tunnel junction (MTJ) structure within the trench. The method further comprises planarizing the MTJ.

Abstract translation: 一种方法包括在衬底中形成沟槽。 该方法还包括在沟槽内沉积磁隧道结（MTJ）结构。 该方法还包括平坦化MTJ。

公开(公告)号：US20150162404A1

公开(公告)日：2015-06-11

申请号：US14100489

申请日：2013-12-09

Applicant: QUALCOMM Incorporated

Inventor： Bin Yang ,  Xia Li ,  PR Chidambaram ,  Choh Fei Yeap

IPC: H01L29/06 ,  H01L29/22 ,  H01L29/20 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/0684 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0657 ,  H01L29/20 ,  H01L29/22 ,  H01L29/66795 ,  H01L29/785

Abstract: An apparatus comprises a first fin field effect transistor (FinFET) device extending from a surface of a first etch stop layer. The apparatus also comprises a second FinFET device extending from a surface of a second etch stop layer. A first compound layer is interposed between the first etch stop layer and the second etch stop layer.

Abstract translation: 一种装置包括从第一蚀刻停止层的表面延伸的第一鳍状场效应晶体管（FinFET）器件。 该装置还包括从第二蚀刻停止层的表面延伸的第二FinFET器件。 第一化合物层介于第一蚀刻停止层和第二蚀刻停止层之间。