公开(公告)号：US20080211033A1

公开(公告)日：2008-09-04

申请号：US12151483

申请日：2008-05-07

申请人： Robert B. Turkot ,  Justin K. Brask ,  Jack Kavalieros ,  Mark L. Doczy ,  Matthew V. Metz ,  Uday Shah ,  Suman Datta ,  Robert S. Chau

发明人： Robert B. Turkot ,  Justin K. Brask ,  Jack Kavalieros ,  Mark L. Doczy ,  Matthew V. Metz ,  Uday Shah ,  Suman Datta ,  Robert S. Chau

IPC分类号： H01L27/092

CPC分类号： H01L21/28079 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/82345 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517

摘要： A metal layer is formed on a dielectric layer, which is formed on a substrate. After forming a masking layer on the metal layer, the exposed sides of the dielectric layer are covered with a polymer diffusion barrier.

摘要翻译： 在形成在基板上的电介质层上形成金属层。 在金属层上形成掩模层之后，介电层的暴露侧面被聚合物扩散阻挡层覆盖。

公开(公告)号：US20080124857A1

公开(公告)日：2008-05-29

申请号：US11556025

申请日：2006-11-02

申请人： Justin K. Brask ,  Mark L. Doczy ,  Jack Kavalieros ,  Matthew V. Metz ,  Chris E. Barns ,  Uday Shah ,  Suman Datta ,  Christopher D. Thomas ,  Robert S. Chau

发明人： Justin K. Brask ,  Mark L. Doczy ,  Jack Kavalieros ,  Matthew V. Metz ,  Chris E. Barns ,  Uday Shah ,  Suman Datta ,  Christopher D. Thomas ,  Robert S. Chau

IPC分类号： H01L21/77 ,  H01L21/762 ,  H01L21/04

CPC分类号： H01L21/28097 ,  H01L21/823835 ,  H01L21/823842 ,  H01L27/1203 ,  H01L29/4975 ,  H01L29/66545 ,  Y10S438/926

摘要： A semiconductor device and a method for forming it are described. The semoiconductor device comprises a metal NMOS gate electrode that is formed on a first part of a substrate, and a silicide PMOS gate electrode that is formed on a second part of the substrate.

摘要翻译： 对半导体装置及其形成方法进行说明。 半导体器件包括形成在衬底的第一部分上的金属NMOS栅极电极和形成在衬底的第二部分上的硅化物PMOS栅极电极。

公开(公告)号：US07326656B2

公开(公告)日：2008-02-05

申请号：US11362453

申请日：2006-02-24

申请人： Justin K. Brask ,  Brian S. Doyle ,  Jack Kavalleros ,  Mark Doczy ,  Uday Shah ,  Robert S. Chau

发明人： Justin K. Brask ,  Brian S. Doyle ,  Jack Kavalleros ,  Mark Doczy ,  Uday Shah ,  Robert S. Chau

IPC分类号： H01L21/31

CPC分类号： H01L29/785 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/41791 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  Y10S438/926 ,  Y10S438/974

摘要： A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor body. A gate electrode is then formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the first and second laterally opposite sidewalls of the semiconductor body. The gate electrode comprises a metal film formed directly adjacent to the gate dielectric layer. A pair of source and drain regions are then formed in the semiconductor body on opposite sides of the gate electrode.

摘要翻译： 要求保护半导体器件，该半导体器件具有形成在绝缘衬底上的具有顶表面和第一和第二横向相对侧壁的半导体本体。 在半导体本体的顶表面和半导体本体的第一和第二横向相对的侧壁上形成栅极电介质。 然后在半导体主体的顶表面上的栅电介质上形成栅电极，并且与半导体本体的第一和第二横向相对的侧壁上的栅电介质相邻。 栅电极包括直接与栅介电层相邻形成的金属膜。 然后在栅电极的相对侧上的半导体本体中形成一对源区和漏区。

公开(公告)号：US07176090B2

公开(公告)日：2007-02-13

申请号：US10936114

申请日：2004-09-07

申请人： Justin K. Brask ,  Jack Kavalieros ,  Mark L. Doczy ,  Matthew V. Metz ,  Suman Datta ,  Uday Shah ,  Brian S. Doyle ,  Robert S. Chau

发明人： Justin K. Brask ,  Jack Kavalieros ,  Mark L. Doczy ,  Matthew V. Metz ,  Suman Datta ,  Uday Shah ,  Brian S. Doyle ,  Robert S. Chau

IPC分类号： H01L21/336

CPC分类号： H01L21/82385 ,  H01L21/28114 ,  H01L21/30608 ,  H01L21/823828 ,  H01L29/42376 ,  H01L29/66545 ,  Y10S438/926

摘要： A method for making a semiconductor device is described. That method comprises forming on a substrate a dielectric layer and a sacrificial structure that comprises a first layer and a second layer, such that the second layer is formed on the first layer and is wider than the first layer. After the sacrificial structure is removed to generate a trench, a metal gate electrode is formed within the trench.

摘要翻译： 描述制造半导体器件的方法。 该方法包括在衬底上形成介电层和包括第一层和第二层的牺牲结构，使得第二层形成在第一层上并且比第一层更宽。 在除去牺牲结构以产生沟槽之后，在沟槽内形成金属栅电极。

公开(公告)号：US20060214231A1

公开(公告)日：2006-09-28

申请号：US11440313

申请日：2006-05-23

申请人： Uday Shah ,  Brian Doyle ,  Justin Brask ,  Robert Chau ,  Thomas Letson

发明人： Uday Shah ,  Brian Doyle ,  Justin Brask ,  Robert Chau ,  Thomas Letson

IPC分类号： H01L27/12 ,  H01L21/84

CPC分类号： H01L29/42384 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/785 ,  H01L29/7853 ,  H01L29/7854 ,  H01L29/7856 ,  H01L2924/13067 ,  Y10S438/978

摘要： A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the laterally opposite sidewalls at the top surface is greater than at the bottom surface. A gate dielectric layer is formed on the top surface of the semiconductor body and on the sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric layer on the top surface and sidewalls of the semiconductor body. A pair of source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode.

公开(公告)号：US20060188827A1

公开(公告)日：2006-08-24

申请号：US11369877

申请日：2006-03-06

申请人： Justin Brask ,  Bruce Block ,  Uday Shah

发明人： Justin Brask ,  Bruce Block ,  Uday Shah

IPC分类号： G03F7/00

CPC分类号： H01L31/1808 ,  H01L21/02071 ,  H01L21/306 ,  H01L21/31144 ,  Y02E10/50

摘要： A method of protecting a sensitive layer from harsh chemistries. The method includes forming a first sensitive layer, forming a second layer upon the first layer, then forming a third layer over the second layer. The third layer is utilized as a mask during patterning of the second layer. During patterning, however, the second layer is only partially etched, thus leaving a buffer layer overlying the first layer. The third layer is completely removed while the buffer layer protects the first layer from the harsh chemicals that are utilized to remove the third layer. Then, the buffer layer is carefully removed down to the surface of the first layer.

公开(公告)号：US20060183277A1

公开(公告)日：2006-08-17

申请号：US10742678

申请日：2003-12-19

申请人： Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Uday Shah ,  Matthew Metz ,  Chris Barns ,  Suman Datta ,  Christopher Thomas ,  Robert Chau

发明人： Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Uday Shah ,  Matthew Metz ,  Chris Barns ,  Suman Datta ,  Christopher Thomas ,  Robert Chau

IPC分类号： H01L21/8234 ,  H01L21/31

CPC分类号： H01L21/823857 ,  H01L21/28079 ,  H01L21/31691 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/51 ,  H01L29/66545

摘要： A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, and forming a sacrificial layer on the high-k gate dielectric layer. After etching the sacrificial layer, first and second spacers are formed on opposite sides of the sacrificial layer. After removing the sacrificial layer to generate a trench that is positioned between the first and second spacers, a metal layer is formed on the high-k gate dielectric layer.

摘要翻译： 描述制造半导体器件的方法。 该方法包括在衬底上形成高k栅极电介质层，并在高k栅极电介质层上形成牺牲层。 在蚀刻牺牲层之后，在牺牲层的相对侧上形成第一和第二间隔物。 在去除牺牲层以产生位于第一和第二间隔物之间​​的沟槽之后，在高k栅介质层上形成金属层。

公开(公告)号：US20060071275A1

公开(公告)日：2006-04-06

申请号：US10956279

申请日：2004-09-30

申请人： Justin Brask ,  Brian Doyle ,  Jack Kavalieros ,  Mark Doczy ,  Uday Shah ,  Robert Chau

发明人： Justin Brask ,  Brian Doyle ,  Jack Kavalieros ,  Mark Doczy ,  Uday Shah ,  Robert Chau

IPC分类号： H01L27/12

CPC分类号： H01L29/785 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/41791 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  Y10S438/926 ,  Y10S438/974

摘要： A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor body. A gate electrode is then formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the first and second laterally opposite sidewalls of the semiconductor body. The gate electrode comprises a metal film formed directly adjacent to the gate dielectric layer. A pair of source and drain regions are then formed in the semiconductor body on opposite sides of the gate electrode.

公开(公告)号：US20060057808A1

公开(公告)日：2006-03-16

申请号：US10939227

申请日：2004-09-10

申请人： Robert Turkot ,  Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Uday Shah ,  Suman Datta ,  Robert Chau

发明人： Robert Turkot ,  Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Uday Shah ,  Suman Datta ,  Robert Chau

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/3205

CPC分类号： H01L21/28079 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/82345 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517

摘要： A metal layer is formed on a dielectric layer, which is formed on a substrate. After forming a masking layer on the metal layer, the exposed sides of the dielectric layer are covered with a polymer diffusion barrier.

摘要翻译： 在形成在基板上的电介质层上形成金属层。 在金属层上形成掩模层之后，介电层的暴露侧面被聚合物扩散阻挡层覆盖。

公开(公告)号：US20060051957A1

公开(公告)日：2006-03-09

申请号：US10936114

申请日：2004-09-07

申请人： Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Uday Shah ,  Brian Doyle ,  Robert Chau

发明人： Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Uday Shah ,  Brian Doyle ,  Robert Chau

IPC分类号： H01L21/4763

CPC分类号： H01L21/82385 ,  H01L21/28114 ,  H01L21/30608 ,  H01L21/823828 ,  H01L29/42376 ,  H01L29/66545 ,  Y10S438/926

摘要： A method for making a semiconductor device is described. That method comprises forming on a substrate a dielectric layer and a sacrificial structure that comprises a first layer and a second layer, such that the second layer is formed on the first layer and is wider than the first layer. After the sacrificial structure is removed to generate a trench, a metal gate electrode is formed within the trench.

摘要翻译： 描述制造半导体器件的方法。 该方法包括在衬底上形成介电层和包括第一层和第二层的牺牲结构，使得第二层形成在第一层上并且比第一层更宽。 在除去牺牲结构以产生沟槽之后，在沟槽内形成金属栅电极。